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e9174d1e SL |
1 | // Copyright 2015 The Rust Project Developers. See the COPYRIGHT |
2 | // file at the top-level directory of this distribution and at | |
3 | // http://rust-lang.org/COPYRIGHT. | |
4 | // | |
5 | // Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or | |
6 | // http://www.apache.org/licenses/LICENSE-2.0> or the MIT license | |
7 | // <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your | |
8 | // option. This file may not be copied, modified, or distributed | |
9 | // except according to those terms. | |
10 | ||
11 | // DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py | |
12 | // ignore-tidy-linelength | |
13 | ||
14 | #![allow(unused_imports)] | |
15 | ||
54a0048b | 16 | use {Intrinsic, Type}; |
e9174d1e | 17 | use IntrinsicDef::Named; |
e9174d1e SL |
18 | |
19 | // The default inlining settings trigger a pathological behaviour in | |
20 | // LLVM, which causes makes compilation very slow. See #28273. | |
21 | #[inline(never)] | |
54a0048b | 22 | pub fn find(name: &str) -> Option<Intrinsic> { |
e9174d1e SL |
23 | if !name.starts_with("aarch64_v") { return None } |
24 | Some(match &name["aarch64_v".len()..] { | |
25 | "hadd_s8" => Intrinsic { | |
54a0048b SL |
26 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
27 | output: &::I8x8, | |
e9174d1e SL |
28 | definition: Named("llvm.aarch64.neon.shadd.v8i8") |
29 | }, | |
30 | "hadd_u8" => Intrinsic { | |
54a0048b SL |
31 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
32 | output: &::U8x8, | |
e9174d1e SL |
33 | definition: Named("llvm.aarch64.neon.uhadd.v8i8") |
34 | }, | |
35 | "hadd_s16" => Intrinsic { | |
54a0048b SL |
36 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
37 | output: &::I16x4, | |
e9174d1e SL |
38 | definition: Named("llvm.aarch64.neon.shadd.v4i16") |
39 | }, | |
40 | "hadd_u16" => Intrinsic { | |
54a0048b SL |
41 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
42 | output: &::U16x4, | |
e9174d1e SL |
43 | definition: Named("llvm.aarch64.neon.uhadd.v4i16") |
44 | }, | |
45 | "hadd_s32" => Intrinsic { | |
54a0048b SL |
46 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
47 | output: &::I32x2, | |
e9174d1e SL |
48 | definition: Named("llvm.aarch64.neon.shadd.v2i32") |
49 | }, | |
50 | "hadd_u32" => Intrinsic { | |
54a0048b SL |
51 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
52 | output: &::U32x2, | |
e9174d1e SL |
53 | definition: Named("llvm.aarch64.neon.uhadd.v2i32") |
54 | }, | |
55 | "haddq_s8" => Intrinsic { | |
54a0048b SL |
56 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
57 | output: &::I8x16, | |
e9174d1e SL |
58 | definition: Named("llvm.aarch64.neon.shadd.v16i8") |
59 | }, | |
60 | "haddq_u8" => Intrinsic { | |
54a0048b SL |
61 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
62 | output: &::U8x16, | |
e9174d1e SL |
63 | definition: Named("llvm.aarch64.neon.uhadd.v16i8") |
64 | }, | |
65 | "haddq_s16" => Intrinsic { | |
54a0048b SL |
66 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
67 | output: &::I16x8, | |
e9174d1e SL |
68 | definition: Named("llvm.aarch64.neon.shadd.v8i16") |
69 | }, | |
70 | "haddq_u16" => Intrinsic { | |
54a0048b SL |
71 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
72 | output: &::U16x8, | |
e9174d1e SL |
73 | definition: Named("llvm.aarch64.neon.uhadd.v8i16") |
74 | }, | |
75 | "haddq_s32" => Intrinsic { | |
54a0048b SL |
76 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
77 | output: &::I32x4, | |
e9174d1e SL |
78 | definition: Named("llvm.aarch64.neon.shadd.v4i32") |
79 | }, | |
80 | "haddq_u32" => Intrinsic { | |
54a0048b SL |
81 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
82 | output: &::U32x4, | |
e9174d1e SL |
83 | definition: Named("llvm.aarch64.neon.uhadd.v4i32") |
84 | }, | |
85 | "rhadd_s8" => Intrinsic { | |
54a0048b SL |
86 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
87 | output: &::I8x8, | |
e9174d1e SL |
88 | definition: Named("llvm.aarch64.neon.srhadd.v8i8") |
89 | }, | |
90 | "rhadd_u8" => Intrinsic { | |
54a0048b SL |
91 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
92 | output: &::U8x8, | |
e9174d1e SL |
93 | definition: Named("llvm.aarch64.neon.urhadd.v8i8") |
94 | }, | |
95 | "rhadd_s16" => Intrinsic { | |
54a0048b SL |
96 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
97 | output: &::I16x4, | |
e9174d1e SL |
98 | definition: Named("llvm.aarch64.neon.srhadd.v4i16") |
99 | }, | |
100 | "rhadd_u16" => Intrinsic { | |
54a0048b SL |
101 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
102 | output: &::U16x4, | |
e9174d1e SL |
103 | definition: Named("llvm.aarch64.neon.urhadd.v4i16") |
104 | }, | |
105 | "rhadd_s32" => Intrinsic { | |
54a0048b SL |
106 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
107 | output: &::I32x2, | |
e9174d1e SL |
108 | definition: Named("llvm.aarch64.neon.srhadd.v2i32") |
109 | }, | |
110 | "rhadd_u32" => Intrinsic { | |
54a0048b SL |
111 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
112 | output: &::U32x2, | |
e9174d1e SL |
113 | definition: Named("llvm.aarch64.neon.urhadd.v2i32") |
114 | }, | |
115 | "rhaddq_s8" => Intrinsic { | |
54a0048b SL |
116 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
117 | output: &::I8x16, | |
e9174d1e SL |
118 | definition: Named("llvm.aarch64.neon.srhadd.v16i8") |
119 | }, | |
120 | "rhaddq_u8" => Intrinsic { | |
54a0048b SL |
121 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
122 | output: &::U8x16, | |
e9174d1e SL |
123 | definition: Named("llvm.aarch64.neon.urhadd.v16i8") |
124 | }, | |
125 | "rhaddq_s16" => Intrinsic { | |
54a0048b SL |
126 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
127 | output: &::I16x8, | |
e9174d1e SL |
128 | definition: Named("llvm.aarch64.neon.srhadd.v8i16") |
129 | }, | |
130 | "rhaddq_u16" => Intrinsic { | |
54a0048b SL |
131 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
132 | output: &::U16x8, | |
e9174d1e SL |
133 | definition: Named("llvm.aarch64.neon.urhadd.v8i16") |
134 | }, | |
135 | "rhaddq_s32" => Intrinsic { | |
54a0048b SL |
136 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
137 | output: &::I32x4, | |
e9174d1e SL |
138 | definition: Named("llvm.aarch64.neon.srhadd.v4i32") |
139 | }, | |
140 | "rhaddq_u32" => Intrinsic { | |
54a0048b SL |
141 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
142 | output: &::U32x4, | |
e9174d1e SL |
143 | definition: Named("llvm.aarch64.neon.urhadd.v4i32") |
144 | }, | |
145 | "qadd_s8" => Intrinsic { | |
54a0048b SL |
146 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
147 | output: &::I8x8, | |
e9174d1e SL |
148 | definition: Named("llvm.aarch64.neon.sqadd.v8i8") |
149 | }, | |
150 | "qadd_u8" => Intrinsic { | |
54a0048b SL |
151 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
152 | output: &::U8x8, | |
e9174d1e SL |
153 | definition: Named("llvm.aarch64.neon.uqadd.v8i8") |
154 | }, | |
155 | "qadd_s16" => Intrinsic { | |
54a0048b SL |
156 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
157 | output: &::I16x4, | |
e9174d1e SL |
158 | definition: Named("llvm.aarch64.neon.sqadd.v4i16") |
159 | }, | |
160 | "qadd_u16" => Intrinsic { | |
54a0048b SL |
161 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
162 | output: &::U16x4, | |
e9174d1e SL |
163 | definition: Named("llvm.aarch64.neon.uqadd.v4i16") |
164 | }, | |
165 | "qadd_s32" => Intrinsic { | |
54a0048b SL |
166 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
167 | output: &::I32x2, | |
e9174d1e SL |
168 | definition: Named("llvm.aarch64.neon.sqadd.v2i32") |
169 | }, | |
170 | "qadd_u32" => Intrinsic { | |
54a0048b SL |
171 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
172 | output: &::U32x2, | |
e9174d1e SL |
173 | definition: Named("llvm.aarch64.neon.uqadd.v2i32") |
174 | }, | |
175 | "qadd_s64" => Intrinsic { | |
54a0048b SL |
176 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
177 | output: &::I64x1, | |
e9174d1e SL |
178 | definition: Named("llvm.aarch64.neon.sqadd.v1i64") |
179 | }, | |
180 | "qadd_u64" => Intrinsic { | |
54a0048b SL |
181 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::U64x1]; &INPUTS }, |
182 | output: &::U64x1, | |
e9174d1e SL |
183 | definition: Named("llvm.aarch64.neon.uqadd.v1i64") |
184 | }, | |
185 | "qaddq_s8" => Intrinsic { | |
54a0048b SL |
186 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
187 | output: &::I8x16, | |
e9174d1e SL |
188 | definition: Named("llvm.aarch64.neon.sqadd.v16i8") |
189 | }, | |
190 | "qaddq_u8" => Intrinsic { | |
54a0048b SL |
191 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
192 | output: &::U8x16, | |
e9174d1e SL |
193 | definition: Named("llvm.aarch64.neon.uqadd.v16i8") |
194 | }, | |
195 | "qaddq_s16" => Intrinsic { | |
54a0048b SL |
196 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
197 | output: &::I16x8, | |
e9174d1e SL |
198 | definition: Named("llvm.aarch64.neon.sqadd.v8i16") |
199 | }, | |
200 | "qaddq_u16" => Intrinsic { | |
54a0048b SL |
201 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
202 | output: &::U16x8, | |
e9174d1e SL |
203 | definition: Named("llvm.aarch64.neon.uqadd.v8i16") |
204 | }, | |
205 | "qaddq_s32" => Intrinsic { | |
54a0048b SL |
206 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
207 | output: &::I32x4, | |
e9174d1e SL |
208 | definition: Named("llvm.aarch64.neon.sqadd.v4i32") |
209 | }, | |
210 | "qaddq_u32" => Intrinsic { | |
54a0048b SL |
211 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
212 | output: &::U32x4, | |
e9174d1e SL |
213 | definition: Named("llvm.aarch64.neon.uqadd.v4i32") |
214 | }, | |
215 | "qaddq_s64" => Intrinsic { | |
54a0048b SL |
216 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
217 | output: &::I64x2, | |
e9174d1e SL |
218 | definition: Named("llvm.aarch64.neon.sqadd.v2i64") |
219 | }, | |
220 | "qaddq_u64" => Intrinsic { | |
54a0048b SL |
221 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
222 | output: &::U64x2, | |
e9174d1e SL |
223 | definition: Named("llvm.aarch64.neon.uqadd.v2i64") |
224 | }, | |
225 | "uqadd_s8" => Intrinsic { | |
54a0048b SL |
226 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::U8x16]; &INPUTS }, |
227 | output: &::I8x16, | |
e9174d1e SL |
228 | definition: Named("llvm.aarch64.neon.suqadd.v16i8") |
229 | }, | |
230 | "uqadd_s16" => Intrinsic { | |
54a0048b SL |
231 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::U16x8]; &INPUTS }, |
232 | output: &::I16x8, | |
e9174d1e SL |
233 | definition: Named("llvm.aarch64.neon.suqadd.v8i16") |
234 | }, | |
235 | "uqadd_s32" => Intrinsic { | |
54a0048b SL |
236 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::U32x4]; &INPUTS }, |
237 | output: &::I32x4, | |
e9174d1e SL |
238 | definition: Named("llvm.aarch64.neon.suqadd.v4i32") |
239 | }, | |
240 | "uqadd_s64" => Intrinsic { | |
54a0048b SL |
241 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::U64x2]; &INPUTS }, |
242 | output: &::I64x2, | |
e9174d1e SL |
243 | definition: Named("llvm.aarch64.neon.suqadd.v2i64") |
244 | }, | |
245 | "sqadd_u8" => Intrinsic { | |
54a0048b SL |
246 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::I8x16]; &INPUTS }, |
247 | output: &::U8x16, | |
e9174d1e SL |
248 | definition: Named("llvm.aarch64.neon.usqadd.v16i8") |
249 | }, | |
250 | "sqadd_u16" => Intrinsic { | |
54a0048b SL |
251 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::I16x8]; &INPUTS }, |
252 | output: &::U16x8, | |
e9174d1e SL |
253 | definition: Named("llvm.aarch64.neon.usqadd.v8i16") |
254 | }, | |
255 | "sqadd_u32" => Intrinsic { | |
54a0048b SL |
256 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::I32x4]; &INPUTS }, |
257 | output: &::U32x4, | |
e9174d1e SL |
258 | definition: Named("llvm.aarch64.neon.usqadd.v4i32") |
259 | }, | |
260 | "sqadd_u64" => Intrinsic { | |
54a0048b SL |
261 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::I64x2]; &INPUTS }, |
262 | output: &::U64x2, | |
e9174d1e SL |
263 | definition: Named("llvm.aarch64.neon.usqadd.v2i64") |
264 | }, | |
265 | "raddhn_s16" => Intrinsic { | |
54a0048b SL |
266 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
267 | output: &::I8x8, | |
e9174d1e SL |
268 | definition: Named("llvm.aarch64.neon.raddhn.v8i8") |
269 | }, | |
270 | "raddhn_u16" => Intrinsic { | |
54a0048b SL |
271 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
272 | output: &::U8x8, | |
e9174d1e SL |
273 | definition: Named("llvm.aarch64.neon.raddhn.v8i8") |
274 | }, | |
275 | "raddhn_s32" => Intrinsic { | |
54a0048b SL |
276 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
277 | output: &::I16x4, | |
e9174d1e SL |
278 | definition: Named("llvm.aarch64.neon.raddhn.v4i16") |
279 | }, | |
280 | "raddhn_u32" => Intrinsic { | |
54a0048b SL |
281 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
282 | output: &::U16x4, | |
e9174d1e SL |
283 | definition: Named("llvm.aarch64.neon.raddhn.v4i16") |
284 | }, | |
285 | "raddhn_s64" => Intrinsic { | |
54a0048b SL |
286 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
287 | output: &::I32x2, | |
e9174d1e SL |
288 | definition: Named("llvm.aarch64.neon.raddhn.v2i32") |
289 | }, | |
290 | "raddhn_u64" => Intrinsic { | |
54a0048b SL |
291 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
292 | output: &::U32x2, | |
e9174d1e SL |
293 | definition: Named("llvm.aarch64.neon.raddhn.v2i32") |
294 | }, | |
295 | "fmulx_f32" => Intrinsic { | |
54a0048b SL |
296 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
297 | output: &::F32x2, | |
e9174d1e SL |
298 | definition: Named("llvm.aarch64.neon.fmulx.v2f32") |
299 | }, | |
300 | "fmulx_f64" => Intrinsic { | |
54a0048b SL |
301 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
302 | output: &::F64x1, | |
e9174d1e SL |
303 | definition: Named("llvm.aarch64.neon.fmulx.v1f64") |
304 | }, | |
305 | "fmulxq_f32" => Intrinsic { | |
54a0048b SL |
306 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
307 | output: &::F32x4, | |
e9174d1e SL |
308 | definition: Named("llvm.aarch64.neon.fmulx.v4f32") |
309 | }, | |
310 | "fmulxq_f64" => Intrinsic { | |
54a0048b SL |
311 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
312 | output: &::F64x2, | |
e9174d1e SL |
313 | definition: Named("llvm.aarch64.neon.fmulx.v2f64") |
314 | }, | |
315 | "fma_f32" => Intrinsic { | |
54a0048b SL |
316 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
317 | output: &::F32x2, | |
e9174d1e SL |
318 | definition: Named("llvm.fma.v2f32") |
319 | }, | |
320 | "fma_f64" => Intrinsic { | |
54a0048b SL |
321 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
322 | output: &::F64x1, | |
e9174d1e SL |
323 | definition: Named("llvm.fma.v1f64") |
324 | }, | |
325 | "fmaq_f32" => Intrinsic { | |
54a0048b SL |
326 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
327 | output: &::F32x4, | |
e9174d1e SL |
328 | definition: Named("llvm.fma.v4f32") |
329 | }, | |
330 | "fmaq_f64" => Intrinsic { | |
54a0048b SL |
331 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
332 | output: &::F64x2, | |
e9174d1e SL |
333 | definition: Named("llvm.fma.v2f64") |
334 | }, | |
335 | "qdmulh_s16" => Intrinsic { | |
54a0048b SL |
336 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
337 | output: &::I16x4, | |
e9174d1e SL |
338 | definition: Named("llvm.aarch64.neon.sqdmulh.v4i16") |
339 | }, | |
340 | "qdmulh_s32" => Intrinsic { | |
54a0048b SL |
341 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
342 | output: &::I32x2, | |
e9174d1e SL |
343 | definition: Named("llvm.aarch64.neon.sqdmulh.v2i32") |
344 | }, | |
345 | "qdmulhq_s16" => Intrinsic { | |
54a0048b SL |
346 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
347 | output: &::I16x8, | |
e9174d1e SL |
348 | definition: Named("llvm.aarch64.neon.sqdmulh.v8i16") |
349 | }, | |
350 | "qdmulhq_s32" => Intrinsic { | |
54a0048b SL |
351 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
352 | output: &::I32x4, | |
e9174d1e SL |
353 | definition: Named("llvm.aarch64.neon.sqdmulh.v4i32") |
354 | }, | |
355 | "qrdmulh_s16" => Intrinsic { | |
54a0048b SL |
356 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
357 | output: &::I16x4, | |
e9174d1e SL |
358 | definition: Named("llvm.aarch64.neon.sqrdmulh.v4i16") |
359 | }, | |
360 | "qrdmulh_s32" => Intrinsic { | |
54a0048b SL |
361 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
362 | output: &::I32x2, | |
e9174d1e SL |
363 | definition: Named("llvm.aarch64.neon.sqrdmulh.v2i32") |
364 | }, | |
365 | "qrdmulhq_s16" => Intrinsic { | |
54a0048b SL |
366 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
367 | output: &::I16x8, | |
e9174d1e SL |
368 | definition: Named("llvm.aarch64.neon.sqrdmulh.v8i16") |
369 | }, | |
370 | "qrdmulhq_s32" => Intrinsic { | |
54a0048b SL |
371 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
372 | output: &::I32x4, | |
e9174d1e SL |
373 | definition: Named("llvm.aarch64.neon.sqrdmulh.v4i32") |
374 | }, | |
375 | "mull_s8" => Intrinsic { | |
54a0048b SL |
376 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
377 | output: &::I16x8, | |
e9174d1e SL |
378 | definition: Named("llvm.aarch64.neon.smull.v8i16") |
379 | }, | |
380 | "mull_u8" => Intrinsic { | |
54a0048b SL |
381 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
382 | output: &::U16x8, | |
e9174d1e SL |
383 | definition: Named("llvm.aarch64.neon.umull.v8i16") |
384 | }, | |
385 | "mull_s16" => Intrinsic { | |
54a0048b SL |
386 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
387 | output: &::I32x4, | |
e9174d1e SL |
388 | definition: Named("llvm.aarch64.neon.smull.v4i32") |
389 | }, | |
390 | "mull_u16" => Intrinsic { | |
54a0048b SL |
391 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
392 | output: &::U32x4, | |
e9174d1e SL |
393 | definition: Named("llvm.aarch64.neon.umull.v4i32") |
394 | }, | |
395 | "mull_s32" => Intrinsic { | |
54a0048b SL |
396 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
397 | output: &::I64x2, | |
e9174d1e SL |
398 | definition: Named("llvm.aarch64.neon.smull.v2i64") |
399 | }, | |
400 | "mull_u32" => Intrinsic { | |
54a0048b SL |
401 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
402 | output: &::U64x2, | |
e9174d1e SL |
403 | definition: Named("llvm.aarch64.neon.umull.v2i64") |
404 | }, | |
405 | "qdmullq_s8" => Intrinsic { | |
54a0048b SL |
406 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
407 | output: &::I16x8, | |
e9174d1e SL |
408 | definition: Named("llvm.aarch64.neon.sqdmull.v8i16") |
409 | }, | |
410 | "qdmullq_s16" => Intrinsic { | |
54a0048b SL |
411 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
412 | output: &::I32x4, | |
e9174d1e SL |
413 | definition: Named("llvm.aarch64.neon.sqdmull.v4i32") |
414 | }, | |
415 | "hsub_s8" => Intrinsic { | |
54a0048b SL |
416 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
417 | output: &::I8x8, | |
e9174d1e SL |
418 | definition: Named("llvm.aarch64.neon.shsub.v8i8") |
419 | }, | |
420 | "hsub_u8" => Intrinsic { | |
54a0048b SL |
421 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
422 | output: &::U8x8, | |
e9174d1e SL |
423 | definition: Named("llvm.aarch64.neon.uhsub.v8i8") |
424 | }, | |
425 | "hsub_s16" => Intrinsic { | |
54a0048b SL |
426 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
427 | output: &::I16x4, | |
e9174d1e SL |
428 | definition: Named("llvm.aarch64.neon.shsub.v4i16") |
429 | }, | |
430 | "hsub_u16" => Intrinsic { | |
54a0048b SL |
431 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
432 | output: &::U16x4, | |
e9174d1e SL |
433 | definition: Named("llvm.aarch64.neon.uhsub.v4i16") |
434 | }, | |
435 | "hsub_s32" => Intrinsic { | |
54a0048b SL |
436 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
437 | output: &::I32x2, | |
e9174d1e SL |
438 | definition: Named("llvm.aarch64.neon.shsub.v2i32") |
439 | }, | |
440 | "hsub_u32" => Intrinsic { | |
54a0048b SL |
441 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
442 | output: &::U32x2, | |
e9174d1e SL |
443 | definition: Named("llvm.aarch64.neon.uhsub.v2i32") |
444 | }, | |
445 | "hsubq_s8" => Intrinsic { | |
54a0048b SL |
446 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
447 | output: &::I8x16, | |
e9174d1e SL |
448 | definition: Named("llvm.aarch64.neon.shsub.v16i8") |
449 | }, | |
450 | "hsubq_u8" => Intrinsic { | |
54a0048b SL |
451 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
452 | output: &::U8x16, | |
e9174d1e SL |
453 | definition: Named("llvm.aarch64.neon.uhsub.v16i8") |
454 | }, | |
455 | "hsubq_s16" => Intrinsic { | |
54a0048b SL |
456 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
457 | output: &::I16x8, | |
e9174d1e SL |
458 | definition: Named("llvm.aarch64.neon.shsub.v8i16") |
459 | }, | |
460 | "hsubq_u16" => Intrinsic { | |
54a0048b SL |
461 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
462 | output: &::U16x8, | |
e9174d1e SL |
463 | definition: Named("llvm.aarch64.neon.uhsub.v8i16") |
464 | }, | |
465 | "hsubq_s32" => Intrinsic { | |
54a0048b SL |
466 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
467 | output: &::I32x4, | |
e9174d1e SL |
468 | definition: Named("llvm.aarch64.neon.shsub.v4i32") |
469 | }, | |
470 | "hsubq_u32" => Intrinsic { | |
54a0048b SL |
471 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
472 | output: &::U32x4, | |
e9174d1e SL |
473 | definition: Named("llvm.aarch64.neon.uhsub.v4i32") |
474 | }, | |
475 | "qsub_s8" => Intrinsic { | |
54a0048b SL |
476 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
477 | output: &::I8x8, | |
e9174d1e SL |
478 | definition: Named("llvm.aarch64.neon.sqsub.v8i8") |
479 | }, | |
480 | "qsub_u8" => Intrinsic { | |
54a0048b SL |
481 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
482 | output: &::U8x8, | |
e9174d1e SL |
483 | definition: Named("llvm.aarch64.neon.uqsub.v8i8") |
484 | }, | |
485 | "qsub_s16" => Intrinsic { | |
54a0048b SL |
486 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
487 | output: &::I16x4, | |
e9174d1e SL |
488 | definition: Named("llvm.aarch64.neon.sqsub.v4i16") |
489 | }, | |
490 | "qsub_u16" => Intrinsic { | |
54a0048b SL |
491 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
492 | output: &::U16x4, | |
e9174d1e SL |
493 | definition: Named("llvm.aarch64.neon.uqsub.v4i16") |
494 | }, | |
495 | "qsub_s32" => Intrinsic { | |
54a0048b SL |
496 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
497 | output: &::I32x2, | |
e9174d1e SL |
498 | definition: Named("llvm.aarch64.neon.sqsub.v2i32") |
499 | }, | |
500 | "qsub_u32" => Intrinsic { | |
54a0048b SL |
501 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
502 | output: &::U32x2, | |
e9174d1e SL |
503 | definition: Named("llvm.aarch64.neon.uqsub.v2i32") |
504 | }, | |
505 | "qsub_s64" => Intrinsic { | |
54a0048b SL |
506 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
507 | output: &::I64x1, | |
e9174d1e SL |
508 | definition: Named("llvm.aarch64.neon.sqsub.v1i64") |
509 | }, | |
510 | "qsub_u64" => Intrinsic { | |
54a0048b SL |
511 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::U64x1]; &INPUTS }, |
512 | output: &::U64x1, | |
e9174d1e SL |
513 | definition: Named("llvm.aarch64.neon.uqsub.v1i64") |
514 | }, | |
515 | "qsubq_s8" => Intrinsic { | |
54a0048b SL |
516 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
517 | output: &::I8x16, | |
e9174d1e SL |
518 | definition: Named("llvm.aarch64.neon.sqsub.v16i8") |
519 | }, | |
520 | "qsubq_u8" => Intrinsic { | |
54a0048b SL |
521 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
522 | output: &::U8x16, | |
e9174d1e SL |
523 | definition: Named("llvm.aarch64.neon.uqsub.v16i8") |
524 | }, | |
525 | "qsubq_s16" => Intrinsic { | |
54a0048b SL |
526 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
527 | output: &::I16x8, | |
e9174d1e SL |
528 | definition: Named("llvm.aarch64.neon.sqsub.v8i16") |
529 | }, | |
530 | "qsubq_u16" => Intrinsic { | |
54a0048b SL |
531 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
532 | output: &::U16x8, | |
e9174d1e SL |
533 | definition: Named("llvm.aarch64.neon.uqsub.v8i16") |
534 | }, | |
535 | "qsubq_s32" => Intrinsic { | |
54a0048b SL |
536 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
537 | output: &::I32x4, | |
e9174d1e SL |
538 | definition: Named("llvm.aarch64.neon.sqsub.v4i32") |
539 | }, | |
540 | "qsubq_u32" => Intrinsic { | |
54a0048b SL |
541 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
542 | output: &::U32x4, | |
e9174d1e SL |
543 | definition: Named("llvm.aarch64.neon.uqsub.v4i32") |
544 | }, | |
545 | "qsubq_s64" => Intrinsic { | |
54a0048b SL |
546 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
547 | output: &::I64x2, | |
e9174d1e SL |
548 | definition: Named("llvm.aarch64.neon.sqsub.v2i64") |
549 | }, | |
550 | "qsubq_u64" => Intrinsic { | |
54a0048b SL |
551 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
552 | output: &::U64x2, | |
e9174d1e SL |
553 | definition: Named("llvm.aarch64.neon.uqsub.v2i64") |
554 | }, | |
555 | "rsubhn_s16" => Intrinsic { | |
54a0048b SL |
556 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
557 | output: &::I8x8, | |
e9174d1e SL |
558 | definition: Named("llvm.aarch64.neon.rsubhn.v8i8") |
559 | }, | |
560 | "rsubhn_u16" => Intrinsic { | |
54a0048b SL |
561 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
562 | output: &::U8x8, | |
e9174d1e SL |
563 | definition: Named("llvm.aarch64.neon.rsubhn.v8i8") |
564 | }, | |
565 | "rsubhn_s32" => Intrinsic { | |
54a0048b SL |
566 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
567 | output: &::I16x4, | |
e9174d1e SL |
568 | definition: Named("llvm.aarch64.neon.rsubhn.v4i16") |
569 | }, | |
570 | "rsubhn_u32" => Intrinsic { | |
54a0048b SL |
571 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
572 | output: &::U16x4, | |
e9174d1e SL |
573 | definition: Named("llvm.aarch64.neon.rsubhn.v4i16") |
574 | }, | |
575 | "rsubhn_s64" => Intrinsic { | |
54a0048b SL |
576 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
577 | output: &::I32x2, | |
e9174d1e SL |
578 | definition: Named("llvm.aarch64.neon.rsubhn.v2i32") |
579 | }, | |
580 | "rsubhn_u64" => Intrinsic { | |
54a0048b SL |
581 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
582 | output: &::U32x2, | |
e9174d1e SL |
583 | definition: Named("llvm.aarch64.neon.rsubhn.v2i32") |
584 | }, | |
585 | "abd_s8" => Intrinsic { | |
54a0048b SL |
586 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
587 | output: &::I8x8, | |
e9174d1e SL |
588 | definition: Named("llvm.aarch64.neon.sabd.v8i8") |
589 | }, | |
590 | "abd_u8" => Intrinsic { | |
54a0048b SL |
591 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
592 | output: &::U8x8, | |
e9174d1e SL |
593 | definition: Named("llvm.aarch64.neon.uabd.v8i8") |
594 | }, | |
595 | "abd_s16" => Intrinsic { | |
54a0048b SL |
596 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
597 | output: &::I16x4, | |
e9174d1e SL |
598 | definition: Named("llvm.aarch64.neon.sabd.v4i16") |
599 | }, | |
600 | "abd_u16" => Intrinsic { | |
54a0048b SL |
601 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
602 | output: &::U16x4, | |
e9174d1e SL |
603 | definition: Named("llvm.aarch64.neon.uabd.v4i16") |
604 | }, | |
605 | "abd_s32" => Intrinsic { | |
54a0048b SL |
606 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
607 | output: &::I32x2, | |
e9174d1e SL |
608 | definition: Named("llvm.aarch64.neon.sabd.v2i32") |
609 | }, | |
610 | "abd_u32" => Intrinsic { | |
54a0048b SL |
611 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
612 | output: &::U32x2, | |
e9174d1e SL |
613 | definition: Named("llvm.aarch64.neon.uabd.v2i32") |
614 | }, | |
615 | "abd_f32" => Intrinsic { | |
54a0048b SL |
616 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
617 | output: &::F32x2, | |
e9174d1e SL |
618 | definition: Named("llvm.aarch64.neon.fabd.v2f32") |
619 | }, | |
620 | "abd_f64" => Intrinsic { | |
54a0048b SL |
621 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
622 | output: &::F64x1, | |
e9174d1e SL |
623 | definition: Named("llvm.aarch64.neon.fabd.v1f64") |
624 | }, | |
625 | "abdq_s8" => Intrinsic { | |
54a0048b SL |
626 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
627 | output: &::I8x16, | |
e9174d1e SL |
628 | definition: Named("llvm.aarch64.neon.sabd.v16i8") |
629 | }, | |
630 | "abdq_u8" => Intrinsic { | |
54a0048b SL |
631 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
632 | output: &::U8x16, | |
e9174d1e SL |
633 | definition: Named("llvm.aarch64.neon.uabd.v16i8") |
634 | }, | |
635 | "abdq_s16" => Intrinsic { | |
54a0048b SL |
636 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
637 | output: &::I16x8, | |
e9174d1e SL |
638 | definition: Named("llvm.aarch64.neon.sabd.v8i16") |
639 | }, | |
640 | "abdq_u16" => Intrinsic { | |
54a0048b SL |
641 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
642 | output: &::U16x8, | |
e9174d1e SL |
643 | definition: Named("llvm.aarch64.neon.uabd.v8i16") |
644 | }, | |
645 | "abdq_s32" => Intrinsic { | |
54a0048b SL |
646 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
647 | output: &::I32x4, | |
e9174d1e SL |
648 | definition: Named("llvm.aarch64.neon.sabd.v4i32") |
649 | }, | |
650 | "abdq_u32" => Intrinsic { | |
54a0048b SL |
651 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
652 | output: &::U32x4, | |
e9174d1e SL |
653 | definition: Named("llvm.aarch64.neon.uabd.v4i32") |
654 | }, | |
655 | "abdq_f32" => Intrinsic { | |
54a0048b SL |
656 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
657 | output: &::F32x4, | |
e9174d1e SL |
658 | definition: Named("llvm.aarch64.neon.fabd.v4f32") |
659 | }, | |
660 | "abdq_f64" => Intrinsic { | |
54a0048b SL |
661 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
662 | output: &::F64x2, | |
e9174d1e SL |
663 | definition: Named("llvm.aarch64.neon.fabd.v2f64") |
664 | }, | |
665 | "max_s8" => Intrinsic { | |
54a0048b SL |
666 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
667 | output: &::I8x8, | |
e9174d1e SL |
668 | definition: Named("llvm.aarch64.neon.smax.v8i8") |
669 | }, | |
670 | "max_u8" => Intrinsic { | |
54a0048b SL |
671 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
672 | output: &::U8x8, | |
e9174d1e SL |
673 | definition: Named("llvm.aarch64.neon.umax.v8i8") |
674 | }, | |
675 | "max_s16" => Intrinsic { | |
54a0048b SL |
676 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
677 | output: &::I16x4, | |
e9174d1e SL |
678 | definition: Named("llvm.aarch64.neon.smax.v4i16") |
679 | }, | |
680 | "max_u16" => Intrinsic { | |
54a0048b SL |
681 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
682 | output: &::U16x4, | |
e9174d1e SL |
683 | definition: Named("llvm.aarch64.neon.umax.v4i16") |
684 | }, | |
685 | "max_s32" => Intrinsic { | |
54a0048b SL |
686 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
687 | output: &::I32x2, | |
e9174d1e SL |
688 | definition: Named("llvm.aarch64.neon.smax.v2i32") |
689 | }, | |
690 | "max_u32" => Intrinsic { | |
54a0048b SL |
691 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
692 | output: &::U32x2, | |
e9174d1e SL |
693 | definition: Named("llvm.aarch64.neon.umax.v2i32") |
694 | }, | |
695 | "max_f32" => Intrinsic { | |
54a0048b SL |
696 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
697 | output: &::F32x2, | |
e9174d1e SL |
698 | definition: Named("llvm.aarch64.neon.fmax.v2f32") |
699 | }, | |
700 | "max_f64" => Intrinsic { | |
54a0048b SL |
701 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
702 | output: &::F64x1, | |
e9174d1e SL |
703 | definition: Named("llvm.aarch64.neon.fmax.v1f64") |
704 | }, | |
705 | "maxq_s8" => Intrinsic { | |
54a0048b SL |
706 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
707 | output: &::I8x16, | |
e9174d1e SL |
708 | definition: Named("llvm.aarch64.neon.smax.v16i8") |
709 | }, | |
710 | "maxq_u8" => Intrinsic { | |
54a0048b SL |
711 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
712 | output: &::U8x16, | |
e9174d1e SL |
713 | definition: Named("llvm.aarch64.neon.umax.v16i8") |
714 | }, | |
715 | "maxq_s16" => Intrinsic { | |
54a0048b SL |
716 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
717 | output: &::I16x8, | |
e9174d1e SL |
718 | definition: Named("llvm.aarch64.neon.smax.v8i16") |
719 | }, | |
720 | "maxq_u16" => Intrinsic { | |
54a0048b SL |
721 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
722 | output: &::U16x8, | |
e9174d1e SL |
723 | definition: Named("llvm.aarch64.neon.umax.v8i16") |
724 | }, | |
725 | "maxq_s32" => Intrinsic { | |
54a0048b SL |
726 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
727 | output: &::I32x4, | |
e9174d1e SL |
728 | definition: Named("llvm.aarch64.neon.smax.v4i32") |
729 | }, | |
730 | "maxq_u32" => Intrinsic { | |
54a0048b SL |
731 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
732 | output: &::U32x4, | |
e9174d1e SL |
733 | definition: Named("llvm.aarch64.neon.umax.v4i32") |
734 | }, | |
735 | "maxq_f32" => Intrinsic { | |
54a0048b SL |
736 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
737 | output: &::F32x4, | |
e9174d1e SL |
738 | definition: Named("llvm.aarch64.neon.fmax.v4f32") |
739 | }, | |
740 | "maxq_f64" => Intrinsic { | |
54a0048b SL |
741 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
742 | output: &::F64x2, | |
e9174d1e SL |
743 | definition: Named("llvm.aarch64.neon.fmax.v2f64") |
744 | }, | |
745 | "min_s8" => Intrinsic { | |
54a0048b SL |
746 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
747 | output: &::I8x8, | |
e9174d1e SL |
748 | definition: Named("llvm.aarch64.neon.smin.v8i8") |
749 | }, | |
750 | "min_u8" => Intrinsic { | |
54a0048b SL |
751 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
752 | output: &::U8x8, | |
e9174d1e SL |
753 | definition: Named("llvm.aarch64.neon.umin.v8i8") |
754 | }, | |
755 | "min_s16" => Intrinsic { | |
54a0048b SL |
756 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
757 | output: &::I16x4, | |
e9174d1e SL |
758 | definition: Named("llvm.aarch64.neon.smin.v4i16") |
759 | }, | |
760 | "min_u16" => Intrinsic { | |
54a0048b SL |
761 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
762 | output: &::U16x4, | |
e9174d1e SL |
763 | definition: Named("llvm.aarch64.neon.umin.v4i16") |
764 | }, | |
765 | "min_s32" => Intrinsic { | |
54a0048b SL |
766 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
767 | output: &::I32x2, | |
e9174d1e SL |
768 | definition: Named("llvm.aarch64.neon.smin.v2i32") |
769 | }, | |
770 | "min_u32" => Intrinsic { | |
54a0048b SL |
771 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
772 | output: &::U32x2, | |
e9174d1e SL |
773 | definition: Named("llvm.aarch64.neon.umin.v2i32") |
774 | }, | |
775 | "min_f32" => Intrinsic { | |
54a0048b SL |
776 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
777 | output: &::F32x2, | |
e9174d1e SL |
778 | definition: Named("llvm.aarch64.neon.fmin.v2f32") |
779 | }, | |
780 | "min_f64" => Intrinsic { | |
54a0048b SL |
781 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
782 | output: &::F64x1, | |
e9174d1e SL |
783 | definition: Named("llvm.aarch64.neon.fmin.v1f64") |
784 | }, | |
785 | "minq_s8" => Intrinsic { | |
54a0048b SL |
786 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
787 | output: &::I8x16, | |
e9174d1e SL |
788 | definition: Named("llvm.aarch64.neon.smin.v16i8") |
789 | }, | |
790 | "minq_u8" => Intrinsic { | |
54a0048b SL |
791 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
792 | output: &::U8x16, | |
e9174d1e SL |
793 | definition: Named("llvm.aarch64.neon.umin.v16i8") |
794 | }, | |
795 | "minq_s16" => Intrinsic { | |
54a0048b SL |
796 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
797 | output: &::I16x8, | |
e9174d1e SL |
798 | definition: Named("llvm.aarch64.neon.smin.v8i16") |
799 | }, | |
800 | "minq_u16" => Intrinsic { | |
54a0048b SL |
801 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
802 | output: &::U16x8, | |
e9174d1e SL |
803 | definition: Named("llvm.aarch64.neon.umin.v8i16") |
804 | }, | |
805 | "minq_s32" => Intrinsic { | |
54a0048b SL |
806 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
807 | output: &::I32x4, | |
e9174d1e SL |
808 | definition: Named("llvm.aarch64.neon.smin.v4i32") |
809 | }, | |
810 | "minq_u32" => Intrinsic { | |
54a0048b SL |
811 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
812 | output: &::U32x4, | |
e9174d1e SL |
813 | definition: Named("llvm.aarch64.neon.umin.v4i32") |
814 | }, | |
815 | "minq_f32" => Intrinsic { | |
54a0048b SL |
816 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
817 | output: &::F32x4, | |
e9174d1e SL |
818 | definition: Named("llvm.aarch64.neon.fmin.v4f32") |
819 | }, | |
820 | "minq_f64" => Intrinsic { | |
54a0048b SL |
821 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
822 | output: &::F64x2, | |
e9174d1e SL |
823 | definition: Named("llvm.aarch64.neon.fmin.v2f64") |
824 | }, | |
825 | "maxnm_f32" => Intrinsic { | |
54a0048b SL |
826 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
827 | output: &::F32x2, | |
e9174d1e SL |
828 | definition: Named("llvm.aarch64.neon.fmaxnm.v2f32") |
829 | }, | |
830 | "maxnm_f64" => Intrinsic { | |
54a0048b SL |
831 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
832 | output: &::F64x1, | |
e9174d1e SL |
833 | definition: Named("llvm.aarch64.neon.fmaxnm.v1f64") |
834 | }, | |
835 | "maxnmq_f32" => Intrinsic { | |
54a0048b SL |
836 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
837 | output: &::F32x4, | |
e9174d1e SL |
838 | definition: Named("llvm.aarch64.neon.fmaxnm.v4f32") |
839 | }, | |
840 | "maxnmq_f64" => Intrinsic { | |
54a0048b SL |
841 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
842 | output: &::F64x2, | |
e9174d1e SL |
843 | definition: Named("llvm.aarch64.neon.fmaxnm.v2f64") |
844 | }, | |
845 | "minnm_f32" => Intrinsic { | |
54a0048b SL |
846 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
847 | output: &::F32x2, | |
e9174d1e SL |
848 | definition: Named("llvm.aarch64.neon.fminnm.v2f32") |
849 | }, | |
850 | "minnm_f64" => Intrinsic { | |
54a0048b SL |
851 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
852 | output: &::F64x1, | |
e9174d1e SL |
853 | definition: Named("llvm.aarch64.neon.fminnm.v1f64") |
854 | }, | |
855 | "minnmq_f32" => Intrinsic { | |
54a0048b SL |
856 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
857 | output: &::F32x4, | |
e9174d1e SL |
858 | definition: Named("llvm.aarch64.neon.fminnm.v4f32") |
859 | }, | |
860 | "minnmq_f64" => Intrinsic { | |
54a0048b SL |
861 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
862 | output: &::F64x2, | |
e9174d1e SL |
863 | definition: Named("llvm.aarch64.neon.fminnm.v2f64") |
864 | }, | |
865 | "shl_s8" => Intrinsic { | |
54a0048b SL |
866 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
867 | output: &::I8x8, | |
e9174d1e SL |
868 | definition: Named("llvm.aarch64.neon.sshl.v8i8") |
869 | }, | |
870 | "shl_u8" => Intrinsic { | |
54a0048b SL |
871 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::I8x8]; &INPUTS }, |
872 | output: &::U8x8, | |
e9174d1e SL |
873 | definition: Named("llvm.aarch64.neon.ushl.v8i8") |
874 | }, | |
875 | "shl_s16" => Intrinsic { | |
54a0048b SL |
876 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
877 | output: &::I16x4, | |
e9174d1e SL |
878 | definition: Named("llvm.aarch64.neon.sshl.v4i16") |
879 | }, | |
880 | "shl_u16" => Intrinsic { | |
54a0048b SL |
881 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::I16x4]; &INPUTS }, |
882 | output: &::U16x4, | |
e9174d1e SL |
883 | definition: Named("llvm.aarch64.neon.ushl.v4i16") |
884 | }, | |
885 | "shl_s32" => Intrinsic { | |
54a0048b SL |
886 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
887 | output: &::I32x2, | |
e9174d1e SL |
888 | definition: Named("llvm.aarch64.neon.sshl.v2i32") |
889 | }, | |
890 | "shl_u32" => Intrinsic { | |
54a0048b SL |
891 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::I32x2]; &INPUTS }, |
892 | output: &::U32x2, | |
e9174d1e SL |
893 | definition: Named("llvm.aarch64.neon.ushl.v2i32") |
894 | }, | |
895 | "shl_s64" => Intrinsic { | |
54a0048b SL |
896 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
897 | output: &::I64x1, | |
e9174d1e SL |
898 | definition: Named("llvm.aarch64.neon.sshl.v1i64") |
899 | }, | |
900 | "shl_u64" => Intrinsic { | |
54a0048b SL |
901 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::I64x1]; &INPUTS }, |
902 | output: &::U64x1, | |
e9174d1e SL |
903 | definition: Named("llvm.aarch64.neon.ushl.v1i64") |
904 | }, | |
905 | "shlq_s8" => Intrinsic { | |
54a0048b SL |
906 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
907 | output: &::I8x16, | |
e9174d1e SL |
908 | definition: Named("llvm.aarch64.neon.sshl.v16i8") |
909 | }, | |
910 | "shlq_u8" => Intrinsic { | |
54a0048b SL |
911 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::I8x16]; &INPUTS }, |
912 | output: &::U8x16, | |
e9174d1e SL |
913 | definition: Named("llvm.aarch64.neon.ushl.v16i8") |
914 | }, | |
915 | "shlq_s16" => Intrinsic { | |
54a0048b SL |
916 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
917 | output: &::I16x8, | |
e9174d1e SL |
918 | definition: Named("llvm.aarch64.neon.sshl.v8i16") |
919 | }, | |
920 | "shlq_u16" => Intrinsic { | |
54a0048b SL |
921 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::I16x8]; &INPUTS }, |
922 | output: &::U16x8, | |
e9174d1e SL |
923 | definition: Named("llvm.aarch64.neon.ushl.v8i16") |
924 | }, | |
925 | "shlq_s32" => Intrinsic { | |
54a0048b SL |
926 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
927 | output: &::I32x4, | |
e9174d1e SL |
928 | definition: Named("llvm.aarch64.neon.sshl.v4i32") |
929 | }, | |
930 | "shlq_u32" => Intrinsic { | |
54a0048b SL |
931 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::I32x4]; &INPUTS }, |
932 | output: &::U32x4, | |
e9174d1e SL |
933 | definition: Named("llvm.aarch64.neon.ushl.v4i32") |
934 | }, | |
935 | "shlq_s64" => Intrinsic { | |
54a0048b SL |
936 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
937 | output: &::I64x2, | |
e9174d1e SL |
938 | definition: Named("llvm.aarch64.neon.sshl.v2i64") |
939 | }, | |
940 | "shlq_u64" => Intrinsic { | |
54a0048b SL |
941 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::I64x2]; &INPUTS }, |
942 | output: &::U64x2, | |
e9174d1e SL |
943 | definition: Named("llvm.aarch64.neon.ushl.v2i64") |
944 | }, | |
945 | "qshl_s8" => Intrinsic { | |
54a0048b SL |
946 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
947 | output: &::I8x8, | |
e9174d1e SL |
948 | definition: Named("llvm.aarch64.neon.sqshl.v8i8") |
949 | }, | |
950 | "qshl_u8" => Intrinsic { | |
54a0048b SL |
951 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::I8x8]; &INPUTS }, |
952 | output: &::U8x8, | |
e9174d1e SL |
953 | definition: Named("llvm.aarch64.neon.uqshl.v8i8") |
954 | }, | |
955 | "qshl_s16" => Intrinsic { | |
54a0048b SL |
956 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
957 | output: &::I16x4, | |
e9174d1e SL |
958 | definition: Named("llvm.aarch64.neon.sqshl.v4i16") |
959 | }, | |
960 | "qshl_u16" => Intrinsic { | |
54a0048b SL |
961 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::I16x4]; &INPUTS }, |
962 | output: &::U16x4, | |
e9174d1e SL |
963 | definition: Named("llvm.aarch64.neon.uqshl.v4i16") |
964 | }, | |
965 | "qshl_s32" => Intrinsic { | |
54a0048b SL |
966 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
967 | output: &::I32x2, | |
e9174d1e SL |
968 | definition: Named("llvm.aarch64.neon.sqshl.v2i32") |
969 | }, | |
970 | "qshl_u32" => Intrinsic { | |
54a0048b SL |
971 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::I32x2]; &INPUTS }, |
972 | output: &::U32x2, | |
e9174d1e SL |
973 | definition: Named("llvm.aarch64.neon.uqshl.v2i32") |
974 | }, | |
975 | "qshl_s64" => Intrinsic { | |
54a0048b SL |
976 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
977 | output: &::I64x1, | |
e9174d1e SL |
978 | definition: Named("llvm.aarch64.neon.sqshl.v1i64") |
979 | }, | |
980 | "qshl_u64" => Intrinsic { | |
54a0048b SL |
981 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::I64x1]; &INPUTS }, |
982 | output: &::U64x1, | |
e9174d1e SL |
983 | definition: Named("llvm.aarch64.neon.uqshl.v1i64") |
984 | }, | |
985 | "qshlq_s8" => Intrinsic { | |
54a0048b SL |
986 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
987 | output: &::I8x16, | |
e9174d1e SL |
988 | definition: Named("llvm.aarch64.neon.sqshl.v16i8") |
989 | }, | |
990 | "qshlq_u8" => Intrinsic { | |
54a0048b SL |
991 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::I8x16]; &INPUTS }, |
992 | output: &::U8x16, | |
e9174d1e SL |
993 | definition: Named("llvm.aarch64.neon.uqshl.v16i8") |
994 | }, | |
995 | "qshlq_s16" => Intrinsic { | |
54a0048b SL |
996 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
997 | output: &::I16x8, | |
e9174d1e SL |
998 | definition: Named("llvm.aarch64.neon.sqshl.v8i16") |
999 | }, | |
1000 | "qshlq_u16" => Intrinsic { | |
54a0048b SL |
1001 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::I16x8]; &INPUTS }, |
1002 | output: &::U16x8, | |
e9174d1e SL |
1003 | definition: Named("llvm.aarch64.neon.uqshl.v8i16") |
1004 | }, | |
1005 | "qshlq_s32" => Intrinsic { | |
54a0048b SL |
1006 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
1007 | output: &::I32x4, | |
e9174d1e SL |
1008 | definition: Named("llvm.aarch64.neon.sqshl.v4i32") |
1009 | }, | |
1010 | "qshlq_u32" => Intrinsic { | |
54a0048b SL |
1011 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::I32x4]; &INPUTS }, |
1012 | output: &::U32x4, | |
e9174d1e SL |
1013 | definition: Named("llvm.aarch64.neon.uqshl.v4i32") |
1014 | }, | |
1015 | "qshlq_s64" => Intrinsic { | |
54a0048b SL |
1016 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
1017 | output: &::I64x2, | |
e9174d1e SL |
1018 | definition: Named("llvm.aarch64.neon.sqshl.v2i64") |
1019 | }, | |
1020 | "qshlq_u64" => Intrinsic { | |
54a0048b SL |
1021 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::I64x2]; &INPUTS }, |
1022 | output: &::U64x2, | |
e9174d1e SL |
1023 | definition: Named("llvm.aarch64.neon.uqshl.v2i64") |
1024 | }, | |
1025 | "rshl_s8" => Intrinsic { | |
54a0048b SL |
1026 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
1027 | output: &::I8x8, | |
e9174d1e SL |
1028 | definition: Named("llvm.aarch64.neon.srshl.v8i8") |
1029 | }, | |
1030 | "rshl_u8" => Intrinsic { | |
54a0048b SL |
1031 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::I8x8]; &INPUTS }, |
1032 | output: &::U8x8, | |
e9174d1e SL |
1033 | definition: Named("llvm.aarch64.neon.urshl.v8i8") |
1034 | }, | |
1035 | "rshl_s16" => Intrinsic { | |
54a0048b SL |
1036 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
1037 | output: &::I16x4, | |
e9174d1e SL |
1038 | definition: Named("llvm.aarch64.neon.srshl.v4i16") |
1039 | }, | |
1040 | "rshl_u16" => Intrinsic { | |
54a0048b SL |
1041 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::I16x4]; &INPUTS }, |
1042 | output: &::U16x4, | |
e9174d1e SL |
1043 | definition: Named("llvm.aarch64.neon.urshl.v4i16") |
1044 | }, | |
1045 | "rshl_s32" => Intrinsic { | |
54a0048b SL |
1046 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
1047 | output: &::I32x2, | |
e9174d1e SL |
1048 | definition: Named("llvm.aarch64.neon.srshl.v2i32") |
1049 | }, | |
1050 | "rshl_u32" => Intrinsic { | |
54a0048b SL |
1051 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::I32x2]; &INPUTS }, |
1052 | output: &::U32x2, | |
e9174d1e SL |
1053 | definition: Named("llvm.aarch64.neon.urshl.v2i32") |
1054 | }, | |
1055 | "rshl_s64" => Intrinsic { | |
54a0048b SL |
1056 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
1057 | output: &::I64x1, | |
e9174d1e SL |
1058 | definition: Named("llvm.aarch64.neon.srshl.v1i64") |
1059 | }, | |
1060 | "rshl_u64" => Intrinsic { | |
54a0048b SL |
1061 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::I64x1]; &INPUTS }, |
1062 | output: &::U64x1, | |
e9174d1e SL |
1063 | definition: Named("llvm.aarch64.neon.urshl.v1i64") |
1064 | }, | |
1065 | "rshlq_s8" => Intrinsic { | |
54a0048b SL |
1066 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
1067 | output: &::I8x16, | |
e9174d1e SL |
1068 | definition: Named("llvm.aarch64.neon.srshl.v16i8") |
1069 | }, | |
1070 | "rshlq_u8" => Intrinsic { | |
54a0048b SL |
1071 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::I8x16]; &INPUTS }, |
1072 | output: &::U8x16, | |
e9174d1e SL |
1073 | definition: Named("llvm.aarch64.neon.urshl.v16i8") |
1074 | }, | |
1075 | "rshlq_s16" => Intrinsic { | |
54a0048b SL |
1076 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
1077 | output: &::I16x8, | |
e9174d1e SL |
1078 | definition: Named("llvm.aarch64.neon.srshl.v8i16") |
1079 | }, | |
1080 | "rshlq_u16" => Intrinsic { | |
54a0048b SL |
1081 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::I16x8]; &INPUTS }, |
1082 | output: &::U16x8, | |
e9174d1e SL |
1083 | definition: Named("llvm.aarch64.neon.urshl.v8i16") |
1084 | }, | |
1085 | "rshlq_s32" => Intrinsic { | |
54a0048b SL |
1086 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
1087 | output: &::I32x4, | |
e9174d1e SL |
1088 | definition: Named("llvm.aarch64.neon.srshl.v4i32") |
1089 | }, | |
1090 | "rshlq_u32" => Intrinsic { | |
54a0048b SL |
1091 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::I32x4]; &INPUTS }, |
1092 | output: &::U32x4, | |
e9174d1e SL |
1093 | definition: Named("llvm.aarch64.neon.urshl.v4i32") |
1094 | }, | |
1095 | "rshlq_s64" => Intrinsic { | |
54a0048b SL |
1096 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
1097 | output: &::I64x2, | |
e9174d1e SL |
1098 | definition: Named("llvm.aarch64.neon.srshl.v2i64") |
1099 | }, | |
1100 | "rshlq_u64" => Intrinsic { | |
54a0048b SL |
1101 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::I64x2]; &INPUTS }, |
1102 | output: &::U64x2, | |
e9174d1e SL |
1103 | definition: Named("llvm.aarch64.neon.urshl.v2i64") |
1104 | }, | |
1105 | "qrshl_s8" => Intrinsic { | |
54a0048b SL |
1106 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
1107 | output: &::I8x8, | |
e9174d1e SL |
1108 | definition: Named("llvm.aarch64.neon.sqrshl.v8i8") |
1109 | }, | |
1110 | "qrshl_u8" => Intrinsic { | |
54a0048b SL |
1111 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::I8x8]; &INPUTS }, |
1112 | output: &::U8x8, | |
e9174d1e SL |
1113 | definition: Named("llvm.aarch64.neon.uqrshl.v8i8") |
1114 | }, | |
1115 | "qrshl_s16" => Intrinsic { | |
54a0048b SL |
1116 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
1117 | output: &::I16x4, | |
e9174d1e SL |
1118 | definition: Named("llvm.aarch64.neon.sqrshl.v4i16") |
1119 | }, | |
1120 | "qrshl_u16" => Intrinsic { | |
54a0048b SL |
1121 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::I16x4]; &INPUTS }, |
1122 | output: &::U16x4, | |
e9174d1e SL |
1123 | definition: Named("llvm.aarch64.neon.uqrshl.v4i16") |
1124 | }, | |
1125 | "qrshl_s32" => Intrinsic { | |
54a0048b SL |
1126 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
1127 | output: &::I32x2, | |
e9174d1e SL |
1128 | definition: Named("llvm.aarch64.neon.sqrshl.v2i32") |
1129 | }, | |
1130 | "qrshl_u32" => Intrinsic { | |
54a0048b SL |
1131 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::I32x2]; &INPUTS }, |
1132 | output: &::U32x2, | |
e9174d1e SL |
1133 | definition: Named("llvm.aarch64.neon.uqrshl.v2i32") |
1134 | }, | |
1135 | "qrshl_s64" => Intrinsic { | |
54a0048b SL |
1136 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
1137 | output: &::I64x1, | |
e9174d1e SL |
1138 | definition: Named("llvm.aarch64.neon.sqrshl.v1i64") |
1139 | }, | |
1140 | "qrshl_u64" => Intrinsic { | |
54a0048b SL |
1141 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::I64x1]; &INPUTS }, |
1142 | output: &::U64x1, | |
e9174d1e SL |
1143 | definition: Named("llvm.aarch64.neon.uqrshl.v1i64") |
1144 | }, | |
1145 | "qrshlq_s8" => Intrinsic { | |
54a0048b SL |
1146 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
1147 | output: &::I8x16, | |
e9174d1e SL |
1148 | definition: Named("llvm.aarch64.neon.sqrshl.v16i8") |
1149 | }, | |
1150 | "qrshlq_u8" => Intrinsic { | |
54a0048b SL |
1151 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::I8x16]; &INPUTS }, |
1152 | output: &::U8x16, | |
e9174d1e SL |
1153 | definition: Named("llvm.aarch64.neon.uqrshl.v16i8") |
1154 | }, | |
1155 | "qrshlq_s16" => Intrinsic { | |
54a0048b SL |
1156 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
1157 | output: &::I16x8, | |
e9174d1e SL |
1158 | definition: Named("llvm.aarch64.neon.sqrshl.v8i16") |
1159 | }, | |
1160 | "qrshlq_u16" => Intrinsic { | |
54a0048b SL |
1161 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::I16x8]; &INPUTS }, |
1162 | output: &::U16x8, | |
e9174d1e SL |
1163 | definition: Named("llvm.aarch64.neon.uqrshl.v8i16") |
1164 | }, | |
1165 | "qrshlq_s32" => Intrinsic { | |
54a0048b SL |
1166 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
1167 | output: &::I32x4, | |
e9174d1e SL |
1168 | definition: Named("llvm.aarch64.neon.sqrshl.v4i32") |
1169 | }, | |
1170 | "qrshlq_u32" => Intrinsic { | |
54a0048b SL |
1171 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::I32x4]; &INPUTS }, |
1172 | output: &::U32x4, | |
e9174d1e SL |
1173 | definition: Named("llvm.aarch64.neon.uqrshl.v4i32") |
1174 | }, | |
1175 | "qrshlq_s64" => Intrinsic { | |
54a0048b SL |
1176 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
1177 | output: &::I64x2, | |
e9174d1e SL |
1178 | definition: Named("llvm.aarch64.neon.sqrshl.v2i64") |
1179 | }, | |
1180 | "qrshlq_u64" => Intrinsic { | |
54a0048b SL |
1181 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::I64x2]; &INPUTS }, |
1182 | output: &::U64x2, | |
e9174d1e SL |
1183 | definition: Named("llvm.aarch64.neon.uqrshl.v2i64") |
1184 | }, | |
1185 | "qshrun_n_s16" => Intrinsic { | |
54a0048b SL |
1186 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::U32]; &INPUTS }, |
1187 | output: &::I8x8, | |
e9174d1e SL |
1188 | definition: Named("llvm.aarch64.neon.sqshrun.v8i8") |
1189 | }, | |
1190 | "qshrun_n_s32" => Intrinsic { | |
54a0048b SL |
1191 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::U32]; &INPUTS }, |
1192 | output: &::I16x4, | |
e9174d1e SL |
1193 | definition: Named("llvm.aarch64.neon.sqshrun.v4i16") |
1194 | }, | |
1195 | "qshrun_n_s64" => Intrinsic { | |
54a0048b SL |
1196 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::U32]; &INPUTS }, |
1197 | output: &::I32x2, | |
e9174d1e SL |
1198 | definition: Named("llvm.aarch64.neon.sqshrun.v2i32") |
1199 | }, | |
1200 | "qrshrun_n_s16" => Intrinsic { | |
54a0048b SL |
1201 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::U32]; &INPUTS }, |
1202 | output: &::I8x8, | |
e9174d1e SL |
1203 | definition: Named("llvm.aarch64.neon.sqrshrun.v8i8") |
1204 | }, | |
1205 | "qrshrun_n_s32" => Intrinsic { | |
54a0048b SL |
1206 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::U32]; &INPUTS }, |
1207 | output: &::I16x4, | |
e9174d1e SL |
1208 | definition: Named("llvm.aarch64.neon.sqrshrun.v4i16") |
1209 | }, | |
1210 | "qrshrun_n_s64" => Intrinsic { | |
54a0048b SL |
1211 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::U32]; &INPUTS }, |
1212 | output: &::I32x2, | |
e9174d1e SL |
1213 | definition: Named("llvm.aarch64.neon.sqrshrun.v2i32") |
1214 | }, | |
1215 | "qshrn_n_s16" => Intrinsic { | |
54a0048b SL |
1216 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::U32]; &INPUTS }, |
1217 | output: &::I8x8, | |
e9174d1e SL |
1218 | definition: Named("llvm.aarch64.neon.sqshrn.v8i8") |
1219 | }, | |
1220 | "qshrn_n_u16" => Intrinsic { | |
54a0048b SL |
1221 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U32]; &INPUTS }, |
1222 | output: &::U8x8, | |
e9174d1e SL |
1223 | definition: Named("llvm.aarch64.neon.uqshrn.v8i8") |
1224 | }, | |
1225 | "qshrn_n_s32" => Intrinsic { | |
54a0048b SL |
1226 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::U32]; &INPUTS }, |
1227 | output: &::I16x4, | |
e9174d1e SL |
1228 | definition: Named("llvm.aarch64.neon.sqshrn.v4i16") |
1229 | }, | |
1230 | "qshrn_n_u32" => Intrinsic { | |
54a0048b SL |
1231 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32]; &INPUTS }, |
1232 | output: &::U16x4, | |
e9174d1e SL |
1233 | definition: Named("llvm.aarch64.neon.uqshrn.v4i16") |
1234 | }, | |
1235 | "qshrn_n_s64" => Intrinsic { | |
54a0048b SL |
1236 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::U32]; &INPUTS }, |
1237 | output: &::I32x2, | |
e9174d1e SL |
1238 | definition: Named("llvm.aarch64.neon.sqshrn.v2i32") |
1239 | }, | |
1240 | "qshrn_n_u64" => Intrinsic { | |
54a0048b SL |
1241 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U32]; &INPUTS }, |
1242 | output: &::U32x2, | |
e9174d1e SL |
1243 | definition: Named("llvm.aarch64.neon.uqshrn.v2i32") |
1244 | }, | |
1245 | "rshrn_n_s16" => Intrinsic { | |
54a0048b SL |
1246 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::U32]; &INPUTS }, |
1247 | output: &::I8x8, | |
e9174d1e SL |
1248 | definition: Named("llvm.aarch64.neon.rshrn.v8i8") |
1249 | }, | |
1250 | "rshrn_n_u16" => Intrinsic { | |
54a0048b SL |
1251 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U32]; &INPUTS }, |
1252 | output: &::U8x8, | |
e9174d1e SL |
1253 | definition: Named("llvm.aarch64.neon.rshrn.v8i8") |
1254 | }, | |
1255 | "rshrn_n_s32" => Intrinsic { | |
54a0048b SL |
1256 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::U32]; &INPUTS }, |
1257 | output: &::I16x4, | |
e9174d1e SL |
1258 | definition: Named("llvm.aarch64.neon.rshrn.v4i16") |
1259 | }, | |
1260 | "rshrn_n_u32" => Intrinsic { | |
54a0048b SL |
1261 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32]; &INPUTS }, |
1262 | output: &::U16x4, | |
e9174d1e SL |
1263 | definition: Named("llvm.aarch64.neon.rshrn.v4i16") |
1264 | }, | |
1265 | "rshrn_n_s64" => Intrinsic { | |
54a0048b SL |
1266 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::U32]; &INPUTS }, |
1267 | output: &::I32x2, | |
e9174d1e SL |
1268 | definition: Named("llvm.aarch64.neon.rshrn.v2i32") |
1269 | }, | |
1270 | "rshrn_n_u64" => Intrinsic { | |
54a0048b SL |
1271 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U32]; &INPUTS }, |
1272 | output: &::U32x2, | |
e9174d1e SL |
1273 | definition: Named("llvm.aarch64.neon.rshrn.v2i32") |
1274 | }, | |
1275 | "qrshrn_n_s16" => Intrinsic { | |
54a0048b SL |
1276 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::U32]; &INPUTS }, |
1277 | output: &::I8x8, | |
e9174d1e SL |
1278 | definition: Named("llvm.aarch64.neon.sqrshrn.v8i8") |
1279 | }, | |
1280 | "qrshrn_n_u16" => Intrinsic { | |
54a0048b SL |
1281 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U32]; &INPUTS }, |
1282 | output: &::U8x8, | |
e9174d1e SL |
1283 | definition: Named("llvm.aarch64.neon.uqrshrn.v8i8") |
1284 | }, | |
1285 | "qrshrn_n_s32" => Intrinsic { | |
54a0048b SL |
1286 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::U32]; &INPUTS }, |
1287 | output: &::I16x4, | |
e9174d1e SL |
1288 | definition: Named("llvm.aarch64.neon.sqrshrn.v4i16") |
1289 | }, | |
1290 | "qrshrn_n_u32" => Intrinsic { | |
54a0048b SL |
1291 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32]; &INPUTS }, |
1292 | output: &::U16x4, | |
e9174d1e SL |
1293 | definition: Named("llvm.aarch64.neon.uqrshrn.v4i16") |
1294 | }, | |
1295 | "qrshrn_n_s64" => Intrinsic { | |
54a0048b SL |
1296 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::U32]; &INPUTS }, |
1297 | output: &::I32x2, | |
e9174d1e SL |
1298 | definition: Named("llvm.aarch64.neon.sqrshrn.v2i32") |
1299 | }, | |
1300 | "qrshrn_n_u64" => Intrinsic { | |
54a0048b SL |
1301 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U32]; &INPUTS }, |
1302 | output: &::U32x2, | |
e9174d1e SL |
1303 | definition: Named("llvm.aarch64.neon.uqrshrn.v2i32") |
1304 | }, | |
1305 | "sri_s8" => Intrinsic { | |
54a0048b SL |
1306 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
1307 | output: &::I8x8, | |
e9174d1e SL |
1308 | definition: Named("llvm.aarch64.neon.vsri.v8i8") |
1309 | }, | |
1310 | "sri_u8" => Intrinsic { | |
54a0048b SL |
1311 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
1312 | output: &::U8x8, | |
e9174d1e SL |
1313 | definition: Named("llvm.aarch64.neon.vsri.v8i8") |
1314 | }, | |
1315 | "sri_s16" => Intrinsic { | |
54a0048b SL |
1316 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
1317 | output: &::I16x4, | |
e9174d1e SL |
1318 | definition: Named("llvm.aarch64.neon.vsri.v4i16") |
1319 | }, | |
1320 | "sri_u16" => Intrinsic { | |
54a0048b SL |
1321 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
1322 | output: &::U16x4, | |
e9174d1e SL |
1323 | definition: Named("llvm.aarch64.neon.vsri.v4i16") |
1324 | }, | |
1325 | "sri_s32" => Intrinsic { | |
54a0048b SL |
1326 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
1327 | output: &::I32x2, | |
e9174d1e SL |
1328 | definition: Named("llvm.aarch64.neon.vsri.v2i32") |
1329 | }, | |
1330 | "sri_u32" => Intrinsic { | |
54a0048b SL |
1331 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
1332 | output: &::U32x2, | |
e9174d1e SL |
1333 | definition: Named("llvm.aarch64.neon.vsri.v2i32") |
1334 | }, | |
1335 | "sri_s64" => Intrinsic { | |
54a0048b SL |
1336 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
1337 | output: &::I64x1, | |
e9174d1e SL |
1338 | definition: Named("llvm.aarch64.neon.vsri.v1i64") |
1339 | }, | |
1340 | "sri_u64" => Intrinsic { | |
54a0048b SL |
1341 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::U64x1]; &INPUTS }, |
1342 | output: &::U64x1, | |
e9174d1e SL |
1343 | definition: Named("llvm.aarch64.neon.vsri.v1i64") |
1344 | }, | |
1345 | "sriq_s8" => Intrinsic { | |
54a0048b SL |
1346 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
1347 | output: &::I8x16, | |
e9174d1e SL |
1348 | definition: Named("llvm.aarch64.neon.vsri.v16i8") |
1349 | }, | |
1350 | "sriq_u8" => Intrinsic { | |
54a0048b SL |
1351 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
1352 | output: &::U8x16, | |
e9174d1e SL |
1353 | definition: Named("llvm.aarch64.neon.vsri.v16i8") |
1354 | }, | |
1355 | "sriq_s16" => Intrinsic { | |
54a0048b SL |
1356 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
1357 | output: &::I16x8, | |
e9174d1e SL |
1358 | definition: Named("llvm.aarch64.neon.vsri.v8i16") |
1359 | }, | |
1360 | "sriq_u16" => Intrinsic { | |
54a0048b SL |
1361 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
1362 | output: &::U16x8, | |
e9174d1e SL |
1363 | definition: Named("llvm.aarch64.neon.vsri.v8i16") |
1364 | }, | |
1365 | "sriq_s32" => Intrinsic { | |
54a0048b SL |
1366 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
1367 | output: &::I32x4, | |
e9174d1e SL |
1368 | definition: Named("llvm.aarch64.neon.vsri.v4i32") |
1369 | }, | |
1370 | "sriq_u32" => Intrinsic { | |
54a0048b SL |
1371 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
1372 | output: &::U32x4, | |
e9174d1e SL |
1373 | definition: Named("llvm.aarch64.neon.vsri.v4i32") |
1374 | }, | |
1375 | "sriq_s64" => Intrinsic { | |
54a0048b SL |
1376 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
1377 | output: &::I64x2, | |
e9174d1e SL |
1378 | definition: Named("llvm.aarch64.neon.vsri.v2i64") |
1379 | }, | |
1380 | "sriq_u64" => Intrinsic { | |
54a0048b SL |
1381 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
1382 | output: &::U64x2, | |
e9174d1e SL |
1383 | definition: Named("llvm.aarch64.neon.vsri.v2i64") |
1384 | }, | |
1385 | "sli_s8" => Intrinsic { | |
54a0048b SL |
1386 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
1387 | output: &::I8x8, | |
e9174d1e SL |
1388 | definition: Named("llvm.aarch64.neon.vsli.v8i8") |
1389 | }, | |
1390 | "sli_u8" => Intrinsic { | |
54a0048b SL |
1391 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
1392 | output: &::U8x8, | |
e9174d1e SL |
1393 | definition: Named("llvm.aarch64.neon.vsli.v8i8") |
1394 | }, | |
1395 | "sli_s16" => Intrinsic { | |
54a0048b SL |
1396 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
1397 | output: &::I16x4, | |
e9174d1e SL |
1398 | definition: Named("llvm.aarch64.neon.vsli.v4i16") |
1399 | }, | |
1400 | "sli_u16" => Intrinsic { | |
54a0048b SL |
1401 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
1402 | output: &::U16x4, | |
e9174d1e SL |
1403 | definition: Named("llvm.aarch64.neon.vsli.v4i16") |
1404 | }, | |
1405 | "sli_s32" => Intrinsic { | |
54a0048b SL |
1406 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
1407 | output: &::I32x2, | |
e9174d1e SL |
1408 | definition: Named("llvm.aarch64.neon.vsli.v2i32") |
1409 | }, | |
1410 | "sli_u32" => Intrinsic { | |
54a0048b SL |
1411 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
1412 | output: &::U32x2, | |
e9174d1e SL |
1413 | definition: Named("llvm.aarch64.neon.vsli.v2i32") |
1414 | }, | |
1415 | "sli_s64" => Intrinsic { | |
54a0048b SL |
1416 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &INPUTS }, |
1417 | output: &::I64x1, | |
e9174d1e SL |
1418 | definition: Named("llvm.aarch64.neon.vsli.v1i64") |
1419 | }, | |
1420 | "sli_u64" => Intrinsic { | |
54a0048b SL |
1421 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x1, &::U64x1]; &INPUTS }, |
1422 | output: &::U64x1, | |
e9174d1e SL |
1423 | definition: Named("llvm.aarch64.neon.vsli.v1i64") |
1424 | }, | |
1425 | "sliq_s8" => Intrinsic { | |
54a0048b SL |
1426 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
1427 | output: &::I8x16, | |
e9174d1e SL |
1428 | definition: Named("llvm.aarch64.neon.vsli.v16i8") |
1429 | }, | |
1430 | "sliq_u8" => Intrinsic { | |
54a0048b SL |
1431 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
1432 | output: &::U8x16, | |
e9174d1e SL |
1433 | definition: Named("llvm.aarch64.neon.vsli.v16i8") |
1434 | }, | |
1435 | "sliq_s16" => Intrinsic { | |
54a0048b SL |
1436 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
1437 | output: &::I16x8, | |
e9174d1e SL |
1438 | definition: Named("llvm.aarch64.neon.vsli.v8i16") |
1439 | }, | |
1440 | "sliq_u16" => Intrinsic { | |
54a0048b SL |
1441 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
1442 | output: &::U16x8, | |
e9174d1e SL |
1443 | definition: Named("llvm.aarch64.neon.vsli.v8i16") |
1444 | }, | |
1445 | "sliq_s32" => Intrinsic { | |
54a0048b SL |
1446 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
1447 | output: &::I32x4, | |
e9174d1e SL |
1448 | definition: Named("llvm.aarch64.neon.vsli.v4i32") |
1449 | }, | |
1450 | "sliq_u32" => Intrinsic { | |
54a0048b SL |
1451 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
1452 | output: &::U32x4, | |
e9174d1e SL |
1453 | definition: Named("llvm.aarch64.neon.vsli.v4i32") |
1454 | }, | |
1455 | "sliq_s64" => Intrinsic { | |
54a0048b SL |
1456 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
1457 | output: &::I64x2, | |
e9174d1e SL |
1458 | definition: Named("llvm.aarch64.neon.vsli.v2i64") |
1459 | }, | |
1460 | "sliq_u64" => Intrinsic { | |
54a0048b SL |
1461 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
1462 | output: &::U64x2, | |
e9174d1e SL |
1463 | definition: Named("llvm.aarch64.neon.vsli.v2i64") |
1464 | }, | |
1465 | "vqmovn_s16" => Intrinsic { | |
54a0048b SL |
1466 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
1467 | output: &::I8x8, | |
e9174d1e SL |
1468 | definition: Named("llvm.aarch64.neon.sqxtn.v8i8") |
1469 | }, | |
1470 | "vqmovn_u16" => Intrinsic { | |
54a0048b SL |
1471 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
1472 | output: &::U8x8, | |
e9174d1e SL |
1473 | definition: Named("llvm.aarch64.neon.uqxtn.v8i8") |
1474 | }, | |
1475 | "vqmovn_s32" => Intrinsic { | |
54a0048b SL |
1476 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
1477 | output: &::I16x4, | |
e9174d1e SL |
1478 | definition: Named("llvm.aarch64.neon.sqxtn.v4i16") |
1479 | }, | |
1480 | "vqmovn_u32" => Intrinsic { | |
54a0048b SL |
1481 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
1482 | output: &::U16x4, | |
e9174d1e SL |
1483 | definition: Named("llvm.aarch64.neon.uqxtn.v4i16") |
1484 | }, | |
1485 | "vqmovn_s64" => Intrinsic { | |
54a0048b SL |
1486 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x2]; &INPUTS }, |
1487 | output: &::I32x2, | |
e9174d1e SL |
1488 | definition: Named("llvm.aarch64.neon.sqxtn.v2i32") |
1489 | }, | |
1490 | "vqmovn_u64" => Intrinsic { | |
54a0048b SL |
1491 | inputs: { static INPUTS: [&'static Type; 1] = [&::U64x2]; &INPUTS }, |
1492 | output: &::U32x2, | |
e9174d1e SL |
1493 | definition: Named("llvm.aarch64.neon.uqxtn.v2i32") |
1494 | }, | |
1495 | "abs_s8" => Intrinsic { | |
54a0048b SL |
1496 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
1497 | output: &::I8x8, | |
e9174d1e SL |
1498 | definition: Named("llvm.aarch64.neon.abs.v8i8") |
1499 | }, | |
1500 | "abs_s16" => Intrinsic { | |
54a0048b SL |
1501 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
1502 | output: &::I16x4, | |
e9174d1e SL |
1503 | definition: Named("llvm.aarch64.neon.abs.v4i16") |
1504 | }, | |
1505 | "abs_s32" => Intrinsic { | |
54a0048b SL |
1506 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
1507 | output: &::I32x2, | |
e9174d1e SL |
1508 | definition: Named("llvm.aarch64.neon.abs.v2i32") |
1509 | }, | |
1510 | "abs_s64" => Intrinsic { | |
54a0048b SL |
1511 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x1]; &INPUTS }, |
1512 | output: &::I64x1, | |
e9174d1e SL |
1513 | definition: Named("llvm.aarch64.neon.abs.v1i64") |
1514 | }, | |
1515 | "absq_s8" => Intrinsic { | |
54a0048b SL |
1516 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
1517 | output: &::I8x16, | |
e9174d1e SL |
1518 | definition: Named("llvm.aarch64.neon.abs.v16i8") |
1519 | }, | |
1520 | "absq_s16" => Intrinsic { | |
54a0048b SL |
1521 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
1522 | output: &::I16x8, | |
e9174d1e SL |
1523 | definition: Named("llvm.aarch64.neon.abs.v8i16") |
1524 | }, | |
1525 | "absq_s32" => Intrinsic { | |
54a0048b SL |
1526 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
1527 | output: &::I32x4, | |
e9174d1e SL |
1528 | definition: Named("llvm.aarch64.neon.abs.v4i32") |
1529 | }, | |
1530 | "absq_s64" => Intrinsic { | |
54a0048b SL |
1531 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x2]; &INPUTS }, |
1532 | output: &::I64x2, | |
e9174d1e SL |
1533 | definition: Named("llvm.aarch64.neon.abs.v2i64") |
1534 | }, | |
1535 | "abs_f32" => Intrinsic { | |
54a0048b SL |
1536 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
1537 | output: &::F32x2, | |
e9174d1e SL |
1538 | definition: Named("llvm.fabs.v2f32") |
1539 | }, | |
1540 | "abs_f64" => Intrinsic { | |
54a0048b SL |
1541 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x1]; &INPUTS }, |
1542 | output: &::F64x1, | |
e9174d1e SL |
1543 | definition: Named("llvm.fabs.v1f64") |
1544 | }, | |
1545 | "absq_f32" => Intrinsic { | |
54a0048b SL |
1546 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
1547 | output: &::F32x4, | |
e9174d1e SL |
1548 | definition: Named("llvm.fabs.v4f32") |
1549 | }, | |
1550 | "absq_f64" => Intrinsic { | |
54a0048b SL |
1551 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
1552 | output: &::F64x2, | |
e9174d1e SL |
1553 | definition: Named("llvm.fabs.v2f64") |
1554 | }, | |
1555 | "qabs_s8" => Intrinsic { | |
54a0048b SL |
1556 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
1557 | output: &::I8x8, | |
e9174d1e SL |
1558 | definition: Named("llvm.aarch64.neon.sqabs.v8i8") |
1559 | }, | |
1560 | "qabs_s16" => Intrinsic { | |
54a0048b SL |
1561 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
1562 | output: &::I16x4, | |
e9174d1e SL |
1563 | definition: Named("llvm.aarch64.neon.sqabs.v4i16") |
1564 | }, | |
1565 | "qabs_s32" => Intrinsic { | |
54a0048b SL |
1566 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
1567 | output: &::I32x2, | |
e9174d1e SL |
1568 | definition: Named("llvm.aarch64.neon.sqabs.v2i32") |
1569 | }, | |
1570 | "qabs_s64" => Intrinsic { | |
54a0048b SL |
1571 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x1]; &INPUTS }, |
1572 | output: &::I64x1, | |
e9174d1e SL |
1573 | definition: Named("llvm.aarch64.neon.sqabs.v1i64") |
1574 | }, | |
1575 | "qabsq_s8" => Intrinsic { | |
54a0048b SL |
1576 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
1577 | output: &::I8x16, | |
e9174d1e SL |
1578 | definition: Named("llvm.aarch64.neon.sqabs.v16i8") |
1579 | }, | |
1580 | "qabsq_s16" => Intrinsic { | |
54a0048b SL |
1581 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
1582 | output: &::I16x8, | |
e9174d1e SL |
1583 | definition: Named("llvm.aarch64.neon.sqabs.v8i16") |
1584 | }, | |
1585 | "qabsq_s32" => Intrinsic { | |
54a0048b SL |
1586 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
1587 | output: &::I32x4, | |
e9174d1e SL |
1588 | definition: Named("llvm.aarch64.neon.sqabs.v4i32") |
1589 | }, | |
1590 | "qabsq_s64" => Intrinsic { | |
54a0048b SL |
1591 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x2]; &INPUTS }, |
1592 | output: &::I64x2, | |
e9174d1e SL |
1593 | definition: Named("llvm.aarch64.neon.sqabs.v2i64") |
1594 | }, | |
1595 | "qneg_s8" => Intrinsic { | |
54a0048b SL |
1596 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
1597 | output: &::I8x8, | |
e9174d1e SL |
1598 | definition: Named("llvm.aarch64.neon.sqneg.v8i8") |
1599 | }, | |
1600 | "qneg_s16" => Intrinsic { | |
54a0048b SL |
1601 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
1602 | output: &::I16x4, | |
e9174d1e SL |
1603 | definition: Named("llvm.aarch64.neon.sqneg.v4i16") |
1604 | }, | |
1605 | "qneg_s32" => Intrinsic { | |
54a0048b SL |
1606 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
1607 | output: &::I32x2, | |
e9174d1e SL |
1608 | definition: Named("llvm.aarch64.neon.sqneg.v2i32") |
1609 | }, | |
1610 | "qneg_s64" => Intrinsic { | |
54a0048b SL |
1611 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x1]; &INPUTS }, |
1612 | output: &::I64x1, | |
e9174d1e SL |
1613 | definition: Named("llvm.aarch64.neon.sqneg.v1i64") |
1614 | }, | |
1615 | "qnegq_s8" => Intrinsic { | |
54a0048b SL |
1616 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
1617 | output: &::I8x16, | |
e9174d1e SL |
1618 | definition: Named("llvm.aarch64.neon.sqneg.v16i8") |
1619 | }, | |
1620 | "qnegq_s16" => Intrinsic { | |
54a0048b SL |
1621 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
1622 | output: &::I16x8, | |
e9174d1e SL |
1623 | definition: Named("llvm.aarch64.neon.sqneg.v8i16") |
1624 | }, | |
1625 | "qnegq_s32" => Intrinsic { | |
54a0048b SL |
1626 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
1627 | output: &::I32x4, | |
e9174d1e SL |
1628 | definition: Named("llvm.aarch64.neon.sqneg.v4i32") |
1629 | }, | |
1630 | "qnegq_s64" => Intrinsic { | |
54a0048b SL |
1631 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x2]; &INPUTS }, |
1632 | output: &::I64x2, | |
e9174d1e SL |
1633 | definition: Named("llvm.aarch64.neon.sqneg.v2i64") |
1634 | }, | |
1635 | "clz_s8" => Intrinsic { | |
54a0048b SL |
1636 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
1637 | output: &::I8x8, | |
e9174d1e SL |
1638 | definition: Named("llvm.ctlz.v8i8") |
1639 | }, | |
1640 | "clz_u8" => Intrinsic { | |
54a0048b SL |
1641 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
1642 | output: &::U8x8, | |
e9174d1e SL |
1643 | definition: Named("llvm.ctlz.v8i8") |
1644 | }, | |
1645 | "clz_s16" => Intrinsic { | |
54a0048b SL |
1646 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
1647 | output: &::I16x4, | |
e9174d1e SL |
1648 | definition: Named("llvm.ctlz.v4i16") |
1649 | }, | |
1650 | "clz_u16" => Intrinsic { | |
54a0048b SL |
1651 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x4]; &INPUTS }, |
1652 | output: &::U16x4, | |
e9174d1e SL |
1653 | definition: Named("llvm.ctlz.v4i16") |
1654 | }, | |
1655 | "clz_s32" => Intrinsic { | |
54a0048b SL |
1656 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
1657 | output: &::I32x2, | |
e9174d1e SL |
1658 | definition: Named("llvm.ctlz.v2i32") |
1659 | }, | |
1660 | "clz_u32" => Intrinsic { | |
54a0048b SL |
1661 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
1662 | output: &::U32x2, | |
e9174d1e SL |
1663 | definition: Named("llvm.ctlz.v2i32") |
1664 | }, | |
1665 | "clzq_s8" => Intrinsic { | |
54a0048b SL |
1666 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
1667 | output: &::I8x16, | |
e9174d1e SL |
1668 | definition: Named("llvm.ctlz.v16i8") |
1669 | }, | |
1670 | "clzq_u8" => Intrinsic { | |
54a0048b SL |
1671 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
1672 | output: &::U8x16, | |
e9174d1e SL |
1673 | definition: Named("llvm.ctlz.v16i8") |
1674 | }, | |
1675 | "clzq_s16" => Intrinsic { | |
54a0048b SL |
1676 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
1677 | output: &::I16x8, | |
e9174d1e SL |
1678 | definition: Named("llvm.ctlz.v8i16") |
1679 | }, | |
1680 | "clzq_u16" => Intrinsic { | |
54a0048b SL |
1681 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
1682 | output: &::U16x8, | |
e9174d1e SL |
1683 | definition: Named("llvm.ctlz.v8i16") |
1684 | }, | |
1685 | "clzq_s32" => Intrinsic { | |
54a0048b SL |
1686 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
1687 | output: &::I32x4, | |
e9174d1e SL |
1688 | definition: Named("llvm.ctlz.v4i32") |
1689 | }, | |
1690 | "clzq_u32" => Intrinsic { | |
54a0048b SL |
1691 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
1692 | output: &::U32x4, | |
e9174d1e SL |
1693 | definition: Named("llvm.ctlz.v4i32") |
1694 | }, | |
1695 | "cls_s8" => Intrinsic { | |
54a0048b SL |
1696 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
1697 | output: &::I8x8, | |
e9174d1e SL |
1698 | definition: Named("llvm.aarch64.neon.cls.v8i8") |
1699 | }, | |
1700 | "cls_u8" => Intrinsic { | |
54a0048b SL |
1701 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
1702 | output: &::U8x8, | |
e9174d1e SL |
1703 | definition: Named("llvm.aarch64.neon.cls.v8i8") |
1704 | }, | |
1705 | "cls_s16" => Intrinsic { | |
54a0048b SL |
1706 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
1707 | output: &::I16x4, | |
e9174d1e SL |
1708 | definition: Named("llvm.aarch64.neon.cls.v4i16") |
1709 | }, | |
1710 | "cls_u16" => Intrinsic { | |
54a0048b SL |
1711 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x4]; &INPUTS }, |
1712 | output: &::U16x4, | |
e9174d1e SL |
1713 | definition: Named("llvm.aarch64.neon.cls.v4i16") |
1714 | }, | |
1715 | "cls_s32" => Intrinsic { | |
54a0048b SL |
1716 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
1717 | output: &::I32x2, | |
e9174d1e SL |
1718 | definition: Named("llvm.aarch64.neon.cls.v2i32") |
1719 | }, | |
1720 | "cls_u32" => Intrinsic { | |
54a0048b SL |
1721 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
1722 | output: &::U32x2, | |
e9174d1e SL |
1723 | definition: Named("llvm.aarch64.neon.cls.v2i32") |
1724 | }, | |
1725 | "clsq_s8" => Intrinsic { | |
54a0048b SL |
1726 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
1727 | output: &::I8x16, | |
e9174d1e SL |
1728 | definition: Named("llvm.aarch64.neon.cls.v16i8") |
1729 | }, | |
1730 | "clsq_u8" => Intrinsic { | |
54a0048b SL |
1731 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
1732 | output: &::U8x16, | |
e9174d1e SL |
1733 | definition: Named("llvm.aarch64.neon.cls.v16i8") |
1734 | }, | |
1735 | "clsq_s16" => Intrinsic { | |
54a0048b SL |
1736 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
1737 | output: &::I16x8, | |
e9174d1e SL |
1738 | definition: Named("llvm.aarch64.neon.cls.v8i16") |
1739 | }, | |
1740 | "clsq_u16" => Intrinsic { | |
54a0048b SL |
1741 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
1742 | output: &::U16x8, | |
e9174d1e SL |
1743 | definition: Named("llvm.aarch64.neon.cls.v8i16") |
1744 | }, | |
1745 | "clsq_s32" => Intrinsic { | |
54a0048b SL |
1746 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
1747 | output: &::I32x4, | |
e9174d1e SL |
1748 | definition: Named("llvm.aarch64.neon.cls.v4i32") |
1749 | }, | |
1750 | "clsq_u32" => Intrinsic { | |
54a0048b SL |
1751 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
1752 | output: &::U32x4, | |
e9174d1e SL |
1753 | definition: Named("llvm.aarch64.neon.cls.v4i32") |
1754 | }, | |
1755 | "cnt_s8" => Intrinsic { | |
54a0048b SL |
1756 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
1757 | output: &::I8x8, | |
e9174d1e SL |
1758 | definition: Named("llvm.ctpop.v8i8") |
1759 | }, | |
1760 | "cnt_u8" => Intrinsic { | |
54a0048b SL |
1761 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
1762 | output: &::U8x8, | |
e9174d1e SL |
1763 | definition: Named("llvm.ctpop.v8i8") |
1764 | }, | |
1765 | "cntq_s8" => Intrinsic { | |
54a0048b SL |
1766 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
1767 | output: &::I8x16, | |
e9174d1e SL |
1768 | definition: Named("llvm.ctpop.v16i8") |
1769 | }, | |
1770 | "cntq_u8" => Intrinsic { | |
54a0048b SL |
1771 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
1772 | output: &::U8x16, | |
e9174d1e SL |
1773 | definition: Named("llvm.ctpop.v16i8") |
1774 | }, | |
1775 | "recpe_u32" => Intrinsic { | |
54a0048b SL |
1776 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
1777 | output: &::U32x2, | |
e9174d1e SL |
1778 | definition: Named("llvm.aarch64.neon.urecpe.v2i32") |
1779 | }, | |
1780 | "recpe_f32" => Intrinsic { | |
54a0048b SL |
1781 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
1782 | output: &::F32x2, | |
e9174d1e SL |
1783 | definition: Named("llvm.aarch64.neon.frecpe.v2f32") |
1784 | }, | |
1785 | "recpe_f64" => Intrinsic { | |
54a0048b SL |
1786 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x1]; &INPUTS }, |
1787 | output: &::F64x1, | |
e9174d1e SL |
1788 | definition: Named("llvm.aarch64.neon.frecpe.v1f64") |
1789 | }, | |
1790 | "recpeq_u32" => Intrinsic { | |
54a0048b SL |
1791 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
1792 | output: &::U32x4, | |
e9174d1e SL |
1793 | definition: Named("llvm.aarch64.neon.urecpe.v4i32") |
1794 | }, | |
1795 | "recpeq_f32" => Intrinsic { | |
54a0048b SL |
1796 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
1797 | output: &::F32x4, | |
e9174d1e SL |
1798 | definition: Named("llvm.aarch64.neon.frecpe.v4f32") |
1799 | }, | |
1800 | "recpeq_f64" => Intrinsic { | |
54a0048b SL |
1801 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
1802 | output: &::F64x2, | |
e9174d1e SL |
1803 | definition: Named("llvm.aarch64.neon.frecpe.v2f64") |
1804 | }, | |
1805 | "recps_f32" => Intrinsic { | |
54a0048b SL |
1806 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
1807 | output: &::F32x2, | |
e9174d1e SL |
1808 | definition: Named("llvm.aarch64.neon.frecps.v2f32") |
1809 | }, | |
1810 | "recps_f64" => Intrinsic { | |
54a0048b SL |
1811 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
1812 | output: &::F64x1, | |
e9174d1e SL |
1813 | definition: Named("llvm.aarch64.neon.frecps.v1f64") |
1814 | }, | |
1815 | "recpsq_f32" => Intrinsic { | |
54a0048b SL |
1816 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
1817 | output: &::F32x4, | |
e9174d1e SL |
1818 | definition: Named("llvm.aarch64.neon.frecps.v4f32") |
1819 | }, | |
1820 | "recpsq_f64" => Intrinsic { | |
54a0048b SL |
1821 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
1822 | output: &::F64x2, | |
e9174d1e SL |
1823 | definition: Named("llvm.aarch64.neon.frecps.v2f64") |
1824 | }, | |
1825 | "sqrt_f32" => Intrinsic { | |
54a0048b SL |
1826 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
1827 | output: &::F32x2, | |
e9174d1e SL |
1828 | definition: Named("llvm.sqrt.v2f32") |
1829 | }, | |
1830 | "sqrt_f64" => Intrinsic { | |
54a0048b SL |
1831 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x1]; &INPUTS }, |
1832 | output: &::F64x1, | |
e9174d1e SL |
1833 | definition: Named("llvm.sqrt.v1f64") |
1834 | }, | |
1835 | "sqrtq_f32" => Intrinsic { | |
54a0048b SL |
1836 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
1837 | output: &::F32x4, | |
e9174d1e SL |
1838 | definition: Named("llvm.sqrt.v4f32") |
1839 | }, | |
1840 | "sqrtq_f64" => Intrinsic { | |
54a0048b SL |
1841 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
1842 | output: &::F64x2, | |
e9174d1e SL |
1843 | definition: Named("llvm.sqrt.v2f64") |
1844 | }, | |
1845 | "rsqrte_u32" => Intrinsic { | |
54a0048b SL |
1846 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
1847 | output: &::U32x2, | |
e9174d1e SL |
1848 | definition: Named("llvm.aarch64.neon.ursqrte.v2i32") |
1849 | }, | |
1850 | "rsqrte_f32" => Intrinsic { | |
54a0048b SL |
1851 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
1852 | output: &::F32x2, | |
e9174d1e SL |
1853 | definition: Named("llvm.aarch64.neon.frsqrte.v2f32") |
1854 | }, | |
1855 | "rsqrte_f64" => Intrinsic { | |
54a0048b SL |
1856 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x1]; &INPUTS }, |
1857 | output: &::F64x1, | |
e9174d1e SL |
1858 | definition: Named("llvm.aarch64.neon.frsqrte.v1f64") |
1859 | }, | |
1860 | "rsqrteq_u32" => Intrinsic { | |
54a0048b SL |
1861 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
1862 | output: &::U32x4, | |
e9174d1e SL |
1863 | definition: Named("llvm.aarch64.neon.ursqrte.v4i32") |
1864 | }, | |
1865 | "rsqrteq_f32" => Intrinsic { | |
54a0048b SL |
1866 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
1867 | output: &::F32x4, | |
e9174d1e SL |
1868 | definition: Named("llvm.aarch64.neon.frsqrte.v4f32") |
1869 | }, | |
1870 | "rsqrteq_f64" => Intrinsic { | |
54a0048b SL |
1871 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
1872 | output: &::F64x2, | |
e9174d1e SL |
1873 | definition: Named("llvm.aarch64.neon.frsqrte.v2f64") |
1874 | }, | |
1875 | "rsqrts_f32" => Intrinsic { | |
54a0048b SL |
1876 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
1877 | output: &::F32x2, | |
e9174d1e SL |
1878 | definition: Named("llvm.aarch64.neon.frsqrts.v2f32") |
1879 | }, | |
1880 | "rsqrts_f64" => Intrinsic { | |
54a0048b SL |
1881 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &INPUTS }, |
1882 | output: &::F64x1, | |
e9174d1e SL |
1883 | definition: Named("llvm.aarch64.neon.frsqrts.v1f64") |
1884 | }, | |
1885 | "rsqrtsq_f32" => Intrinsic { | |
54a0048b SL |
1886 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
1887 | output: &::F32x4, | |
e9174d1e SL |
1888 | definition: Named("llvm.aarch64.neon.frsqrts.v4f32") |
1889 | }, | |
1890 | "rsqrtsq_f64" => Intrinsic { | |
54a0048b SL |
1891 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
1892 | output: &::F64x2, | |
e9174d1e SL |
1893 | definition: Named("llvm.aarch64.neon.frsqrts.v2f64") |
1894 | }, | |
1895 | "rbit_s8" => Intrinsic { | |
54a0048b SL |
1896 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
1897 | output: &::I8x8, | |
e9174d1e SL |
1898 | definition: Named("llvm.aarch64.neon.rbit.v8i8") |
1899 | }, | |
1900 | "rbit_u8" => Intrinsic { | |
54a0048b SL |
1901 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
1902 | output: &::U8x8, | |
e9174d1e SL |
1903 | definition: Named("llvm.aarch64.neon.rbit.v8i8") |
1904 | }, | |
1905 | "rbitq_s8" => Intrinsic { | |
54a0048b SL |
1906 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
1907 | output: &::I8x16, | |
e9174d1e SL |
1908 | definition: Named("llvm.aarch64.neon.rbit.v16i8") |
1909 | }, | |
1910 | "rbitq_u8" => Intrinsic { | |
54a0048b SL |
1911 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
1912 | output: &::U8x16, | |
e9174d1e SL |
1913 | definition: Named("llvm.aarch64.neon.rbit.v16i8") |
1914 | }, | |
1915 | "ld2_s8" => Intrinsic { | |
54a0048b SL |
1916 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, Some(&::I8x8), true); &PTR }]; &INPUTS }, |
1917 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
1918 | definition: Named("llvm.aarch64.neon.ld2.v8i8.p0v8i8") |
1919 | }, | |
1920 | "ld2_u8" => Intrinsic { | |
54a0048b SL |
1921 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, Some(&::U8x8), true); &PTR }]; &INPUTS }, |
1922 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
1923 | definition: Named("llvm.aarch64.neon.ld2.v8i8.p0v8i8") |
1924 | }, | |
1925 | "ld2_s16" => Intrinsic { | |
54a0048b SL |
1926 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, Some(&::I16x4), true); &PTR }]; &INPUTS }, |
1927 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
1928 | definition: Named("llvm.aarch64.neon.ld2.v4i16.p0v4i16") |
1929 | }, | |
1930 | "ld2_u16" => Intrinsic { | |
54a0048b SL |
1931 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, Some(&::U16x4), true); &PTR }]; &INPUTS }, |
1932 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
1933 | definition: Named("llvm.aarch64.neon.ld2.v4i16.p0v4i16") |
1934 | }, | |
1935 | "ld2_s32" => Intrinsic { | |
54a0048b SL |
1936 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, Some(&::I32x2), true); &PTR }]; &INPUTS }, |
1937 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
1938 | definition: Named("llvm.aarch64.neon.ld2.v2i32.p0v2i32") |
1939 | }, | |
1940 | "ld2_u32" => Intrinsic { | |
54a0048b SL |
1941 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, Some(&::U32x2), true); &PTR }]; &INPUTS }, |
1942 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
1943 | definition: Named("llvm.aarch64.neon.ld2.v2i32.p0v2i32") |
1944 | }, | |
1945 | "ld2_s64" => Intrinsic { | |
54a0048b SL |
1946 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, Some(&::I64x1), true); &PTR }]; &INPUTS }, |
1947 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
1948 | definition: Named("llvm.aarch64.neon.ld2.v1i64.p0v1i64") |
1949 | }, | |
1950 | "ld2_u64" => Intrinsic { | |
54a0048b SL |
1951 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, Some(&::U64x1), true); &PTR }]; &INPUTS }, |
1952 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U64x1, &::U64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
1953 | definition: Named("llvm.aarch64.neon.ld2.v1i64.p0v1i64") |
1954 | }, | |
1955 | "ld2_f32" => Intrinsic { | |
54a0048b SL |
1956 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, Some(&::F32x2), true); &PTR }]; &INPUTS }, |
1957 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
1958 | definition: Named("llvm.aarch64.neon.ld2.v2f32.p0v2f32") |
1959 | }, | |
1960 | "ld2_f64" => Intrinsic { | |
54a0048b SL |
1961 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, Some(&::F64x1), true); &PTR }]; &INPUTS }, |
1962 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
1963 | definition: Named("llvm.aarch64.neon.ld2.v1f64.p0v1f64") |
1964 | }, | |
1965 | "ld2q_s8" => Intrinsic { | |
54a0048b SL |
1966 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, Some(&::I8x16), true); &PTR }]; &INPUTS }, |
1967 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
1968 | definition: Named("llvm.aarch64.neon.ld2.v16i8.p0v16i8") |
1969 | }, | |
1970 | "ld2q_u8" => Intrinsic { | |
54a0048b SL |
1971 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, Some(&::U8x16), true); &PTR }]; &INPUTS }, |
1972 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
1973 | definition: Named("llvm.aarch64.neon.ld2.v16i8.p0v16i8") |
1974 | }, | |
1975 | "ld2q_s16" => Intrinsic { | |
54a0048b SL |
1976 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, Some(&::I16x8), true); &PTR }]; &INPUTS }, |
1977 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
1978 | definition: Named("llvm.aarch64.neon.ld2.v8i16.p0v8i16") |
1979 | }, | |
1980 | "ld2q_u16" => Intrinsic { | |
54a0048b SL |
1981 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, Some(&::U16x8), true); &PTR }]; &INPUTS }, |
1982 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
1983 | definition: Named("llvm.aarch64.neon.ld2.v8i16.p0v8i16") |
1984 | }, | |
1985 | "ld2q_s32" => Intrinsic { | |
54a0048b SL |
1986 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, Some(&::I32x4), true); &PTR }]; &INPUTS }, |
1987 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
1988 | definition: Named("llvm.aarch64.neon.ld2.v4i32.p0v4i32") |
1989 | }, | |
1990 | "ld2q_u32" => Intrinsic { | |
54a0048b SL |
1991 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, Some(&::U32x4), true); &PTR }]; &INPUTS }, |
1992 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
1993 | definition: Named("llvm.aarch64.neon.ld2.v4i32.p0v4i32") |
1994 | }, | |
1995 | "ld2q_s64" => Intrinsic { | |
54a0048b SL |
1996 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, Some(&::I64x2), true); &PTR }]; &INPUTS }, |
1997 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
1998 | definition: Named("llvm.aarch64.neon.ld2.v2i64.p0v2i64") |
1999 | }, | |
2000 | "ld2q_u64" => Intrinsic { | |
54a0048b SL |
2001 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, Some(&::U64x2), true); &PTR }]; &INPUTS }, |
2002 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2003 | definition: Named("llvm.aarch64.neon.ld2.v2i64.p0v2i64") |
2004 | }, | |
2005 | "ld2q_f32" => Intrinsic { | |
54a0048b SL |
2006 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, Some(&::F32x4), true); &PTR }]; &INPUTS }, |
2007 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2008 | definition: Named("llvm.aarch64.neon.ld2.v4f32.p0v4f32") |
2009 | }, | |
2010 | "ld2q_f64" => Intrinsic { | |
54a0048b SL |
2011 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, Some(&::F64x2), true); &PTR }]; &INPUTS }, |
2012 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2013 | definition: Named("llvm.aarch64.neon.ld2.v2f64.p0v2f64") |
2014 | }, | |
2015 | "ld3_s8" => Intrinsic { | |
54a0048b SL |
2016 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, Some(&::I8x8), true); &PTR }]; &INPUTS }, |
2017 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I8x8, &::I8x8, &::I8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2018 | definition: Named("llvm.aarch64.neon.ld3.v8i8.p0v8i8") |
2019 | }, | |
2020 | "ld3_u8" => Intrinsic { | |
54a0048b SL |
2021 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, Some(&::U8x8), true); &PTR }]; &INPUTS }, |
2022 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U8x8, &::U8x8, &::U8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2023 | definition: Named("llvm.aarch64.neon.ld3.v8i8.p0v8i8") |
2024 | }, | |
2025 | "ld3_s16" => Intrinsic { | |
54a0048b SL |
2026 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, Some(&::I16x4), true); &PTR }]; &INPUTS }, |
2027 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I16x4, &::I16x4, &::I16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2028 | definition: Named("llvm.aarch64.neon.ld3.v4i16.p0v4i16") |
2029 | }, | |
2030 | "ld3_u16" => Intrinsic { | |
54a0048b SL |
2031 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, Some(&::U16x4), true); &PTR }]; &INPUTS }, |
2032 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U16x4, &::U16x4, &::U16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2033 | definition: Named("llvm.aarch64.neon.ld3.v4i16.p0v4i16") |
2034 | }, | |
2035 | "ld3_s32" => Intrinsic { | |
54a0048b SL |
2036 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, Some(&::I32x2), true); &PTR }]; &INPUTS }, |
2037 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I32x2, &::I32x2, &::I32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2038 | definition: Named("llvm.aarch64.neon.ld3.v2i32.p0v2i32") |
2039 | }, | |
2040 | "ld3_u32" => Intrinsic { | |
54a0048b SL |
2041 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, Some(&::U32x2), true); &PTR }]; &INPUTS }, |
2042 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U32x2, &::U32x2, &::U32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2043 | definition: Named("llvm.aarch64.neon.ld3.v2i32.p0v2i32") |
2044 | }, | |
2045 | "ld3_s64" => Intrinsic { | |
54a0048b SL |
2046 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, Some(&::I64x1), true); &PTR }]; &INPUTS }, |
2047 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I64x1, &::I64x1, &::I64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2048 | definition: Named("llvm.aarch64.neon.ld3.v1i64.p0v1i64") |
2049 | }, | |
2050 | "ld3_u64" => Intrinsic { | |
54a0048b SL |
2051 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, Some(&::U64x1), true); &PTR }]; &INPUTS }, |
2052 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U64x1, &::U64x1, &::U64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2053 | definition: Named("llvm.aarch64.neon.ld3.v1i64.p0v1i64") |
2054 | }, | |
2055 | "ld3_f32" => Intrinsic { | |
54a0048b SL |
2056 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, Some(&::F32x2), true); &PTR }]; &INPUTS }, |
2057 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F32x2, &::F32x2, &::F32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2058 | definition: Named("llvm.aarch64.neon.ld3.v2f32.p0v2f32") |
2059 | }, | |
2060 | "ld3_f64" => Intrinsic { | |
54a0048b SL |
2061 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, Some(&::F64x1), true); &PTR }]; &INPUTS }, |
2062 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F64x1, &::F64x1, &::F64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2063 | definition: Named("llvm.aarch64.neon.ld3.v1f64.p0v1f64") |
2064 | }, | |
2065 | "ld3q_s8" => Intrinsic { | |
54a0048b SL |
2066 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, Some(&::I8x16), true); &PTR }]; &INPUTS }, |
2067 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2068 | definition: Named("llvm.aarch64.neon.ld3.v16i8.p0v16i8") |
2069 | }, | |
2070 | "ld3q_u8" => Intrinsic { | |
54a0048b SL |
2071 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, Some(&::U8x16), true); &PTR }]; &INPUTS }, |
2072 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2073 | definition: Named("llvm.aarch64.neon.ld3.v16i8.p0v16i8") |
2074 | }, | |
2075 | "ld3q_s16" => Intrinsic { | |
54a0048b SL |
2076 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, Some(&::I16x8), true); &PTR }]; &INPUTS }, |
2077 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2078 | definition: Named("llvm.aarch64.neon.ld3.v8i16.p0v8i16") |
2079 | }, | |
2080 | "ld3q_u16" => Intrinsic { | |
54a0048b SL |
2081 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, Some(&::U16x8), true); &PTR }]; &INPUTS }, |
2082 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2083 | definition: Named("llvm.aarch64.neon.ld3.v8i16.p0v8i16") |
2084 | }, | |
2085 | "ld3q_s32" => Intrinsic { | |
54a0048b SL |
2086 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, Some(&::I32x4), true); &PTR }]; &INPUTS }, |
2087 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2088 | definition: Named("llvm.aarch64.neon.ld3.v4i32.p0v4i32") |
2089 | }, | |
2090 | "ld3q_u32" => Intrinsic { | |
54a0048b SL |
2091 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, Some(&::U32x4), true); &PTR }]; &INPUTS }, |
2092 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U32x4, &::U32x4, &::U32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2093 | definition: Named("llvm.aarch64.neon.ld3.v4i32.p0v4i32") |
2094 | }, | |
2095 | "ld3q_s64" => Intrinsic { | |
54a0048b SL |
2096 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, Some(&::I64x2), true); &PTR }]; &INPUTS }, |
2097 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I64x2, &::I64x2, &::I64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2098 | definition: Named("llvm.aarch64.neon.ld3.v2i64.p0v2i64") |
2099 | }, | |
2100 | "ld3q_u64" => Intrinsic { | |
54a0048b SL |
2101 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, Some(&::U64x2), true); &PTR }]; &INPUTS }, |
2102 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U64x2, &::U64x2, &::U64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2103 | definition: Named("llvm.aarch64.neon.ld3.v2i64.p0v2i64") |
2104 | }, | |
2105 | "ld3q_f32" => Intrinsic { | |
54a0048b SL |
2106 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, Some(&::F32x4), true); &PTR }]; &INPUTS }, |
2107 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2108 | definition: Named("llvm.aarch64.neon.ld3.v4f32.p0v4f32") |
2109 | }, | |
2110 | "ld3q_f64" => Intrinsic { | |
54a0048b SL |
2111 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, Some(&::F64x2), true); &PTR }]; &INPUTS }, |
2112 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F64x2, &::F64x2, &::F64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2113 | definition: Named("llvm.aarch64.neon.ld3.v2f64.p0v2f64") |
2114 | }, | |
2115 | "ld4_s8" => Intrinsic { | |
54a0048b SL |
2116 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, Some(&::I8x8), true); &PTR }]; &INPUTS }, |
2117 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I8x8, &::I8x8, &::I8x8, &::I8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2118 | definition: Named("llvm.aarch64.neon.ld4.v8i8.p0v8i8") |
2119 | }, | |
2120 | "ld4_u8" => Intrinsic { | |
54a0048b SL |
2121 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, Some(&::U8x8), true); &PTR }]; &INPUTS }, |
2122 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U8x8, &::U8x8, &::U8x8, &::U8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2123 | definition: Named("llvm.aarch64.neon.ld4.v8i8.p0v8i8") |
2124 | }, | |
2125 | "ld4_s16" => Intrinsic { | |
54a0048b SL |
2126 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, Some(&::I16x4), true); &PTR }]; &INPUTS }, |
2127 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I16x4, &::I16x4, &::I16x4, &::I16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2128 | definition: Named("llvm.aarch64.neon.ld4.v4i16.p0v4i16") |
2129 | }, | |
2130 | "ld4_u16" => Intrinsic { | |
54a0048b SL |
2131 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, Some(&::U16x4), true); &PTR }]; &INPUTS }, |
2132 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U16x4, &::U16x4, &::U16x4, &::U16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2133 | definition: Named("llvm.aarch64.neon.ld4.v4i16.p0v4i16") |
2134 | }, | |
2135 | "ld4_s32" => Intrinsic { | |
54a0048b SL |
2136 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, Some(&::I32x2), true); &PTR }]; &INPUTS }, |
2137 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I32x2, &::I32x2, &::I32x2, &::I32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2138 | definition: Named("llvm.aarch64.neon.ld4.v2i32.p0v2i32") |
2139 | }, | |
2140 | "ld4_u32" => Intrinsic { | |
54a0048b SL |
2141 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, Some(&::U32x2), true); &PTR }]; &INPUTS }, |
2142 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U32x2, &::U32x2, &::U32x2, &::U32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2143 | definition: Named("llvm.aarch64.neon.ld4.v2i32.p0v2i32") |
2144 | }, | |
2145 | "ld4_s64" => Intrinsic { | |
54a0048b SL |
2146 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, Some(&::I64x1), true); &PTR }]; &INPUTS }, |
2147 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I64x1, &::I64x1, &::I64x1, &::I64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2148 | definition: Named("llvm.aarch64.neon.ld4.v1i64.p0v1i64") |
2149 | }, | |
2150 | "ld4_u64" => Intrinsic { | |
54a0048b SL |
2151 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, Some(&::U64x1), true); &PTR }]; &INPUTS }, |
2152 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U64x1, &::U64x1, &::U64x1, &::U64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2153 | definition: Named("llvm.aarch64.neon.ld4.v1i64.p0v1i64") |
2154 | }, | |
2155 | "ld4_f32" => Intrinsic { | |
54a0048b SL |
2156 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, Some(&::F32x2), true); &PTR }]; &INPUTS }, |
2157 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F32x2, &::F32x2, &::F32x2, &::F32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2158 | definition: Named("llvm.aarch64.neon.ld4.v2f32.p0v2f32") |
2159 | }, | |
2160 | "ld4_f64" => Intrinsic { | |
54a0048b SL |
2161 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, Some(&::F64x1), true); &PTR }]; &INPUTS }, |
2162 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F64x1, &::F64x1, &::F64x1, &::F64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2163 | definition: Named("llvm.aarch64.neon.ld4.v1f64.p0v1f64") |
2164 | }, | |
2165 | "ld4q_s8" => Intrinsic { | |
54a0048b SL |
2166 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, Some(&::I8x16), true); &PTR }]; &INPUTS }, |
2167 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I8x16, &::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2168 | definition: Named("llvm.aarch64.neon.ld4.v16i8.p0v16i8") |
2169 | }, | |
2170 | "ld4q_u8" => Intrinsic { | |
54a0048b SL |
2171 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, Some(&::U8x16), true); &PTR }]; &INPUTS }, |
2172 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U8x16, &::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2173 | definition: Named("llvm.aarch64.neon.ld4.v16i8.p0v16i8") |
2174 | }, | |
2175 | "ld4q_s16" => Intrinsic { | |
54a0048b SL |
2176 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, Some(&::I16x8), true); &PTR }]; &INPUTS }, |
2177 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I16x8, &::I16x8, &::I16x8, &::I16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2178 | definition: Named("llvm.aarch64.neon.ld4.v8i16.p0v8i16") |
2179 | }, | |
2180 | "ld4q_u16" => Intrinsic { | |
54a0048b SL |
2181 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, Some(&::U16x8), true); &PTR }]; &INPUTS }, |
2182 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U16x8, &::U16x8, &::U16x8, &::U16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2183 | definition: Named("llvm.aarch64.neon.ld4.v8i16.p0v8i16") |
2184 | }, | |
2185 | "ld4q_s32" => Intrinsic { | |
54a0048b SL |
2186 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, Some(&::I32x4), true); &PTR }]; &INPUTS }, |
2187 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I32x4, &::I32x4, &::I32x4, &::I32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2188 | definition: Named("llvm.aarch64.neon.ld4.v4i32.p0v4i32") |
2189 | }, | |
2190 | "ld4q_u32" => Intrinsic { | |
54a0048b SL |
2191 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, Some(&::U32x4), true); &PTR }]; &INPUTS }, |
2192 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U32x4, &::U32x4, &::U32x4, &::U32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2193 | definition: Named("llvm.aarch64.neon.ld4.v4i32.p0v4i32") |
2194 | }, | |
2195 | "ld4q_s64" => Intrinsic { | |
54a0048b SL |
2196 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, Some(&::I64x2), true); &PTR }]; &INPUTS }, |
2197 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I64x2, &::I64x2, &::I64x2, &::I64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2198 | definition: Named("llvm.aarch64.neon.ld4.v2i64.p0v2i64") |
2199 | }, | |
2200 | "ld4q_u64" => Intrinsic { | |
54a0048b SL |
2201 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, Some(&::U64x2), true); &PTR }]; &INPUTS }, |
2202 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U64x2, &::U64x2, &::U64x2, &::U64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2203 | definition: Named("llvm.aarch64.neon.ld4.v2i64.p0v2i64") |
2204 | }, | |
2205 | "ld4q_f32" => Intrinsic { | |
54a0048b SL |
2206 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, Some(&::F32x4), true); &PTR }]; &INPUTS }, |
2207 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F32x4, &::F32x4, &::F32x4, &::F32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2208 | definition: Named("llvm.aarch64.neon.ld4.v4f32.p0v4f32") |
2209 | }, | |
2210 | "ld4q_f64" => Intrinsic { | |
54a0048b SL |
2211 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, Some(&::F64x2), true); &PTR }]; &INPUTS }, |
2212 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F64x2, &::F64x2, &::F64x2, &::F64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2213 | definition: Named("llvm.aarch64.neon.ld4.v2f64.p0v2f64") |
2214 | }, | |
2215 | "ld2_dup_s8" => Intrinsic { | |
54a0048b SL |
2216 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, None, true); &PTR }]; &INPUTS }, |
2217 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2218 | definition: Named("llvm.aarch64.neon.ld2.v8i8.p0i8") |
2219 | }, | |
2220 | "ld2_dup_u8" => Intrinsic { | |
54a0048b SL |
2221 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, None, true); &PTR }]; &INPUTS }, |
2222 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2223 | definition: Named("llvm.aarch64.neon.ld2.v8i8.p0i8") |
2224 | }, | |
2225 | "ld2_dup_s16" => Intrinsic { | |
54a0048b SL |
2226 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, None, true); &PTR }]; &INPUTS }, |
2227 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2228 | definition: Named("llvm.aarch64.neon.ld2.v4i16.p0i16") |
2229 | }, | |
2230 | "ld2_dup_u16" => Intrinsic { | |
54a0048b SL |
2231 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, None, true); &PTR }]; &INPUTS }, |
2232 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2233 | definition: Named("llvm.aarch64.neon.ld2.v4i16.p0i16") |
2234 | }, | |
2235 | "ld2_dup_s32" => Intrinsic { | |
54a0048b SL |
2236 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, None, true); &PTR }]; &INPUTS }, |
2237 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2238 | definition: Named("llvm.aarch64.neon.ld2.v2i32.p0i32") |
2239 | }, | |
2240 | "ld2_dup_u32" => Intrinsic { | |
54a0048b SL |
2241 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, None, true); &PTR }]; &INPUTS }, |
2242 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2243 | definition: Named("llvm.aarch64.neon.ld2.v2i32.p0i32") |
2244 | }, | |
2245 | "ld2_dup_s64" => Intrinsic { | |
54a0048b SL |
2246 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, None, true); &PTR }]; &INPUTS }, |
2247 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I64x1, &::I64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2248 | definition: Named("llvm.aarch64.neon.ld2.v1i64.p0i64") |
2249 | }, | |
2250 | "ld2_dup_u64" => Intrinsic { | |
54a0048b SL |
2251 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, None, true); &PTR }]; &INPUTS }, |
2252 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U64x1, &::U64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2253 | definition: Named("llvm.aarch64.neon.ld2.v1i64.p0i64") |
2254 | }, | |
2255 | "ld2_dup_f32" => Intrinsic { | |
54a0048b SL |
2256 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, None, true); &PTR }]; &INPUTS }, |
2257 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2258 | definition: Named("llvm.aarch64.neon.ld2.v2f32.p0f32") |
2259 | }, | |
2260 | "ld2_dup_f64" => Intrinsic { | |
54a0048b SL |
2261 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, None, true); &PTR }]; &INPUTS }, |
2262 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F64x1, &::F64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2263 | definition: Named("llvm.aarch64.neon.ld2.v1f64.p0f64") |
2264 | }, | |
2265 | "ld2q_dup_s8" => Intrinsic { | |
54a0048b SL |
2266 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, None, true); &PTR }]; &INPUTS }, |
2267 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2268 | definition: Named("llvm.aarch64.neon.ld2.v16i8.p0i8") |
2269 | }, | |
2270 | "ld2q_dup_u8" => Intrinsic { | |
54a0048b SL |
2271 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, None, true); &PTR }]; &INPUTS }, |
2272 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2273 | definition: Named("llvm.aarch64.neon.ld2.v16i8.p0i8") |
2274 | }, | |
2275 | "ld2q_dup_s16" => Intrinsic { | |
54a0048b SL |
2276 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, None, true); &PTR }]; &INPUTS }, |
2277 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2278 | definition: Named("llvm.aarch64.neon.ld2.v8i16.p0i16") |
2279 | }, | |
2280 | "ld2q_dup_u16" => Intrinsic { | |
54a0048b SL |
2281 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, None, true); &PTR }]; &INPUTS }, |
2282 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2283 | definition: Named("llvm.aarch64.neon.ld2.v8i16.p0i16") |
2284 | }, | |
2285 | "ld2q_dup_s32" => Intrinsic { | |
54a0048b SL |
2286 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, None, true); &PTR }]; &INPUTS }, |
2287 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2288 | definition: Named("llvm.aarch64.neon.ld2.v4i32.p0i32") |
2289 | }, | |
2290 | "ld2q_dup_u32" => Intrinsic { | |
54a0048b SL |
2291 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, None, true); &PTR }]; &INPUTS }, |
2292 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2293 | definition: Named("llvm.aarch64.neon.ld2.v4i32.p0i32") |
2294 | }, | |
2295 | "ld2q_dup_s64" => Intrinsic { | |
54a0048b SL |
2296 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, None, true); &PTR }]; &INPUTS }, |
2297 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2298 | definition: Named("llvm.aarch64.neon.ld2.v2i64.p0i64") |
2299 | }, | |
2300 | "ld2q_dup_u64" => Intrinsic { | |
54a0048b SL |
2301 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, None, true); &PTR }]; &INPUTS }, |
2302 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2303 | definition: Named("llvm.aarch64.neon.ld2.v2i64.p0i64") |
2304 | }, | |
2305 | "ld2q_dup_f32" => Intrinsic { | |
54a0048b SL |
2306 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, None, true); &PTR }]; &INPUTS }, |
2307 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2308 | definition: Named("llvm.aarch64.neon.ld2.v4f32.p0f32") |
2309 | }, | |
2310 | "ld2q_dup_f64" => Intrinsic { | |
54a0048b SL |
2311 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, None, true); &PTR }]; &INPUTS }, |
2312 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2313 | definition: Named("llvm.aarch64.neon.ld2.v2f64.p0f64") |
2314 | }, | |
2315 | "ld3_dup_s8" => Intrinsic { | |
54a0048b SL |
2316 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, None, true); &PTR }]; &INPUTS }, |
2317 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I8x8, &::I8x8, &::I8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2318 | definition: Named("llvm.aarch64.neon.ld3.v8i8.p0i8") |
2319 | }, | |
2320 | "ld3_dup_u8" => Intrinsic { | |
54a0048b SL |
2321 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, None, true); &PTR }]; &INPUTS }, |
2322 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U8x8, &::U8x8, &::U8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2323 | definition: Named("llvm.aarch64.neon.ld3.v8i8.p0i8") |
2324 | }, | |
2325 | "ld3_dup_s16" => Intrinsic { | |
54a0048b SL |
2326 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, None, true); &PTR }]; &INPUTS }, |
2327 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I16x4, &::I16x4, &::I16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2328 | definition: Named("llvm.aarch64.neon.ld3.v4i16.p0i16") |
2329 | }, | |
2330 | "ld3_dup_u16" => Intrinsic { | |
54a0048b SL |
2331 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, None, true); &PTR }]; &INPUTS }, |
2332 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U16x4, &::U16x4, &::U16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2333 | definition: Named("llvm.aarch64.neon.ld3.v4i16.p0i16") |
2334 | }, | |
2335 | "ld3_dup_s32" => Intrinsic { | |
54a0048b SL |
2336 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, None, true); &PTR }]; &INPUTS }, |
2337 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I32x2, &::I32x2, &::I32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2338 | definition: Named("llvm.aarch64.neon.ld3.v2i32.p0i32") |
2339 | }, | |
2340 | "ld3_dup_u32" => Intrinsic { | |
54a0048b SL |
2341 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, None, true); &PTR }]; &INPUTS }, |
2342 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U32x2, &::U32x2, &::U32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2343 | definition: Named("llvm.aarch64.neon.ld3.v2i32.p0i32") |
2344 | }, | |
2345 | "ld3_dup_s64" => Intrinsic { | |
54a0048b SL |
2346 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, None, true); &PTR }]; &INPUTS }, |
2347 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I64x1, &::I64x1, &::I64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2348 | definition: Named("llvm.aarch64.neon.ld3.v1i64.p0i64") |
2349 | }, | |
2350 | "ld3_dup_u64" => Intrinsic { | |
54a0048b SL |
2351 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, None, true); &PTR }]; &INPUTS }, |
2352 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U64x1, &::U64x1, &::U64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2353 | definition: Named("llvm.aarch64.neon.ld3.v1i64.p0i64") |
2354 | }, | |
2355 | "ld3_dup_f32" => Intrinsic { | |
54a0048b SL |
2356 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, None, true); &PTR }]; &INPUTS }, |
2357 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F32x2, &::F32x2, &::F32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2358 | definition: Named("llvm.aarch64.neon.ld3.v2f32.p0f32") |
2359 | }, | |
2360 | "ld3_dup_f64" => Intrinsic { | |
54a0048b SL |
2361 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, None, true); &PTR }]; &INPUTS }, |
2362 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F64x1, &::F64x1, &::F64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2363 | definition: Named("llvm.aarch64.neon.ld3.v1f64.p0f64") |
2364 | }, | |
2365 | "ld3q_dup_s8" => Intrinsic { | |
54a0048b SL |
2366 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, None, true); &PTR }]; &INPUTS }, |
2367 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2368 | definition: Named("llvm.aarch64.neon.ld3.v16i8.p0i8") |
2369 | }, | |
2370 | "ld3q_dup_u8" => Intrinsic { | |
54a0048b SL |
2371 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, None, true); &PTR }]; &INPUTS }, |
2372 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2373 | definition: Named("llvm.aarch64.neon.ld3.v16i8.p0i8") |
2374 | }, | |
2375 | "ld3q_dup_s16" => Intrinsic { | |
54a0048b SL |
2376 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, None, true); &PTR }]; &INPUTS }, |
2377 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2378 | definition: Named("llvm.aarch64.neon.ld3.v8i16.p0i16") |
2379 | }, | |
2380 | "ld3q_dup_u16" => Intrinsic { | |
54a0048b SL |
2381 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, None, true); &PTR }]; &INPUTS }, |
2382 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2383 | definition: Named("llvm.aarch64.neon.ld3.v8i16.p0i16") |
2384 | }, | |
2385 | "ld3q_dup_s32" => Intrinsic { | |
54a0048b SL |
2386 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, None, true); &PTR }]; &INPUTS }, |
2387 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2388 | definition: Named("llvm.aarch64.neon.ld3.v4i32.p0i32") |
2389 | }, | |
2390 | "ld3q_dup_u32" => Intrinsic { | |
54a0048b SL |
2391 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, None, true); &PTR }]; &INPUTS }, |
2392 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U32x4, &::U32x4, &::U32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2393 | definition: Named("llvm.aarch64.neon.ld3.v4i32.p0i32") |
2394 | }, | |
2395 | "ld3q_dup_s64" => Intrinsic { | |
54a0048b SL |
2396 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, None, true); &PTR }]; &INPUTS }, |
2397 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::I64x2, &::I64x2, &::I64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2398 | definition: Named("llvm.aarch64.neon.ld3.v2i64.p0i64") |
2399 | }, | |
2400 | "ld3q_dup_u64" => Intrinsic { | |
54a0048b SL |
2401 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, None, true); &PTR }]; &INPUTS }, |
2402 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::U64x2, &::U64x2, &::U64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2403 | definition: Named("llvm.aarch64.neon.ld3.v2i64.p0i64") |
2404 | }, | |
2405 | "ld3q_dup_f32" => Intrinsic { | |
54a0048b SL |
2406 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, None, true); &PTR }]; &INPUTS }, |
2407 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2408 | definition: Named("llvm.aarch64.neon.ld3.v4f32.p0f32") |
2409 | }, | |
2410 | "ld3q_dup_f64" => Intrinsic { | |
54a0048b SL |
2411 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, None, true); &PTR }]; &INPUTS }, |
2412 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 3] = [&::F64x2, &::F64x2, &::F64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2413 | definition: Named("llvm.aarch64.neon.ld3.v2f64.p0f64") |
2414 | }, | |
2415 | "ld4_dup_s8" => Intrinsic { | |
54a0048b SL |
2416 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, None, true); &PTR }]; &INPUTS }, |
2417 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I8x8, &::I8x8, &::I8x8, &::I8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2418 | definition: Named("llvm.aarch64.neon.ld4.v8i8.p0i8") |
2419 | }, | |
2420 | "ld4_dup_u8" => Intrinsic { | |
54a0048b SL |
2421 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, None, true); &PTR }]; &INPUTS }, |
2422 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U8x8, &::U8x8, &::U8x8, &::U8x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2423 | definition: Named("llvm.aarch64.neon.ld4.v8i8.p0i8") |
2424 | }, | |
2425 | "ld4_dup_s16" => Intrinsic { | |
54a0048b SL |
2426 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, None, true); &PTR }]; &INPUTS }, |
2427 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I16x4, &::I16x4, &::I16x4, &::I16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2428 | definition: Named("llvm.aarch64.neon.ld4.v4i16.p0i16") |
2429 | }, | |
2430 | "ld4_dup_u16" => Intrinsic { | |
54a0048b SL |
2431 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, None, true); &PTR }]; &INPUTS }, |
2432 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U16x4, &::U16x4, &::U16x4, &::U16x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2433 | definition: Named("llvm.aarch64.neon.ld4.v4i16.p0i16") |
2434 | }, | |
2435 | "ld4_dup_s32" => Intrinsic { | |
54a0048b SL |
2436 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, None, true); &PTR }]; &INPUTS }, |
2437 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I32x2, &::I32x2, &::I32x2, &::I32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2438 | definition: Named("llvm.aarch64.neon.ld4.v2i32.p0i32") |
2439 | }, | |
2440 | "ld4_dup_u32" => Intrinsic { | |
54a0048b SL |
2441 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, None, true); &PTR }]; &INPUTS }, |
2442 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U32x2, &::U32x2, &::U32x2, &::U32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2443 | definition: Named("llvm.aarch64.neon.ld4.v2i32.p0i32") |
2444 | }, | |
2445 | "ld4_dup_s64" => Intrinsic { | |
54a0048b SL |
2446 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, None, true); &PTR }]; &INPUTS }, |
2447 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I64x1, &::I64x1, &::I64x1, &::I64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2448 | definition: Named("llvm.aarch64.neon.ld4.v1i64.p0i64") |
2449 | }, | |
2450 | "ld4_dup_u64" => Intrinsic { | |
54a0048b SL |
2451 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, None, true); &PTR }]; &INPUTS }, |
2452 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U64x1, &::U64x1, &::U64x1, &::U64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2453 | definition: Named("llvm.aarch64.neon.ld4.v1i64.p0i64") |
2454 | }, | |
2455 | "ld4_dup_f32" => Intrinsic { | |
54a0048b SL |
2456 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, None, true); &PTR }]; &INPUTS }, |
2457 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F32x2, &::F32x2, &::F32x2, &::F32x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2458 | definition: Named("llvm.aarch64.neon.ld4.v2f32.p0f32") |
2459 | }, | |
2460 | "ld4_dup_f64" => Intrinsic { | |
54a0048b SL |
2461 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, None, true); &PTR }]; &INPUTS }, |
2462 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F64x1, &::F64x1, &::F64x1, &::F64x1]; &PARTS }); &AGG }, | |
e9174d1e SL |
2463 | definition: Named("llvm.aarch64.neon.ld4.v1f64.p0f64") |
2464 | }, | |
2465 | "ld4q_dup_s8" => Intrinsic { | |
54a0048b SL |
2466 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I8, None, true); &PTR }]; &INPUTS }, |
2467 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I8x16, &::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2468 | definition: Named("llvm.aarch64.neon.ld4.v16i8.p0i8") |
2469 | }, | |
2470 | "ld4q_dup_u8" => Intrinsic { | |
54a0048b SL |
2471 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U8, None, true); &PTR }]; &INPUTS }, |
2472 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U8x16, &::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, | |
e9174d1e SL |
2473 | definition: Named("llvm.aarch64.neon.ld4.v16i8.p0i8") |
2474 | }, | |
2475 | "ld4q_dup_s16" => Intrinsic { | |
54a0048b SL |
2476 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I16, None, true); &PTR }]; &INPUTS }, |
2477 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I16x8, &::I16x8, &::I16x8, &::I16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2478 | definition: Named("llvm.aarch64.neon.ld4.v8i16.p0i16") |
2479 | }, | |
2480 | "ld4q_dup_u16" => Intrinsic { | |
54a0048b SL |
2481 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U16, None, true); &PTR }]; &INPUTS }, |
2482 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U16x8, &::U16x8, &::U16x8, &::U16x8]; &PARTS }); &AGG }, | |
e9174d1e SL |
2483 | definition: Named("llvm.aarch64.neon.ld4.v8i16.p0i16") |
2484 | }, | |
2485 | "ld4q_dup_s32" => Intrinsic { | |
54a0048b SL |
2486 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I32, None, true); &PTR }]; &INPUTS }, |
2487 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I32x4, &::I32x4, &::I32x4, &::I32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2488 | definition: Named("llvm.aarch64.neon.ld4.v4i32.p0i32") |
2489 | }, | |
2490 | "ld4q_dup_u32" => Intrinsic { | |
54a0048b SL |
2491 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U32, None, true); &PTR }]; &INPUTS }, |
2492 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U32x4, &::U32x4, &::U32x4, &::U32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2493 | definition: Named("llvm.aarch64.neon.ld4.v4i32.p0i32") |
2494 | }, | |
2495 | "ld4q_dup_s64" => Intrinsic { | |
54a0048b SL |
2496 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::I64, None, true); &PTR }]; &INPUTS }, |
2497 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::I64x2, &::I64x2, &::I64x2, &::I64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2498 | definition: Named("llvm.aarch64.neon.ld4.v2i64.p0i64") |
2499 | }, | |
2500 | "ld4q_dup_u64" => Intrinsic { | |
54a0048b SL |
2501 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::U64, None, true); &PTR }]; &INPUTS }, |
2502 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::U64x2, &::U64x2, &::U64x2, &::U64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2503 | definition: Named("llvm.aarch64.neon.ld4.v2i64.p0i64") |
2504 | }, | |
2505 | "ld4q_dup_f32" => Intrinsic { | |
54a0048b SL |
2506 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F32, None, true); &PTR }]; &INPUTS }, |
2507 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F32x4, &::F32x4, &::F32x4, &::F32x4]; &PARTS }); &AGG }, | |
e9174d1e SL |
2508 | definition: Named("llvm.aarch64.neon.ld4.v4f32.p0f32") |
2509 | }, | |
2510 | "ld4q_dup_f64" => Intrinsic { | |
54a0048b SL |
2511 | inputs: { static INPUTS: [&'static Type; 1] = [{ static PTR: Type = Type::Pointer(&::F64, None, true); &PTR }]; &INPUTS }, |
2512 | output: { static AGG: Type = Type::Aggregate(false, { static PARTS: [&'static Type; 4] = [&::F64x2, &::F64x2, &::F64x2, &::F64x2]; &PARTS }); &AGG }, | |
e9174d1e SL |
2513 | definition: Named("llvm.aarch64.neon.ld4.v2f64.p0f64") |
2514 | }, | |
2515 | "padd_s8" => Intrinsic { | |
54a0048b SL |
2516 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
2517 | output: &::I8x8, | |
e9174d1e SL |
2518 | definition: Named("llvm.aarch64.neon.addp.v8i8") |
2519 | }, | |
2520 | "padd_u8" => Intrinsic { | |
54a0048b SL |
2521 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
2522 | output: &::U8x8, | |
e9174d1e SL |
2523 | definition: Named("llvm.aarch64.neon.addp.v8i8") |
2524 | }, | |
2525 | "padd_s16" => Intrinsic { | |
54a0048b SL |
2526 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
2527 | output: &::I16x4, | |
e9174d1e SL |
2528 | definition: Named("llvm.aarch64.neon.addp.v4i16") |
2529 | }, | |
2530 | "padd_u16" => Intrinsic { | |
54a0048b SL |
2531 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
2532 | output: &::U16x4, | |
e9174d1e SL |
2533 | definition: Named("llvm.aarch64.neon.addp.v4i16") |
2534 | }, | |
2535 | "padd_s32" => Intrinsic { | |
54a0048b SL |
2536 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
2537 | output: &::I32x2, | |
e9174d1e SL |
2538 | definition: Named("llvm.aarch64.neon.addp.v2i32") |
2539 | }, | |
2540 | "padd_u32" => Intrinsic { | |
54a0048b SL |
2541 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
2542 | output: &::U32x2, | |
e9174d1e SL |
2543 | definition: Named("llvm.aarch64.neon.addp.v2i32") |
2544 | }, | |
2545 | "padd_f32" => Intrinsic { | |
54a0048b SL |
2546 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
2547 | output: &::F32x2, | |
e9174d1e SL |
2548 | definition: Named("llvm.aarch64.neon.addp.v2f32") |
2549 | }, | |
2550 | "paddq_s8" => Intrinsic { | |
54a0048b SL |
2551 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
2552 | output: &::I8x16, | |
e9174d1e SL |
2553 | definition: Named("llvm.aarch64.neon.addp.v16i8") |
2554 | }, | |
2555 | "paddq_u8" => Intrinsic { | |
54a0048b SL |
2556 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
2557 | output: &::U8x16, | |
e9174d1e SL |
2558 | definition: Named("llvm.aarch64.neon.addp.v16i8") |
2559 | }, | |
2560 | "paddq_s16" => Intrinsic { | |
54a0048b SL |
2561 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
2562 | output: &::I16x8, | |
e9174d1e SL |
2563 | definition: Named("llvm.aarch64.neon.addp.v8i16") |
2564 | }, | |
2565 | "paddq_u16" => Intrinsic { | |
54a0048b SL |
2566 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
2567 | output: &::U16x8, | |
e9174d1e SL |
2568 | definition: Named("llvm.aarch64.neon.addp.v8i16") |
2569 | }, | |
2570 | "paddq_s32" => Intrinsic { | |
54a0048b SL |
2571 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
2572 | output: &::I32x4, | |
e9174d1e SL |
2573 | definition: Named("llvm.aarch64.neon.addp.v4i32") |
2574 | }, | |
2575 | "paddq_u32" => Intrinsic { | |
54a0048b SL |
2576 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
2577 | output: &::U32x4, | |
e9174d1e SL |
2578 | definition: Named("llvm.aarch64.neon.addp.v4i32") |
2579 | }, | |
2580 | "paddq_f32" => Intrinsic { | |
54a0048b SL |
2581 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
2582 | output: &::F32x4, | |
e9174d1e SL |
2583 | definition: Named("llvm.aarch64.neon.addp.v4f32") |
2584 | }, | |
2585 | "paddq_s64" => Intrinsic { | |
54a0048b SL |
2586 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
2587 | output: &::I64x2, | |
e9174d1e SL |
2588 | definition: Named("llvm.aarch64.neon.addp.v2i64") |
2589 | }, | |
2590 | "paddq_u64" => Intrinsic { | |
54a0048b SL |
2591 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
2592 | output: &::U64x2, | |
e9174d1e SL |
2593 | definition: Named("llvm.aarch64.neon.addp.v2i64") |
2594 | }, | |
2595 | "paddq_f64" => Intrinsic { | |
54a0048b SL |
2596 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
2597 | output: &::F64x2, | |
e9174d1e SL |
2598 | definition: Named("llvm.aarch64.neon.addp.v2f64") |
2599 | }, | |
2600 | "paddl_s16" => Intrinsic { | |
54a0048b SL |
2601 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
2602 | output: &::I16x4, | |
e9174d1e SL |
2603 | definition: Named("llvm.aarch64.neon.saddlp.v4i16.v8i8") |
2604 | }, | |
2605 | "paddl_u16" => Intrinsic { | |
54a0048b SL |
2606 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
2607 | output: &::U16x4, | |
e9174d1e SL |
2608 | definition: Named("llvm.aarch64.neon.uaddlp.v4i16.v8i8") |
2609 | }, | |
2610 | "paddl_s32" => Intrinsic { | |
54a0048b SL |
2611 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
2612 | output: &::I32x2, | |
e9174d1e SL |
2613 | definition: Named("llvm.aarch64.neon.saddlp.v2i32.v4i16") |
2614 | }, | |
2615 | "paddl_u32" => Intrinsic { | |
54a0048b SL |
2616 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x4]; &INPUTS }, |
2617 | output: &::U32x2, | |
e9174d1e SL |
2618 | definition: Named("llvm.aarch64.neon.uaddlp.v2i32.v4i16") |
2619 | }, | |
2620 | "paddl_s64" => Intrinsic { | |
54a0048b SL |
2621 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
2622 | output: &::I64x1, | |
e9174d1e SL |
2623 | definition: Named("llvm.aarch64.neon.saddlp.v1i64.v2i32") |
2624 | }, | |
2625 | "paddl_u64" => Intrinsic { | |
54a0048b SL |
2626 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
2627 | output: &::U64x1, | |
e9174d1e SL |
2628 | definition: Named("llvm.aarch64.neon.uaddlp.v1i64.v2i32") |
2629 | }, | |
2630 | "paddlq_s16" => Intrinsic { | |
54a0048b SL |
2631 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
2632 | output: &::I16x8, | |
e9174d1e SL |
2633 | definition: Named("llvm.aarch64.neon.saddlp.v8i16.v16i8") |
2634 | }, | |
2635 | "paddlq_u16" => Intrinsic { | |
54a0048b SL |
2636 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
2637 | output: &::U16x8, | |
e9174d1e SL |
2638 | definition: Named("llvm.aarch64.neon.uaddlp.v8i16.v16i8") |
2639 | }, | |
2640 | "paddlq_s32" => Intrinsic { | |
54a0048b SL |
2641 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
2642 | output: &::I32x4, | |
e9174d1e SL |
2643 | definition: Named("llvm.aarch64.neon.saddlp.v4i32.v8i16") |
2644 | }, | |
2645 | "paddlq_u32" => Intrinsic { | |
54a0048b SL |
2646 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
2647 | output: &::U32x4, | |
e9174d1e SL |
2648 | definition: Named("llvm.aarch64.neon.uaddlp.v4i32.v8i16") |
2649 | }, | |
2650 | "paddlq_s64" => Intrinsic { | |
54a0048b SL |
2651 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
2652 | output: &::I64x2, | |
e9174d1e SL |
2653 | definition: Named("llvm.aarch64.neon.saddlp.v2i64.v4i32") |
2654 | }, | |
2655 | "paddlq_u64" => Intrinsic { | |
54a0048b SL |
2656 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
2657 | output: &::U64x2, | |
e9174d1e SL |
2658 | definition: Named("llvm.aarch64.neon.uaddlp.v2i64.v4i32") |
2659 | }, | |
2660 | "pmax_s8" => Intrinsic { | |
54a0048b SL |
2661 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
2662 | output: &::I8x8, | |
e9174d1e SL |
2663 | definition: Named("llvm.aarch64.neon.smaxp.v8i8") |
2664 | }, | |
2665 | "pmax_u8" => Intrinsic { | |
54a0048b SL |
2666 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
2667 | output: &::U8x8, | |
e9174d1e SL |
2668 | definition: Named("llvm.aarch64.neon.umaxp.v8i8") |
2669 | }, | |
2670 | "pmax_s16" => Intrinsic { | |
54a0048b SL |
2671 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
2672 | output: &::I16x4, | |
e9174d1e SL |
2673 | definition: Named("llvm.aarch64.neon.smaxp.v4i16") |
2674 | }, | |
2675 | "pmax_u16" => Intrinsic { | |
54a0048b SL |
2676 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
2677 | output: &::U16x4, | |
e9174d1e SL |
2678 | definition: Named("llvm.aarch64.neon.umaxp.v4i16") |
2679 | }, | |
2680 | "pmax_s32" => Intrinsic { | |
54a0048b SL |
2681 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
2682 | output: &::I32x2, | |
e9174d1e SL |
2683 | definition: Named("llvm.aarch64.neon.smaxp.v2i32") |
2684 | }, | |
2685 | "pmax_u32" => Intrinsic { | |
54a0048b SL |
2686 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
2687 | output: &::U32x2, | |
e9174d1e SL |
2688 | definition: Named("llvm.aarch64.neon.umaxp.v2i32") |
2689 | }, | |
2690 | "pmax_f32" => Intrinsic { | |
54a0048b SL |
2691 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
2692 | output: &::F32x2, | |
e9174d1e SL |
2693 | definition: Named("llvm.aarch64.neon.fmaxp.v2f32") |
2694 | }, | |
2695 | "pmaxq_s8" => Intrinsic { | |
54a0048b SL |
2696 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
2697 | output: &::I8x16, | |
e9174d1e SL |
2698 | definition: Named("llvm.aarch64.neon.smaxp.v16i8") |
2699 | }, | |
2700 | "pmaxq_u8" => Intrinsic { | |
54a0048b SL |
2701 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
2702 | output: &::U8x16, | |
e9174d1e SL |
2703 | definition: Named("llvm.aarch64.neon.umaxp.v16i8") |
2704 | }, | |
2705 | "pmaxq_s16" => Intrinsic { | |
54a0048b SL |
2706 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
2707 | output: &::I16x8, | |
e9174d1e SL |
2708 | definition: Named("llvm.aarch64.neon.smaxp.v8i16") |
2709 | }, | |
2710 | "pmaxq_u16" => Intrinsic { | |
54a0048b SL |
2711 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
2712 | output: &::U16x8, | |
e9174d1e SL |
2713 | definition: Named("llvm.aarch64.neon.umaxp.v8i16") |
2714 | }, | |
2715 | "pmaxq_s32" => Intrinsic { | |
54a0048b SL |
2716 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
2717 | output: &::I32x4, | |
e9174d1e SL |
2718 | definition: Named("llvm.aarch64.neon.smaxp.v4i32") |
2719 | }, | |
2720 | "pmaxq_u32" => Intrinsic { | |
54a0048b SL |
2721 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
2722 | output: &::U32x4, | |
e9174d1e SL |
2723 | definition: Named("llvm.aarch64.neon.umaxp.v4i32") |
2724 | }, | |
2725 | "pmaxq_f32" => Intrinsic { | |
54a0048b SL |
2726 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
2727 | output: &::F32x4, | |
e9174d1e SL |
2728 | definition: Named("llvm.aarch64.neon.fmaxp.v4f32") |
2729 | }, | |
2730 | "pmaxq_s64" => Intrinsic { | |
54a0048b SL |
2731 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
2732 | output: &::I64x2, | |
e9174d1e SL |
2733 | definition: Named("llvm.aarch64.neon.smaxp.v2i64") |
2734 | }, | |
2735 | "pmaxq_u64" => Intrinsic { | |
54a0048b SL |
2736 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
2737 | output: &::U64x2, | |
e9174d1e SL |
2738 | definition: Named("llvm.aarch64.neon.umaxp.v2i64") |
2739 | }, | |
2740 | "pmaxq_f64" => Intrinsic { | |
54a0048b SL |
2741 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
2742 | output: &::F64x2, | |
e9174d1e SL |
2743 | definition: Named("llvm.aarch64.neon.fmaxp.v2f64") |
2744 | }, | |
2745 | "pmin_s8" => Intrinsic { | |
54a0048b SL |
2746 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
2747 | output: &::I8x8, | |
e9174d1e SL |
2748 | definition: Named("llvm.aarch64.neon.sminp.v8i8") |
2749 | }, | |
2750 | "pmin_u8" => Intrinsic { | |
54a0048b SL |
2751 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
2752 | output: &::U8x8, | |
e9174d1e SL |
2753 | definition: Named("llvm.aarch64.neon.uminp.v8i8") |
2754 | }, | |
2755 | "pmin_s16" => Intrinsic { | |
54a0048b SL |
2756 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
2757 | output: &::I16x4, | |
e9174d1e SL |
2758 | definition: Named("llvm.aarch64.neon.sminp.v4i16") |
2759 | }, | |
2760 | "pmin_u16" => Intrinsic { | |
54a0048b SL |
2761 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
2762 | output: &::U16x4, | |
e9174d1e SL |
2763 | definition: Named("llvm.aarch64.neon.uminp.v4i16") |
2764 | }, | |
2765 | "pmin_s32" => Intrinsic { | |
54a0048b SL |
2766 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
2767 | output: &::I32x2, | |
e9174d1e SL |
2768 | definition: Named("llvm.aarch64.neon.sminp.v2i32") |
2769 | }, | |
2770 | "pmin_u32" => Intrinsic { | |
54a0048b SL |
2771 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
2772 | output: &::U32x2, | |
e9174d1e SL |
2773 | definition: Named("llvm.aarch64.neon.uminp.v2i32") |
2774 | }, | |
2775 | "pmin_f32" => Intrinsic { | |
54a0048b SL |
2776 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
2777 | output: &::F32x2, | |
e9174d1e SL |
2778 | definition: Named("llvm.aarch64.neon.fminp.v2f32") |
2779 | }, | |
2780 | "pminq_s8" => Intrinsic { | |
54a0048b SL |
2781 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
2782 | output: &::I8x16, | |
e9174d1e SL |
2783 | definition: Named("llvm.aarch64.neon.sminp.v16i8") |
2784 | }, | |
2785 | "pminq_u8" => Intrinsic { | |
54a0048b SL |
2786 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
2787 | output: &::U8x16, | |
e9174d1e SL |
2788 | definition: Named("llvm.aarch64.neon.uminp.v16i8") |
2789 | }, | |
2790 | "pminq_s16" => Intrinsic { | |
54a0048b SL |
2791 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
2792 | output: &::I16x8, | |
e9174d1e SL |
2793 | definition: Named("llvm.aarch64.neon.sminp.v8i16") |
2794 | }, | |
2795 | "pminq_u16" => Intrinsic { | |
54a0048b SL |
2796 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
2797 | output: &::U16x8, | |
e9174d1e SL |
2798 | definition: Named("llvm.aarch64.neon.uminp.v8i16") |
2799 | }, | |
2800 | "pminq_s32" => Intrinsic { | |
54a0048b SL |
2801 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
2802 | output: &::I32x4, | |
e9174d1e SL |
2803 | definition: Named("llvm.aarch64.neon.sminp.v4i32") |
2804 | }, | |
2805 | "pminq_u32" => Intrinsic { | |
54a0048b SL |
2806 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
2807 | output: &::U32x4, | |
e9174d1e SL |
2808 | definition: Named("llvm.aarch64.neon.uminp.v4i32") |
2809 | }, | |
2810 | "pminq_f32" => Intrinsic { | |
54a0048b SL |
2811 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
2812 | output: &::F32x4, | |
e9174d1e SL |
2813 | definition: Named("llvm.aarch64.neon.fminp.v4f32") |
2814 | }, | |
2815 | "pminq_s64" => Intrinsic { | |
54a0048b SL |
2816 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
2817 | output: &::I64x2, | |
e9174d1e SL |
2818 | definition: Named("llvm.aarch64.neon.sminp.v2i64") |
2819 | }, | |
2820 | "pminq_u64" => Intrinsic { | |
54a0048b SL |
2821 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
2822 | output: &::U64x2, | |
e9174d1e SL |
2823 | definition: Named("llvm.aarch64.neon.uminp.v2i64") |
2824 | }, | |
2825 | "pminq_f64" => Intrinsic { | |
54a0048b SL |
2826 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
2827 | output: &::F64x2, | |
e9174d1e SL |
2828 | definition: Named("llvm.aarch64.neon.fminp.v2f64") |
2829 | }, | |
2830 | "pmaxnm_s8" => Intrinsic { | |
54a0048b SL |
2831 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x8, &::I8x8]; &INPUTS }, |
2832 | output: &::I8x8, | |
e9174d1e SL |
2833 | definition: Named("llvm.aarch64.neon.smaxnmp.v8i8") |
2834 | }, | |
2835 | "pmaxnm_u8" => Intrinsic { | |
54a0048b SL |
2836 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x8, &::U8x8]; &INPUTS }, |
2837 | output: &::U8x8, | |
e9174d1e SL |
2838 | definition: Named("llvm.aarch64.neon.umaxnmp.v8i8") |
2839 | }, | |
2840 | "pmaxnm_s16" => Intrinsic { | |
54a0048b SL |
2841 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x4, &::I16x4]; &INPUTS }, |
2842 | output: &::I16x4, | |
e9174d1e SL |
2843 | definition: Named("llvm.aarch64.neon.smaxnmp.v4i16") |
2844 | }, | |
2845 | "pmaxnm_u16" => Intrinsic { | |
54a0048b SL |
2846 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x4, &::U16x4]; &INPUTS }, |
2847 | output: &::U16x4, | |
e9174d1e SL |
2848 | definition: Named("llvm.aarch64.neon.umaxnmp.v4i16") |
2849 | }, | |
2850 | "pmaxnm_s32" => Intrinsic { | |
54a0048b SL |
2851 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x2, &::I32x2]; &INPUTS }, |
2852 | output: &::I32x2, | |
e9174d1e SL |
2853 | definition: Named("llvm.aarch64.neon.smaxnmp.v2i32") |
2854 | }, | |
2855 | "pmaxnm_u32" => Intrinsic { | |
54a0048b SL |
2856 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x2, &::U32x2]; &INPUTS }, |
2857 | output: &::U32x2, | |
e9174d1e SL |
2858 | definition: Named("llvm.aarch64.neon.umaxnmp.v2i32") |
2859 | }, | |
2860 | "pmaxnm_f32" => Intrinsic { | |
54a0048b SL |
2861 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
2862 | output: &::F32x2, | |
e9174d1e SL |
2863 | definition: Named("llvm.aarch64.neon.fmaxnmp.v2f32") |
2864 | }, | |
2865 | "pmaxnmq_s8" => Intrinsic { | |
54a0048b SL |
2866 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS }, |
2867 | output: &::I8x16, | |
e9174d1e SL |
2868 | definition: Named("llvm.aarch64.neon.smaxnmp.v16i8") |
2869 | }, | |
2870 | "pmaxnmq_u8" => Intrinsic { | |
54a0048b SL |
2871 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
2872 | output: &::U8x16, | |
e9174d1e SL |
2873 | definition: Named("llvm.aarch64.neon.umaxnmp.v16i8") |
2874 | }, | |
2875 | "pmaxnmq_s16" => Intrinsic { | |
54a0048b SL |
2876 | inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS }, |
2877 | output: &::I16x8, | |
e9174d1e SL |
2878 | definition: Named("llvm.aarch64.neon.smaxnmp.v8i16") |
2879 | }, | |
2880 | "pmaxnmq_u16" => Intrinsic { | |
54a0048b SL |
2881 | inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS }, |
2882 | output: &::U16x8, | |
e9174d1e SL |
2883 | definition: Named("llvm.aarch64.neon.umaxnmp.v8i16") |
2884 | }, | |
2885 | "pmaxnmq_s32" => Intrinsic { | |
54a0048b SL |
2886 | inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS }, |
2887 | output: &::I32x4, | |
e9174d1e SL |
2888 | definition: Named("llvm.aarch64.neon.smaxnmp.v4i32") |
2889 | }, | |
2890 | "pmaxnmq_u32" => Intrinsic { | |
54a0048b SL |
2891 | inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS }, |
2892 | output: &::U32x4, | |
e9174d1e SL |
2893 | definition: Named("llvm.aarch64.neon.umaxnmp.v4i32") |
2894 | }, | |
2895 | "pmaxnmq_f32" => Intrinsic { | |
54a0048b SL |
2896 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
2897 | output: &::F32x4, | |
e9174d1e SL |
2898 | definition: Named("llvm.aarch64.neon.fmaxnmp.v4f32") |
2899 | }, | |
2900 | "pmaxnmq_s64" => Intrinsic { | |
54a0048b SL |
2901 | inputs: { static INPUTS: [&'static Type; 2] = [&::I64x2, &::I64x2]; &INPUTS }, |
2902 | output: &::I64x2, | |
e9174d1e SL |
2903 | definition: Named("llvm.aarch64.neon.smaxnmp.v2i64") |
2904 | }, | |
2905 | "pmaxnmq_u64" => Intrinsic { | |
54a0048b SL |
2906 | inputs: { static INPUTS: [&'static Type; 2] = [&::U64x2, &::U64x2]; &INPUTS }, |
2907 | output: &::U64x2, | |
e9174d1e SL |
2908 | definition: Named("llvm.aarch64.neon.umaxnmp.v2i64") |
2909 | }, | |
2910 | "pmaxnmq_f64" => Intrinsic { | |
54a0048b SL |
2911 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
2912 | output: &::F64x2, | |
e9174d1e SL |
2913 | definition: Named("llvm.aarch64.neon.fmaxnmp.v2f64") |
2914 | }, | |
2915 | "pminnm_f32" => Intrinsic { | |
54a0048b SL |
2916 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x2, &::F32x2]; &INPUTS }, |
2917 | output: &::F32x2, | |
e9174d1e SL |
2918 | definition: Named("llvm.aarch64.neon.fminnmp.v2f32") |
2919 | }, | |
2920 | "pminnmq_f32" => Intrinsic { | |
54a0048b SL |
2921 | inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS }, |
2922 | output: &::F32x4, | |
e9174d1e SL |
2923 | definition: Named("llvm.aarch64.neon.fminnmp.v4f32") |
2924 | }, | |
2925 | "pminnmq_f64" => Intrinsic { | |
54a0048b SL |
2926 | inputs: { static INPUTS: [&'static Type; 2] = [&::F64x2, &::F64x2]; &INPUTS }, |
2927 | output: &::F64x2, | |
e9174d1e SL |
2928 | definition: Named("llvm.aarch64.neon.fminnmp.v2f64") |
2929 | }, | |
2930 | "addv_s8" => Intrinsic { | |
54a0048b SL |
2931 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
2932 | output: &::I8, | |
e9174d1e SL |
2933 | definition: Named("llvm.aarch64.neon.saddv.i8.v8i8") |
2934 | }, | |
2935 | "addv_u8" => Intrinsic { | |
54a0048b SL |
2936 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
2937 | output: &::U8, | |
e9174d1e SL |
2938 | definition: Named("llvm.aarch64.neon.uaddv.i8.v8i8") |
2939 | }, | |
2940 | "addv_s16" => Intrinsic { | |
54a0048b SL |
2941 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
2942 | output: &::I16, | |
e9174d1e SL |
2943 | definition: Named("llvm.aarch64.neon.saddv.i16.v4i16") |
2944 | }, | |
2945 | "addv_u16" => Intrinsic { | |
54a0048b SL |
2946 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x4]; &INPUTS }, |
2947 | output: &::U16, | |
e9174d1e SL |
2948 | definition: Named("llvm.aarch64.neon.uaddv.i16.v4i16") |
2949 | }, | |
2950 | "addv_s32" => Intrinsic { | |
54a0048b SL |
2951 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
2952 | output: &::I32, | |
e9174d1e SL |
2953 | definition: Named("llvm.aarch64.neon.saddv.i32.v2i32") |
2954 | }, | |
2955 | "addv_u32" => Intrinsic { | |
54a0048b SL |
2956 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
2957 | output: &::U32, | |
e9174d1e SL |
2958 | definition: Named("llvm.aarch64.neon.uaddv.i32.v2i32") |
2959 | }, | |
2960 | "addv_f32" => Intrinsic { | |
54a0048b SL |
2961 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
2962 | output: &::F32, | |
e9174d1e SL |
2963 | definition: Named("llvm.aarch64.neon.faddv.f32.v2f32") |
2964 | }, | |
2965 | "addvq_s8" => Intrinsic { | |
54a0048b SL |
2966 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
2967 | output: &::I8, | |
e9174d1e SL |
2968 | definition: Named("llvm.aarch64.neon.saddv.i8.v16i8") |
2969 | }, | |
2970 | "addvq_u8" => Intrinsic { | |
54a0048b SL |
2971 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
2972 | output: &::U8, | |
e9174d1e SL |
2973 | definition: Named("llvm.aarch64.neon.uaddv.i8.v16i8") |
2974 | }, | |
2975 | "addvq_s16" => Intrinsic { | |
54a0048b SL |
2976 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
2977 | output: &::I16, | |
e9174d1e SL |
2978 | definition: Named("llvm.aarch64.neon.saddv.i16.v8i16") |
2979 | }, | |
2980 | "addvq_u16" => Intrinsic { | |
54a0048b SL |
2981 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
2982 | output: &::U16, | |
e9174d1e SL |
2983 | definition: Named("llvm.aarch64.neon.uaddv.i16.v8i16") |
2984 | }, | |
2985 | "addvq_s32" => Intrinsic { | |
54a0048b SL |
2986 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
2987 | output: &::I32, | |
e9174d1e SL |
2988 | definition: Named("llvm.aarch64.neon.saddv.i32.v4i32") |
2989 | }, | |
2990 | "addvq_u32" => Intrinsic { | |
54a0048b SL |
2991 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
2992 | output: &::U32, | |
e9174d1e SL |
2993 | definition: Named("llvm.aarch64.neon.uaddv.i32.v4i32") |
2994 | }, | |
2995 | "addvq_f32" => Intrinsic { | |
54a0048b SL |
2996 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
2997 | output: &::F32, | |
e9174d1e SL |
2998 | definition: Named("llvm.aarch64.neon.faddv.f32.v4f32") |
2999 | }, | |
3000 | "addvq_s64" => Intrinsic { | |
54a0048b SL |
3001 | inputs: { static INPUTS: [&'static Type; 1] = [&::I64x2]; &INPUTS }, |
3002 | output: &::I64, | |
e9174d1e SL |
3003 | definition: Named("llvm.aarch64.neon.saddv.i64.v2i64") |
3004 | }, | |
3005 | "addvq_u64" => Intrinsic { | |
54a0048b SL |
3006 | inputs: { static INPUTS: [&'static Type; 1] = [&::U64x2]; &INPUTS }, |
3007 | output: &::U64, | |
e9174d1e SL |
3008 | definition: Named("llvm.aarch64.neon.uaddv.i64.v2i64") |
3009 | }, | |
3010 | "addvq_f64" => Intrinsic { | |
54a0048b SL |
3011 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
3012 | output: &::F64, | |
e9174d1e SL |
3013 | definition: Named("llvm.aarch64.neon.faddv.f64.v2f64") |
3014 | }, | |
3015 | "addlv_s8" => Intrinsic { | |
54a0048b SL |
3016 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
3017 | output: &::I16, | |
e9174d1e SL |
3018 | definition: Named("llvm.aarch64.neon.saddlv.i16.v8i8") |
3019 | }, | |
3020 | "addlv_u8" => Intrinsic { | |
54a0048b SL |
3021 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
3022 | output: &::U16, | |
e9174d1e SL |
3023 | definition: Named("llvm.aarch64.neon.uaddlv.i16.v8i8") |
3024 | }, | |
3025 | "addlv_s16" => Intrinsic { | |
54a0048b SL |
3026 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
3027 | output: &::I32, | |
e9174d1e SL |
3028 | definition: Named("llvm.aarch64.neon.saddlv.i32.v4i16") |
3029 | }, | |
3030 | "addlv_u16" => Intrinsic { | |
54a0048b SL |
3031 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x4]; &INPUTS }, |
3032 | output: &::U32, | |
e9174d1e SL |
3033 | definition: Named("llvm.aarch64.neon.uaddlv.i32.v4i16") |
3034 | }, | |
3035 | "addlv_s32" => Intrinsic { | |
54a0048b SL |
3036 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
3037 | output: &::I64, | |
e9174d1e SL |
3038 | definition: Named("llvm.aarch64.neon.saddlv.i64.v2i32") |
3039 | }, | |
3040 | "addlv_u32" => Intrinsic { | |
54a0048b SL |
3041 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
3042 | output: &::U64, | |
e9174d1e SL |
3043 | definition: Named("llvm.aarch64.neon.uaddlv.i64.v2i32") |
3044 | }, | |
3045 | "addlvq_s8" => Intrinsic { | |
54a0048b SL |
3046 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
3047 | output: &::I16, | |
e9174d1e SL |
3048 | definition: Named("llvm.aarch64.neon.saddlv.i16.v16i8") |
3049 | }, | |
3050 | "addlvq_u8" => Intrinsic { | |
54a0048b SL |
3051 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
3052 | output: &::U16, | |
e9174d1e SL |
3053 | definition: Named("llvm.aarch64.neon.uaddlv.i16.v16i8") |
3054 | }, | |
3055 | "addlvq_s16" => Intrinsic { | |
54a0048b SL |
3056 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
3057 | output: &::I32, | |
e9174d1e SL |
3058 | definition: Named("llvm.aarch64.neon.saddlv.i32.v8i16") |
3059 | }, | |
3060 | "addlvq_u16" => Intrinsic { | |
54a0048b SL |
3061 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
3062 | output: &::U32, | |
e9174d1e SL |
3063 | definition: Named("llvm.aarch64.neon.uaddlv.i32.v8i16") |
3064 | }, | |
3065 | "addlvq_s32" => Intrinsic { | |
54a0048b SL |
3066 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
3067 | output: &::I64, | |
e9174d1e SL |
3068 | definition: Named("llvm.aarch64.neon.saddlv.i64.v4i32") |
3069 | }, | |
3070 | "addlvq_u32" => Intrinsic { | |
54a0048b SL |
3071 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
3072 | output: &::U64, | |
e9174d1e SL |
3073 | definition: Named("llvm.aarch64.neon.uaddlv.i64.v4i32") |
3074 | }, | |
3075 | "maxv_s8" => Intrinsic { | |
54a0048b SL |
3076 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
3077 | output: &::I8, | |
e9174d1e SL |
3078 | definition: Named("llvm.aarch64.neon.smaxv.i8.v8i8") |
3079 | }, | |
3080 | "maxv_u8" => Intrinsic { | |
54a0048b SL |
3081 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
3082 | output: &::U8, | |
e9174d1e SL |
3083 | definition: Named("llvm.aarch64.neon.umaxv.i8.v8i8") |
3084 | }, | |
3085 | "maxv_s16" => Intrinsic { | |
54a0048b SL |
3086 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
3087 | output: &::I16, | |
e9174d1e SL |
3088 | definition: Named("llvm.aarch64.neon.smaxv.i16.v4i16") |
3089 | }, | |
3090 | "maxv_u16" => Intrinsic { | |
54a0048b SL |
3091 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x4]; &INPUTS }, |
3092 | output: &::U16, | |
e9174d1e SL |
3093 | definition: Named("llvm.aarch64.neon.umaxv.i16.v4i16") |
3094 | }, | |
3095 | "maxv_s32" => Intrinsic { | |
54a0048b SL |
3096 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
3097 | output: &::I32, | |
e9174d1e SL |
3098 | definition: Named("llvm.aarch64.neon.smaxv.i32.v2i32") |
3099 | }, | |
3100 | "maxv_u32" => Intrinsic { | |
54a0048b SL |
3101 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
3102 | output: &::U32, | |
e9174d1e SL |
3103 | definition: Named("llvm.aarch64.neon.umaxv.i32.v2i32") |
3104 | }, | |
3105 | "maxv_f32" => Intrinsic { | |
54a0048b SL |
3106 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
3107 | output: &::F32, | |
e9174d1e SL |
3108 | definition: Named("llvm.aarch64.neon.fmaxv.f32.v2f32") |
3109 | }, | |
3110 | "maxvq_s8" => Intrinsic { | |
54a0048b SL |
3111 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
3112 | output: &::I8, | |
e9174d1e SL |
3113 | definition: Named("llvm.aarch64.neon.smaxv.i8.v16i8") |
3114 | }, | |
3115 | "maxvq_u8" => Intrinsic { | |
54a0048b SL |
3116 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
3117 | output: &::U8, | |
e9174d1e SL |
3118 | definition: Named("llvm.aarch64.neon.umaxv.i8.v16i8") |
3119 | }, | |
3120 | "maxvq_s16" => Intrinsic { | |
54a0048b SL |
3121 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
3122 | output: &::I16, | |
e9174d1e SL |
3123 | definition: Named("llvm.aarch64.neon.smaxv.i16.v8i16") |
3124 | }, | |
3125 | "maxvq_u16" => Intrinsic { | |
54a0048b SL |
3126 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
3127 | output: &::U16, | |
e9174d1e SL |
3128 | definition: Named("llvm.aarch64.neon.umaxv.i16.v8i16") |
3129 | }, | |
3130 | "maxvq_s32" => Intrinsic { | |
54a0048b SL |
3131 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
3132 | output: &::I32, | |
e9174d1e SL |
3133 | definition: Named("llvm.aarch64.neon.smaxv.i32.v4i32") |
3134 | }, | |
3135 | "maxvq_u32" => Intrinsic { | |
54a0048b SL |
3136 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
3137 | output: &::U32, | |
e9174d1e SL |
3138 | definition: Named("llvm.aarch64.neon.umaxv.i32.v4i32") |
3139 | }, | |
3140 | "maxvq_f32" => Intrinsic { | |
54a0048b SL |
3141 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
3142 | output: &::F32, | |
e9174d1e SL |
3143 | definition: Named("llvm.aarch64.neon.fmaxv.f32.v4f32") |
3144 | }, | |
3145 | "maxvq_f64" => Intrinsic { | |
54a0048b SL |
3146 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
3147 | output: &::F64, | |
e9174d1e SL |
3148 | definition: Named("llvm.aarch64.neon.fmaxv.f64.v2f64") |
3149 | }, | |
3150 | "minv_s8" => Intrinsic { | |
54a0048b SL |
3151 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x8]; &INPUTS }, |
3152 | output: &::I8, | |
e9174d1e SL |
3153 | definition: Named("llvm.aarch64.neon.sminv.i8.v8i8") |
3154 | }, | |
3155 | "minv_u8" => Intrinsic { | |
54a0048b SL |
3156 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x8]; &INPUTS }, |
3157 | output: &::U8, | |
e9174d1e SL |
3158 | definition: Named("llvm.aarch64.neon.uminv.i8.v8i8") |
3159 | }, | |
3160 | "minv_s16" => Intrinsic { | |
54a0048b SL |
3161 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x4]; &INPUTS }, |
3162 | output: &::I16, | |
e9174d1e SL |
3163 | definition: Named("llvm.aarch64.neon.sminv.i16.v4i16") |
3164 | }, | |
3165 | "minv_u16" => Intrinsic { | |
54a0048b SL |
3166 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x4]; &INPUTS }, |
3167 | output: &::U16, | |
e9174d1e SL |
3168 | definition: Named("llvm.aarch64.neon.uminv.i16.v4i16") |
3169 | }, | |
3170 | "minv_s32" => Intrinsic { | |
54a0048b SL |
3171 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x2]; &INPUTS }, |
3172 | output: &::I32, | |
e9174d1e SL |
3173 | definition: Named("llvm.aarch64.neon.sminv.i32.v2i32") |
3174 | }, | |
3175 | "minv_u32" => Intrinsic { | |
54a0048b SL |
3176 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x2]; &INPUTS }, |
3177 | output: &::U32, | |
e9174d1e SL |
3178 | definition: Named("llvm.aarch64.neon.uminv.i32.v2i32") |
3179 | }, | |
3180 | "minv_f32" => Intrinsic { | |
54a0048b SL |
3181 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
3182 | output: &::F32, | |
e9174d1e SL |
3183 | definition: Named("llvm.aarch64.neon.fminv.f32.v2f32") |
3184 | }, | |
3185 | "minvq_s8" => Intrinsic { | |
54a0048b SL |
3186 | inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS }, |
3187 | output: &::I8, | |
e9174d1e SL |
3188 | definition: Named("llvm.aarch64.neon.sminv.i8.v16i8") |
3189 | }, | |
3190 | "minvq_u8" => Intrinsic { | |
54a0048b SL |
3191 | inputs: { static INPUTS: [&'static Type; 1] = [&::U8x16]; &INPUTS }, |
3192 | output: &::U8, | |
e9174d1e SL |
3193 | definition: Named("llvm.aarch64.neon.uminv.i8.v16i8") |
3194 | }, | |
3195 | "minvq_s16" => Intrinsic { | |
54a0048b SL |
3196 | inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS }, |
3197 | output: &::I16, | |
e9174d1e SL |
3198 | definition: Named("llvm.aarch64.neon.sminv.i16.v8i16") |
3199 | }, | |
3200 | "minvq_u16" => Intrinsic { | |
54a0048b SL |
3201 | inputs: { static INPUTS: [&'static Type; 1] = [&::U16x8]; &INPUTS }, |
3202 | output: &::U16, | |
e9174d1e SL |
3203 | definition: Named("llvm.aarch64.neon.uminv.i16.v8i16") |
3204 | }, | |
3205 | "minvq_s32" => Intrinsic { | |
54a0048b SL |
3206 | inputs: { static INPUTS: [&'static Type; 1] = [&::I32x4]; &INPUTS }, |
3207 | output: &::I32, | |
e9174d1e SL |
3208 | definition: Named("llvm.aarch64.neon.sminv.i32.v4i32") |
3209 | }, | |
3210 | "minvq_u32" => Intrinsic { | |
54a0048b SL |
3211 | inputs: { static INPUTS: [&'static Type; 1] = [&::U32x4]; &INPUTS }, |
3212 | output: &::U32, | |
e9174d1e SL |
3213 | definition: Named("llvm.aarch64.neon.uminv.i32.v4i32") |
3214 | }, | |
3215 | "minvq_f32" => Intrinsic { | |
54a0048b SL |
3216 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
3217 | output: &::F32, | |
e9174d1e SL |
3218 | definition: Named("llvm.aarch64.neon.fminv.f32.v4f32") |
3219 | }, | |
3220 | "minvq_f64" => Intrinsic { | |
54a0048b SL |
3221 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
3222 | output: &::F64, | |
e9174d1e SL |
3223 | definition: Named("llvm.aarch64.neon.fminv.f64.v2f64") |
3224 | }, | |
3225 | "maxnmv_f32" => Intrinsic { | |
54a0048b SL |
3226 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
3227 | output: &::F32, | |
e9174d1e SL |
3228 | definition: Named("llvm.aarch64.neon.fmaxnmv.f32.v2f32") |
3229 | }, | |
3230 | "maxnmvq_f32" => Intrinsic { | |
54a0048b SL |
3231 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
3232 | output: &::F32, | |
e9174d1e SL |
3233 | definition: Named("llvm.aarch64.neon.fmaxnmv.f32.v4f32") |
3234 | }, | |
3235 | "maxnmvq_f64" => Intrinsic { | |
54a0048b SL |
3236 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
3237 | output: &::F64, | |
e9174d1e SL |
3238 | definition: Named("llvm.aarch64.neon.fmaxnmv.f64.v2f64") |
3239 | }, | |
3240 | "minnmv_f32" => Intrinsic { | |
54a0048b SL |
3241 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x2]; &INPUTS }, |
3242 | output: &::F32, | |
e9174d1e SL |
3243 | definition: Named("llvm.aarch64.neon.fminnmv.f32.v2f32") |
3244 | }, | |
3245 | "minnmvq_f32" => Intrinsic { | |
54a0048b SL |
3246 | inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS }, |
3247 | output: &::F32, | |
e9174d1e SL |
3248 | definition: Named("llvm.aarch64.neon.fminnmv.f32.v4f32") |
3249 | }, | |
3250 | "minnmvq_f64" => Intrinsic { | |
54a0048b SL |
3251 | inputs: { static INPUTS: [&'static Type; 1] = [&::F64x2]; &INPUTS }, |
3252 | output: &::F64, | |
e9174d1e SL |
3253 | definition: Named("llvm.aarch64.neon.fminnmv.f64.v2f64") |
3254 | }, | |
3255 | "qtbl1_s8" => Intrinsic { | |
54a0048b SL |
3256 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::U8x8]; &INPUTS }, |
3257 | output: &::I8x8, | |
e9174d1e SL |
3258 | definition: Named("llvm.aarch64.neon.tbl1.v8i8") |
3259 | }, | |
3260 | "qtbl1_u8" => Intrinsic { | |
54a0048b SL |
3261 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x8]; &INPUTS }, |
3262 | output: &::U8x8, | |
e9174d1e SL |
3263 | definition: Named("llvm.aarch64.neon.tbl1.v8i8") |
3264 | }, | |
3265 | "qtbl1q_s8" => Intrinsic { | |
54a0048b SL |
3266 | inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::U8x16]; &INPUTS }, |
3267 | output: &::I8x16, | |
e9174d1e SL |
3268 | definition: Named("llvm.aarch64.neon.tbl1.v16i8") |
3269 | }, | |
3270 | "qtbl1q_u8" => Intrinsic { | |
54a0048b SL |
3271 | inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS }, |
3272 | output: &::U8x16, | |
e9174d1e SL |
3273 | definition: Named("llvm.aarch64.neon.tbl1.v16i8") |
3274 | }, | |
3275 | "qtbx1_s8" => Intrinsic { | |
54a0048b SL |
3276 | inputs: { static INPUTS: [&'static Type; 3] = [&::I8x8, &::I8x16, &::U8x8]; &INPUTS }, |
3277 | output: &::I8x8, | |
e9174d1e SL |
3278 | definition: Named("llvm.aarch64.neon.tbx1.v8i8") |
3279 | }, | |
3280 | "qtbx1_u8" => Intrinsic { | |
54a0048b SL |
3281 | inputs: { static INPUTS: [&'static Type; 3] = [&::U8x8, &::U8x16, &::U8x8]; &INPUTS }, |
3282 | output: &::U8x8, | |
e9174d1e SL |
3283 | definition: Named("llvm.aarch64.neon.tbx1.v8i8") |
3284 | }, | |
3285 | "qtbx1q_s8" => Intrinsic { | |
54a0048b SL |
3286 | inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, &::I8x16, &::U8x16]; &INPUTS }, |
3287 | output: &::I8x16, | |
e9174d1e SL |
3288 | definition: Named("llvm.aarch64.neon.tbx1.v16i8") |
3289 | }, | |
3290 | "qtbx1q_u8" => Intrinsic { | |
54a0048b SL |
3291 | inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U8x16]; &INPUTS }, |
3292 | output: &::U8x16, | |
e9174d1e SL |
3293 | definition: Named("llvm.aarch64.neon.tbx1.v16i8") |
3294 | }, | |
3295 | "qtbl2_s8" => Intrinsic { | |
54a0048b SL |
3296 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3297 | output: &::I8x8, | |
e9174d1e SL |
3298 | definition: Named("llvm.aarch64.neon.tbl2.v8i8") |
3299 | }, | |
3300 | "qtbl2_u8" => Intrinsic { | |
54a0048b SL |
3301 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3302 | output: &::U8x8, | |
e9174d1e SL |
3303 | definition: Named("llvm.aarch64.neon.tbl2.v8i8") |
3304 | }, | |
3305 | "qtbl2q_s8" => Intrinsic { | |
54a0048b SL |
3306 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3307 | output: &::I8x16, | |
e9174d1e SL |
3308 | definition: Named("llvm.aarch64.neon.tbl2.v16i8") |
3309 | }, | |
3310 | "qtbl2q_u8" => Intrinsic { | |
54a0048b SL |
3311 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3312 | output: &::U8x16, | |
e9174d1e SL |
3313 | definition: Named("llvm.aarch64.neon.tbl2.v16i8") |
3314 | }, | |
3315 | "qtbx2_s8" => Intrinsic { | |
54a0048b SL |
3316 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3317 | output: &::I8x8, | |
e9174d1e SL |
3318 | definition: Named("llvm.aarch64.neon.tbx2.v8i8") |
3319 | }, | |
3320 | "qtbx2_u8" => Intrinsic { | |
54a0048b SL |
3321 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3322 | output: &::U8x8, | |
e9174d1e SL |
3323 | definition: Named("llvm.aarch64.neon.tbx2.v8i8") |
3324 | }, | |
3325 | "qtbx2q_s8" => Intrinsic { | |
54a0048b SL |
3326 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3327 | output: &::I8x16, | |
e9174d1e SL |
3328 | definition: Named("llvm.aarch64.neon.tbx2.v16i8") |
3329 | }, | |
3330 | "qtbx2q_u8" => Intrinsic { | |
54a0048b SL |
3331 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3332 | output: &::U8x16, | |
e9174d1e SL |
3333 | definition: Named("llvm.aarch64.neon.tbx2.v16i8") |
3334 | }, | |
3335 | "qtbl3_s8" => Intrinsic { | |
54a0048b SL |
3336 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3337 | output: &::I8x8, | |
e9174d1e SL |
3338 | definition: Named("llvm.aarch64.neon.tbl3.v8i8") |
3339 | }, | |
3340 | "qtbl3_u8" => Intrinsic { | |
54a0048b SL |
3341 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3342 | output: &::U8x8, | |
e9174d1e SL |
3343 | definition: Named("llvm.aarch64.neon.tbl3.v8i8") |
3344 | }, | |
3345 | "qtbl3q_s8" => Intrinsic { | |
54a0048b SL |
3346 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3347 | output: &::I8x16, | |
e9174d1e SL |
3348 | definition: Named("llvm.aarch64.neon.tbl3.v16i8") |
3349 | }, | |
3350 | "qtbl3q_u8" => Intrinsic { | |
54a0048b SL |
3351 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3352 | output: &::U8x16, | |
e9174d1e SL |
3353 | definition: Named("llvm.aarch64.neon.tbl3.v16i8") |
3354 | }, | |
3355 | "qtbx3_s8" => Intrinsic { | |
54a0048b SL |
3356 | inputs: { static INPUTS: [&'static Type; 3] = [&::I8x8, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3357 | output: &::I8x8, | |
e9174d1e SL |
3358 | definition: Named("llvm.aarch64.neon.tbx3.v8i8") |
3359 | }, | |
3360 | "qtbx3_u8" => Intrinsic { | |
54a0048b SL |
3361 | inputs: { static INPUTS: [&'static Type; 3] = [&::U8x8, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3362 | output: &::U8x8, | |
e9174d1e SL |
3363 | definition: Named("llvm.aarch64.neon.tbx3.v8i8") |
3364 | }, | |
3365 | "qtbx3q_s8" => Intrinsic { | |
54a0048b SL |
3366 | inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3367 | output: &::I8x16, | |
e9174d1e SL |
3368 | definition: Named("llvm.aarch64.neon.tbx3.v16i8") |
3369 | }, | |
3370 | "qtbx3q_u8" => Intrinsic { | |
54a0048b SL |
3371 | inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3372 | output: &::U8x16, | |
e9174d1e SL |
3373 | definition: Named("llvm.aarch64.neon.tbx3.v16i8") |
3374 | }, | |
3375 | "qtbl4_s8" => Intrinsic { | |
54a0048b SL |
3376 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::I8x16, &::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3377 | output: &::I8x8, | |
e9174d1e SL |
3378 | definition: Named("llvm.aarch64.neon.tbl4.v8i8") |
3379 | }, | |
3380 | "qtbl4_u8" => Intrinsic { | |
54a0048b SL |
3381 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::U8x16, &::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3382 | output: &::U8x8, | |
e9174d1e SL |
3383 | definition: Named("llvm.aarch64.neon.tbl4.v8i8") |
3384 | }, | |
3385 | "qtbl4q_s8" => Intrinsic { | |
54a0048b SL |
3386 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::I8x16, &::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3387 | output: &::I8x16, | |
e9174d1e SL |
3388 | definition: Named("llvm.aarch64.neon.tbl4.v16i8") |
3389 | }, | |
3390 | "qtbl4q_u8" => Intrinsic { | |
54a0048b SL |
3391 | inputs: { static INPUTS: [&'static Type; 2] = [{ static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::U8x16, &::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3392 | output: &::U8x16, | |
e9174d1e SL |
3393 | definition: Named("llvm.aarch64.neon.tbl4.v16i8") |
3394 | }, | |
3395 | "qtbx4_s8" => Intrinsic { | |
54a0048b SL |
3396 | inputs: { static INPUTS: [&'static Type; 3] = [&::I8x8, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::I8x16, &::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3397 | output: &::I8x8, | |
e9174d1e SL |
3398 | definition: Named("llvm.aarch64.neon.tbx4.v8i8") |
3399 | }, | |
3400 | "qtbx4_u8" => Intrinsic { | |
54a0048b SL |
3401 | inputs: { static INPUTS: [&'static Type; 3] = [&::U8x8, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::U8x16, &::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x8]; &INPUTS }, |
3402 | output: &::U8x8, | |
e9174d1e SL |
3403 | definition: Named("llvm.aarch64.neon.tbx4.v8i8") |
3404 | }, | |
3405 | "qtbx4q_s8" => Intrinsic { | |
54a0048b SL |
3406 | inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::I8x16, &::I8x16, &::I8x16, &::I8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3407 | output: &::I8x16, | |
e9174d1e SL |
3408 | definition: Named("llvm.aarch64.neon.tbx4.v16i8") |
3409 | }, | |
3410 | "qtbx4q_u8" => Intrinsic { | |
54a0048b SL |
3411 | inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, { static AGG: Type = Type::Aggregate(true, { static PARTS: [&'static Type; 4] = [&::U8x16, &::U8x16, &::U8x16, &::U8x16]; &PARTS }); &AGG }, &::U8x16]; &INPUTS }, |
3412 | output: &::U8x16, | |
e9174d1e SL |
3413 | definition: Named("llvm.aarch64.neon.tbx4.v16i8") |
3414 | }, | |
3415 | _ => return None, | |
3416 | }) | |
3417 | } |