[rustc.git] / src / librustc_platform_intrinsics / powerpc.rs

// Copyright 2015 The Rust Project Developers. See the COPYRIGHT
// file at the top-level directory of this distribution and at
// http://rust-lang.org/COPYRIGHT.
//
// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
// option. This file may not be copied, modified, or distributed
// except according to those terms.

// DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
// ignore-tidy-linelength

#![allow(unused_imports)]

use {Intrinsic, Type};
use IntrinsicDef::Named;

// The default inlining settings trigger a pathological behaviour in
// LLVM, which causes makes compilation very slow. See #28273.
#[inline(never)]
pub fn find(name: &str) -> Option<Intrinsic> {
    if !name.starts_with("powerpc") { return None }
    Some(match &name["powerpc".len()..] {
        "_vec_perm" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I8x16]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vperm")
        },
        "_vec_mradds" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vmhraddshs")
        },
        "_vec_cmpb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vcmpbfp")
        },
        "_vec_cmpeqb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vcmpequb")
        },
        "_vec_cmpeqh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vcmpequh")
        },
        "_vec_cmpeqw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vcmpequw")
        },
        "_vec_cmpgtub" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vcmpgtub")
        },
        "_vec_cmpgtuh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vcmpgtuh")
        },
        "_vec_cmpgtuw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vcmpgtuw")
        },
        "_vec_cmpgtsb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vcmpgtsb")
        },
        "_vec_cmpgtsh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vcmpgtsh")
        },
        "_vec_cmpgtsw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vcmpgtsw")
        },
        "_vec_maxsb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vmaxsb")
        },
        "_vec_maxub" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::U8x16,
            definition: Named("llvm.ppc.altivec.vmaxub")
        },
        "_vec_maxsh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vmaxsh")
        },
        "_vec_maxuh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vmaxuh")
        },
        "_vec_maxsw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vmaxsw")
        },
        "_vec_maxuw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vmaxuw")
        },
        "_vec_minsb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vminsb")
        },
        "_vec_minub" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::U8x16,
            definition: Named("llvm.ppc.altivec.vminub")
        },
        "_vec_minsh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vminsh")
        },
        "_vec_minuh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vminuh")
        },
        "_vec_minsw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vminsw")
        },
        "_vec_minuw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vminuw")
        },
        "_vec_subsbs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vsubsbs")
        },
        "_vec_sububs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::U8x16,
            definition: Named("llvm.ppc.altivec.vsububs")
        },
        "_vec_subshs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vsubshs")
        },
        "_vec_subuhs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vsubuhs")
        },
        "_vec_subsws" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vsubsws")
        },
        "_vec_subuws" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vsubuws")
        },
        "_vec_subc" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vsubcuw")
        },
        "_vec_addsbs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vaddsbs")
        },
        "_vec_addubs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::U8x16,
            definition: Named("llvm.ppc.altivec.vaddubs")
        },
        "_vec_addshs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vaddshs")
        },
        "_vec_adduhs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vadduhs")
        },
        "_vec_addsws" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vaddsws")
        },
        "_vec_adduws" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vadduws")
        },
        "_vec_addc" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vaddcuw")
        },
        "_vec_mulesb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vmulesb")
        },
        "_vec_muleub" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vmuleub")
        },
        "_vec_mulesh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vmulesh")
        },
        "_vec_muleuh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vmuleuh")
        },
        "_vec_mulosb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vmulosb")
        },
        "_vec_muloub" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vmuloub")
        },
        "_vec_mulosh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vmulosh")
        },
        "_vec_mulouh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vmulouh")
        },
        "_vec_avgsb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vavgsb")
        },
        "_vec_avgub" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
            output: &::U8x16,
            definition: Named("llvm.ppc.altivec.vavgub")
        },
        "_vec_avgsh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vavgsh")
        },
        "_vec_avguh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vavguh")
        },
        "_vec_avgsw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vavgsw")
        },
        "_vec_avguw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vavguw")
        },
        "_vec_packssh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::I8x16,
            definition: Named("llvm.ppc.altivec.vpkshss")
        },
        "_vec_packsuh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
            output: &::U8x16,
            definition: Named("llvm.ppc.altivec.vpkuhus")
        },
        "_vec_packssw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vpkswss")
        },
        "_vec_packsuw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vpkuwus")
        },
        "_vec_packsush" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
            output: &::U8x16,
            definition: Named("llvm.ppc.altivec.vpkshus")
        },
        "_vec_packsusw" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::U16x8,
            definition: Named("llvm.ppc.altivec.vpkswus")
        },
        "_vec_packpx" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vpkpx")
        },
        "_vec_unpacklsb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vupklsb")
        },
        "_vec_unpacklsh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vupklsh")
        },
        "_vec_unpackhsb" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vupkhsb")
        },
        "_vec_unpackhsh" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vupkhsh")
        },
        "_vec_madds" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
            output: &::I16x8,
            definition: Named("llvm.ppc.altivec.vmhaddshs")
        },
        "_vec_msumubm" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vmsumubm")
        },
        "_vec_msumuhm" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vmsumuhm")
        },
        "_vec_msummbm" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, &::U8x16, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vmsummbm")
        },
        "_vec_msumshm" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vmsumshm")
        },
        "_vec_msumshs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vmsumshs")
        },
        "_vec_msumuhs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vmsumuhs")
        },
        "_vec_sum2s" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vsum2sws")
        },
        "_vec_sum4sbs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vsum4sbs")
        },
        "_vec_sum4ubs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U32x4]; &INPUTS },
            output: &::U32x4,
            definition: Named("llvm.ppc.altivec.vsum4ubs")
        },
        "_vec_sum4shs" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vsum4shs")
        },
        "_vec_sums" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
            output: &::I32x4,
            definition: Named("llvm.ppc.altivec.vsumsws")
        },
        "_vec_madd" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vmaddfp")
        },
        "_vec_nmsub" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vnmsubfp")
        },
        "_vec_expte" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vexptefp")
        },
        "_vec_floor" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vrfim")
        },
        "_vec_ceil" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vrfip")
        },
        "_vec_round" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vrfin")
        },
        "_vec_trunc" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vrfiz")
        },
        "_vec_loge" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vlogefp")
        },
        "_vec_re" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vrefp")
        },
        "_vec_rsqrte" => Intrinsic {
            inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
            output: &::F32x4,
            definition: Named("llvm.ppc.altivec.vrsqrtefp")
        },
        _ => return None,
    })
}
Commit	Line	Data
3b2f2976 XL	1	// Copyright 2015 The Rust Project Developers. See the COPYRIGHT
	2	// file at the top-level directory of this distribution and at
	3	// http://rust-lang.org/COPYRIGHT.
	4	//
	5	// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
	6	// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
	7	// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
	8	// option. This file may not be copied, modified, or distributed
	9	// except according to those terms.
	10
	11	// DO NOT EDIT: autogenerated by etc/platform-intrinsics/generator.py
	12	// ignore-tidy-linelength
	13
	14	#![allow(unused_imports)]
	15
	16	use {Intrinsic, Type};
	17	use IntrinsicDef::Named;
	18
	19	// The default inlining settings trigger a pathological behaviour in
	20	// LLVM, which causes makes compilation very slow. See #28273.
	21	#[inline(never)]
	22	pub fn find(name: &str) -> Option<Intrinsic> {
	23	if !name.starts_with("powerpc") { return None }
	24	Some(match &name["powerpc".len()..] {
	25	"_vec_perm" => Intrinsic {
	26	inputs: { static INPUTS: [&'static Type; 3] = [&::I32x4, &::I32x4, &::I8x16]; &INPUTS },
	27	output: &::I32x4,
	28	definition: Named("llvm.ppc.altivec.vperm")
	29	},
	30	"_vec_mradds" => Intrinsic {
	31	inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
	32	output: &::I16x8,
	33	definition: Named("llvm.ppc.altivec.vmhraddshs")
	34	},
	35	"_vec_cmpb" => Intrinsic {
	36	inputs: { static INPUTS: [&'static Type; 2] = [&::F32x4, &::F32x4]; &INPUTS },
	37	output: &::I32x4,
	38	definition: Named("llvm.ppc.altivec.vcmpbfp")
	39	},
	40	"_vec_cmpeqb" => Intrinsic {
	41	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
	42	output: &::I8x16,
	43	definition: Named("llvm.ppc.altivec.vcmpequb")
	44	},
	45	"_vec_cmpeqh" => Intrinsic {
	46	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
	47	output: &::I16x8,
	48	definition: Named("llvm.ppc.altivec.vcmpequh")
	49	},
	50	"_vec_cmpeqw" => Intrinsic {
	51	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
	52	output: &::I32x4,
	53	definition: Named("llvm.ppc.altivec.vcmpequw")
	54	},
	55	"_vec_cmpgtub" => Intrinsic {
	56	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
	57	output: &::I8x16,
	58	definition: Named("llvm.ppc.altivec.vcmpgtub")
	59	},
	60	"_vec_cmpgtuh" => Intrinsic {
	61	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
	62	output: &::I16x8,
	63	definition: Named("llvm.ppc.altivec.vcmpgtuh")
	64	},
65	"_vec_cmpgtuw" => Intrinsic {
66	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
67	output: &::I32x4,
68	definition: Named("llvm.ppc.altivec.vcmpgtuw")
69	},
70	"_vec_cmpgtsb" => Intrinsic {
71	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
72	output: &::I8x16,
73	definition: Named("llvm.ppc.altivec.vcmpgtsb")
74	},
75	"_vec_cmpgtsh" => Intrinsic {
76	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
77	output: &::I16x8,
78	definition: Named("llvm.ppc.altivec.vcmpgtsh")
79	},
80	"_vec_cmpgtsw" => Intrinsic {
81	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
82	output: &::I32x4,
83	definition: Named("llvm.ppc.altivec.vcmpgtsw")
84	},
85	"_vec_maxsb" => Intrinsic {
86	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
87	output: &::I8x16,
88	definition: Named("llvm.ppc.altivec.vmaxsb")
89	},
90	"_vec_maxub" => Intrinsic {
91	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
92	output: &::U8x16,
93	definition: Named("llvm.ppc.altivec.vmaxub")
94	},
95	"_vec_maxsh" => Intrinsic {
96	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
97	output: &::I16x8,
98	definition: Named("llvm.ppc.altivec.vmaxsh")
99	},
100	"_vec_maxuh" => Intrinsic {
101	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
102	output: &::U16x8,
103	definition: Named("llvm.ppc.altivec.vmaxuh")
104	},
105	"_vec_maxsw" => Intrinsic {
106	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
107	output: &::I32x4,
108	definition: Named("llvm.ppc.altivec.vmaxsw")
109	},
110	"_vec_maxuw" => Intrinsic {
111	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
112	output: &::U32x4,
113	definition: Named("llvm.ppc.altivec.vmaxuw")
114	},
115	"_vec_minsb" => Intrinsic {
116	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
117	output: &::I8x16,
118	definition: Named("llvm.ppc.altivec.vminsb")
119	},
120	"_vec_minub" => Intrinsic {
121	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
122	output: &::U8x16,
123	definition: Named("llvm.ppc.altivec.vminub")
124	},
125	"_vec_minsh" => Intrinsic {
126	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
127	output: &::I16x8,
128	definition: Named("llvm.ppc.altivec.vminsh")
129	},
130	"_vec_minuh" => Intrinsic {
131	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
132	output: &::U16x8,
133	definition: Named("llvm.ppc.altivec.vminuh")
134	},
135	"_vec_minsw" => Intrinsic {
136	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
137	output: &::I32x4,
138	definition: Named("llvm.ppc.altivec.vminsw")
139	},
140	"_vec_minuw" => Intrinsic {
141	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
142	output: &::U32x4,
143	definition: Named("llvm.ppc.altivec.vminuw")
144	},
145	"_vec_subsbs" => Intrinsic {
146	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
147	output: &::I8x16,
148	definition: Named("llvm.ppc.altivec.vsubsbs")
149	},
150	"_vec_sububs" => Intrinsic {
151	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
152	output: &::U8x16,
153	definition: Named("llvm.ppc.altivec.vsububs")
154	},
155	"_vec_subshs" => Intrinsic {
156	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
157	output: &::I16x8,
158	definition: Named("llvm.ppc.altivec.vsubshs")
159	},
160	"_vec_subuhs" => Intrinsic {
161	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
162	output: &::U16x8,
163	definition: Named("llvm.ppc.altivec.vsubuhs")
164	},
165	"_vec_subsws" => Intrinsic {
166	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
167	output: &::I32x4,
168	definition: Named("llvm.ppc.altivec.vsubsws")
169	},
170	"_vec_subuws" => Intrinsic {
171	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
172	output: &::U32x4,
173	definition: Named("llvm.ppc.altivec.vsubuws")
174	},
175	"_vec_subc" => Intrinsic {
176	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
177	output: &::U32x4,
178	definition: Named("llvm.ppc.altivec.vsubcuw")
179	},
180	"_vec_addsbs" => Intrinsic {
181	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
182	output: &::I8x16,
183	definition: Named("llvm.ppc.altivec.vaddsbs")
184	},
185	"_vec_addubs" => Intrinsic {
186	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
187	output: &::U8x16,
188	definition: Named("llvm.ppc.altivec.vaddubs")
189	},
190	"_vec_addshs" => Intrinsic {
191	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
192	output: &::I16x8,
193	definition: Named("llvm.ppc.altivec.vaddshs")
194	},
195	"_vec_adduhs" => Intrinsic {
196	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
197	output: &::U16x8,
198	definition: Named("llvm.ppc.altivec.vadduhs")
199	},
200	"_vec_addsws" => Intrinsic {
201	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
202	output: &::I32x4,
203	definition: Named("llvm.ppc.altivec.vaddsws")
204	},
205	"_vec_adduws" => Intrinsic {
206	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
207	output: &::U32x4,
208	definition: Named("llvm.ppc.altivec.vadduws")
209	},
210	"_vec_addc" => Intrinsic {
211	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
212	output: &::U32x4,
213	definition: Named("llvm.ppc.altivec.vaddcuw")
214	},
215	"_vec_mulesb" => Intrinsic {
216	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
217	output: &::I16x8,
218	definition: Named("llvm.ppc.altivec.vmulesb")
219	},
220	"_vec_muleub" => Intrinsic {
221	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
222	output: &::U16x8,
223	definition: Named("llvm.ppc.altivec.vmuleub")
224	},
225	"_vec_mulesh" => Intrinsic {
226	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
227	output: &::I32x4,
228	definition: Named("llvm.ppc.altivec.vmulesh")
229	},
230	"_vec_muleuh" => Intrinsic {
231	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
232	output: &::U32x4,
233	definition: Named("llvm.ppc.altivec.vmuleuh")
234	},
235	"_vec_mulosb" => Intrinsic {
236	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
237	output: &::I16x8,
238	definition: Named("llvm.ppc.altivec.vmulosb")
239	},
240	"_vec_muloub" => Intrinsic {
241	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
242	output: &::U16x8,
243	definition: Named("llvm.ppc.altivec.vmuloub")
244	},
245	"_vec_mulosh" => Intrinsic {
246	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
247	output: &::I32x4,
248	definition: Named("llvm.ppc.altivec.vmulosh")
249	},
250	"_vec_mulouh" => Intrinsic {
251	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
252	output: &::U32x4,
253	definition: Named("llvm.ppc.altivec.vmulouh")
254	},
255	"_vec_avgsb" => Intrinsic {
256	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I8x16]; &INPUTS },
257	output: &::I8x16,
258	definition: Named("llvm.ppc.altivec.vavgsb")
259	},
260	"_vec_avgub" => Intrinsic {
261	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U8x16]; &INPUTS },
262	output: &::U8x16,
263	definition: Named("llvm.ppc.altivec.vavgub")
264	},
265	"_vec_avgsh" => Intrinsic {
266	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
267	output: &::I16x8,
268	definition: Named("llvm.ppc.altivec.vavgsh")
269	},
270	"_vec_avguh" => Intrinsic {
271	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
272	output: &::U16x8,
273	definition: Named("llvm.ppc.altivec.vavguh")
274	},
275	"_vec_avgsw" => Intrinsic {
276	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
277	output: &::I32x4,
278	definition: Named("llvm.ppc.altivec.vavgsw")
279	},
280	"_vec_avguw" => Intrinsic {
281	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
282	output: &::U32x4,
283	definition: Named("llvm.ppc.altivec.vavguw")
284	},
285	"_vec_packssh" => Intrinsic {
286	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
287	output: &::I8x16,
288	definition: Named("llvm.ppc.altivec.vpkshss")
289	},
290	"_vec_packsuh" => Intrinsic {
291	inputs: { static INPUTS: [&'static Type; 2] = [&::U16x8, &::U16x8]; &INPUTS },
292	output: &::U8x16,
293	definition: Named("llvm.ppc.altivec.vpkuhus")
294	},
295	"_vec_packssw" => Intrinsic {
296	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
297	output: &::I16x8,
298	definition: Named("llvm.ppc.altivec.vpkswss")
299	},
300	"_vec_packsuw" => Intrinsic {
301	inputs: { static INPUTS: [&'static Type; 2] = [&::U32x4, &::U32x4]; &INPUTS },
302	output: &::U16x8,
303	definition: Named("llvm.ppc.altivec.vpkuwus")
304	},
305	"_vec_packsush" => Intrinsic {
306	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I16x8]; &INPUTS },
307	output: &::U8x16,
308	definition: Named("llvm.ppc.altivec.vpkshus")
309	},
310	"_vec_packsusw" => Intrinsic {
311	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
312	output: &::U16x8,
313	definition: Named("llvm.ppc.altivec.vpkswus")
314	},
315	"_vec_packpx" => Intrinsic {
316	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
317	output: &::I16x8,
318	definition: Named("llvm.ppc.altivec.vpkpx")
319	},
320	"_vec_unpacklsb" => Intrinsic {
321	inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
322	output: &::I16x8,
323	definition: Named("llvm.ppc.altivec.vupklsb")
324	},
325	"_vec_unpacklsh" => Intrinsic {
326	inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
327	output: &::I32x4,
328	definition: Named("llvm.ppc.altivec.vupklsh")
329	},
330	"_vec_unpackhsb" => Intrinsic {
331	inputs: { static INPUTS: [&'static Type; 1] = [&::I8x16]; &INPUTS },
332	output: &::I16x8,
333	definition: Named("llvm.ppc.altivec.vupkhsb")
334	},
335	"_vec_unpackhsh" => Intrinsic {
336	inputs: { static INPUTS: [&'static Type; 1] = [&::I16x8]; &INPUTS },
337	output: &::I32x4,
338	definition: Named("llvm.ppc.altivec.vupkhsh")
339	},
ea8adc8c XL	340	"_vec_madds" => Intrinsic {
	341	inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I16x8]; &INPUTS },
	342	output: &::I16x8,
	343	definition: Named("llvm.ppc.altivec.vmhaddshs")
	344	},
	345	"_vec_msumubm" => Intrinsic {
	346	inputs: { static INPUTS: [&'static Type; 3] = [&::U8x16, &::U8x16, &::U32x4]; &INPUTS },
	347	output: &::U32x4,
	348	definition: Named("llvm.ppc.altivec.vmsumubm")
	349	},
	350	"_vec_msumuhm" => Intrinsic {
	351	inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
	352	output: &::U32x4,
	353	definition: Named("llvm.ppc.altivec.vmsumuhm")
	354	},
	355	"_vec_msummbm" => Intrinsic {
	356	inputs: { static INPUTS: [&'static Type; 3] = [&::I8x16, &::U8x16, &::I32x4]; &INPUTS },
	357	output: &::I32x4,
	358	definition: Named("llvm.ppc.altivec.vmsummbm")
	359	},
	360	"_vec_msumshm" => Intrinsic {
	361	inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
	362	output: &::I32x4,
	363	definition: Named("llvm.ppc.altivec.vmsumshm")
	364	},
	365	"_vec_msumshs" => Intrinsic {
	366	inputs: { static INPUTS: [&'static Type; 3] = [&::I16x8, &::I16x8, &::I32x4]; &INPUTS },
	367	output: &::I32x4,
	368	definition: Named("llvm.ppc.altivec.vmsumshs")
	369	},
	370	"_vec_msumuhs" => Intrinsic {
	371	inputs: { static INPUTS: [&'static Type; 3] = [&::U16x8, &::U16x8, &::U32x4]; &INPUTS },
	372	output: &::U32x4,
	373	definition: Named("llvm.ppc.altivec.vmsumuhs")
	374	},
	375	"_vec_sum2s" => Intrinsic {
	376	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
	377	output: &::I32x4,
	378	definition: Named("llvm.ppc.altivec.vsum2sws")
	379	},
	380	"_vec_sum4sbs" => Intrinsic {
	381	inputs: { static INPUTS: [&'static Type; 2] = [&::I8x16, &::I32x4]; &INPUTS },
	382	output: &::I32x4,
	383	definition: Named("llvm.ppc.altivec.vsum4sbs")
	384	},
	385	"_vec_sum4ubs" => Intrinsic {
	386	inputs: { static INPUTS: [&'static Type; 2] = [&::U8x16, &::U32x4]; &INPUTS },
	387	output: &::U32x4,
	388	definition: Named("llvm.ppc.altivec.vsum4ubs")
	389	},
	390	"_vec_sum4shs" => Intrinsic {
	391	inputs: { static INPUTS: [&'static Type; 2] = [&::I16x8, &::I32x4]; &INPUTS },
	392	output: &::I32x4,
	393	definition: Named("llvm.ppc.altivec.vsum4shs")
	394	},
	395	"_vec_sums" => Intrinsic {
	396	inputs: { static INPUTS: [&'static Type; 2] = [&::I32x4, &::I32x4]; &INPUTS },
	397	output: &::I32x4,
	398	definition: Named("llvm.ppc.altivec.vsumsws")
	399	},
	400	"_vec_madd" => Intrinsic {
	401	inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
	402	output: &::F32x4,
	403	definition: Named("llvm.ppc.altivec.vmaddfp")
404	},
405	"_vec_nmsub" => Intrinsic {
406	inputs: { static INPUTS: [&'static Type; 3] = [&::F32x4, &::F32x4, &::F32x4]; &INPUTS },
407	output: &::F32x4,
408	definition: Named("llvm.ppc.altivec.vnmsubfp")
409	},
410	"_vec_expte" => Intrinsic {
411	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
412	output: &::F32x4,
413	definition: Named("llvm.ppc.altivec.vexptefp")
414	},
415	"_vec_floor" => Intrinsic {
416	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
417	output: &::F32x4,
418	definition: Named("llvm.ppc.altivec.vrfim")
419	},
420	"_vec_ceil" => Intrinsic {
421	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
422	output: &::F32x4,
423	definition: Named("llvm.ppc.altivec.vrfip")
424	},
425	"_vec_round" => Intrinsic {
426	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
427	output: &::F32x4,
428	definition: Named("llvm.ppc.altivec.vrfin")
429	},
430	"_vec_trunc" => Intrinsic {
431	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
432	output: &::F32x4,
433	definition: Named("llvm.ppc.altivec.vrfiz")
434	},
435	"_vec_loge" => Intrinsic {
436	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
437	output: &::F32x4,
438	definition: Named("llvm.ppc.altivec.vlogefp")
439	},
440	"_vec_re" => Intrinsic {
441	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
442	output: &::F32x4,
443	definition: Named("llvm.ppc.altivec.vrefp")
444	},
445	"_vec_rsqrte" => Intrinsic {
446	inputs: { static INPUTS: [&'static Type; 1] = [&::F32x4]; &INPUTS },
447	output: &::F32x4,
448	definition: Named("llvm.ppc.altivec.vrsqrtefp")
449	},
3b2f2976 XL	450	_ => return None,
	451	})
	452	}