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1 | //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===// |
2 | // | |
3 | // The LLVM Compiler Infrastructure | |
4 | // | |
5 | // This file is distributed under the University of Illinois Open Source | |
6 | // License. See LICENSE.TXT for details. | |
7 | // | |
8 | //===----------------------------------------------------------------------===// | |
9 | // | |
10 | // This implements routines for translating functions from LLVM IR into | |
11 | // Machine IR. | |
12 | // | |
13 | //===----------------------------------------------------------------------===// | |
14 | ||
15 | #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H | |
16 | #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H | |
17 | ||
223e47cc LB |
18 | #include "llvm/ADT/APInt.h" |
19 | #include "llvm/ADT/DenseMap.h" | |
223e47cc LB |
20 | #include "llvm/ADT/IndexedMap.h" |
21 | #include "llvm/ADT/SmallPtrSet.h" | |
22 | #include "llvm/ADT/SmallVector.h" | |
1a4d82fc | 23 | #include "llvm/CodeGen/ISDOpcodes.h" |
85aaf69f | 24 | #include "llvm/CodeGen/MachineBasicBlock.h" |
970d7e83 LB |
25 | #include "llvm/IR/InlineAsm.h" |
26 | #include "llvm/IR/Instructions.h" | |
223e47cc LB |
27 | #include "llvm/Target/TargetRegisterInfo.h" |
28 | #include <vector> | |
29 | ||
30 | namespace llvm { | |
31 | ||
32 | class AllocaInst; | |
33 | class BasicBlock; | |
970d7e83 | 34 | class BranchProbabilityInfo; |
223e47cc LB |
35 | class CallInst; |
36 | class Function; | |
37 | class GlobalVariable; | |
38 | class Instruction; | |
39 | class MachineInstr; | |
40 | class MachineBasicBlock; | |
41 | class MachineFunction; | |
42 | class MachineModuleInfo; | |
43 | class MachineRegisterInfo; | |
1a4d82fc JJ |
44 | class SelectionDAG; |
45 | class MVT; | |
223e47cc LB |
46 | class TargetLowering; |
47 | class Value; | |
48 | ||
49 | //===--------------------------------------------------------------------===// | |
50 | /// FunctionLoweringInfo - This contains information that is global to a | |
51 | /// function that is used when lowering a region of the function. | |
52 | /// | |
53 | class FunctionLoweringInfo { | |
54 | public: | |
223e47cc LB |
55 | const Function *Fn; |
56 | MachineFunction *MF; | |
85aaf69f | 57 | const TargetLowering *TLI; |
223e47cc LB |
58 | MachineRegisterInfo *RegInfo; |
59 | BranchProbabilityInfo *BPI; | |
60 | /// CanLowerReturn - true iff the function's return value can be lowered to | |
61 | /// registers. | |
62 | bool CanLowerReturn; | |
63 | ||
64 | /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg | |
65 | /// allocated to hold a pointer to the hidden sret parameter. | |
66 | unsigned DemoteRegister; | |
67 | ||
68 | /// MBBMap - A mapping from LLVM basic blocks to their machine code entry. | |
69 | DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap; | |
70 | ||
71 | /// ValueMap - Since we emit code for the function a basic block at a time, | |
72 | /// we must remember which virtual registers hold the values for | |
73 | /// cross-basic-block values. | |
74 | DenseMap<const Value*, unsigned> ValueMap; | |
75 | ||
76 | /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in | |
77 | /// the entry block. This allows the allocas to be efficiently referenced | |
78 | /// anywhere in the function. | |
79 | DenseMap<const AllocaInst*, int> StaticAllocaMap; | |
80 | ||
81 | /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments. | |
82 | DenseMap<const Argument*, int> ByValArgFrameIndexMap; | |
83 | ||
84 | /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for | |
85 | /// function arguments that are inserted after scheduling is completed. | |
86 | SmallVector<MachineInstr*, 8> ArgDbgValues; | |
87 | ||
88 | /// RegFixups - Registers which need to be replaced after isel is done. | |
89 | DenseMap<unsigned, unsigned> RegFixups; | |
90 | ||
85aaf69f SL |
91 | /// StatepointStackSlots - A list of temporary stack slots (frame indices) |
92 | /// used to spill values at a statepoint. We store them here to enable | |
93 | /// reuse of the same stack slots across different statepoints in different | |
94 | /// basic blocks. | |
95 | SmallVector<unsigned, 50> StatepointStackSlots; | |
96 | ||
223e47cc LB |
97 | /// MBB - The current block. |
98 | MachineBasicBlock *MBB; | |
99 | ||
100 | /// MBB - The current insert position inside the current block. | |
101 | MachineBasicBlock::iterator InsertPt; | |
102 | ||
103 | #ifndef NDEBUG | |
104 | SmallPtrSet<const Instruction *, 8> CatchInfoLost; | |
105 | SmallPtrSet<const Instruction *, 8> CatchInfoFound; | |
106 | #endif | |
107 | ||
108 | struct LiveOutInfo { | |
109 | unsigned NumSignBits : 31; | |
110 | bool IsValid : 1; | |
111 | APInt KnownOne, KnownZero; | |
112 | LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), | |
113 | KnownZero(1, 0) {} | |
114 | }; | |
115 | ||
1a4d82fc JJ |
116 | /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) |
117 | /// for a value. | |
118 | DenseMap<const Value *, ISD::NodeType> PreferredExtendType; | |
119 | ||
223e47cc LB |
120 | /// VisitedBBs - The set of basic blocks visited thus far by instruction |
121 | /// selection. | |
122 | SmallPtrSet<const BasicBlock*, 4> VisitedBBs; | |
123 | ||
124 | /// PHINodesToUpdate - A list of phi instructions whose operand list will | |
125 | /// be updated after processing the current basic block. | |
126 | /// TODO: This isn't per-function state, it's per-basic-block state. But | |
127 | /// there's no other convenient place for it to live right now. | |
128 | std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate; | |
1a4d82fc JJ |
129 | unsigned OrigNumPHINodesToUpdate; |
130 | ||
131 | /// If the current MBB is a landing pad, the exception pointer and exception | |
132 | /// selector registers are copied into these virtual registers by | |
133 | /// SelectionDAGISel::PrepareEHLandingPad(). | |
134 | unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg; | |
223e47cc | 135 | |
223e47cc LB |
136 | /// set - Initialize this FunctionLoweringInfo with the given Function |
137 | /// and its associated MachineFunction. | |
138 | /// | |
1a4d82fc | 139 | void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG); |
223e47cc LB |
140 | |
141 | /// clear - Clear out all the function-specific state. This returns this | |
142 | /// FunctionLoweringInfo to an empty state, ready to be used for a | |
143 | /// different function. | |
144 | void clear(); | |
145 | ||
146 | /// isExportedInst - Return true if the specified value is an instruction | |
147 | /// exported from its block. | |
148 | bool isExportedInst(const Value *V) { | |
149 | return ValueMap.count(V); | |
150 | } | |
151 | ||
970d7e83 | 152 | unsigned CreateReg(MVT VT); |
223e47cc LB |
153 | |
154 | unsigned CreateRegs(Type *Ty); | |
155 | ||
156 | unsigned InitializeRegForValue(const Value *V) { | |
157 | unsigned &R = ValueMap[V]; | |
158 | assert(R == 0 && "Already initialized this value register!"); | |
159 | return R = CreateRegs(V->getType()); | |
160 | } | |
161 | ||
162 | /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the | |
163 | /// register is a PHI destination and the PHI's LiveOutInfo is not valid. | |
164 | const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) { | |
165 | if (!LiveOutRegInfo.inBounds(Reg)) | |
1a4d82fc | 166 | return nullptr; |
223e47cc LB |
167 | |
168 | const LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; | |
169 | if (!LOI->IsValid) | |
1a4d82fc | 170 | return nullptr; |
223e47cc LB |
171 | |
172 | return LOI; | |
173 | } | |
174 | ||
175 | /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the | |
176 | /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If | |
177 | /// the register's LiveOutInfo is for a smaller bit width, it is extended to | |
178 | /// the larger bit width by zero extension. The bit width must be no smaller | |
179 | /// than the LiveOutInfo's existing bit width. | |
180 | const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth); | |
181 | ||
182 | /// AddLiveOutRegInfo - Adds LiveOutInfo for a register. | |
183 | void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, | |
184 | const APInt &KnownZero, const APInt &KnownOne) { | |
185 | // Only install this information if it tells us something. | |
186 | if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) | |
187 | return; | |
188 | ||
189 | LiveOutRegInfo.grow(Reg); | |
190 | LiveOutInfo &LOI = LiveOutRegInfo[Reg]; | |
191 | LOI.NumSignBits = NumSignBits; | |
192 | LOI.KnownOne = KnownOne; | |
193 | LOI.KnownZero = KnownZero; | |
194 | } | |
195 | ||
196 | /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination | |
197 | /// register based on the LiveOutInfo of its operands. | |
198 | void ComputePHILiveOutRegInfo(const PHINode*); | |
199 | ||
200 | /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be | |
201 | /// called when a block is visited before all of its predecessors. | |
202 | void InvalidatePHILiveOutRegInfo(const PHINode *PN) { | |
203 | // PHIs with no uses have no ValueMap entry. | |
204 | DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN); | |
205 | if (It == ValueMap.end()) | |
206 | return; | |
207 | ||
208 | unsigned Reg = It->second; | |
85aaf69f SL |
209 | if (Reg == 0) |
210 | return; | |
211 | ||
223e47cc LB |
212 | LiveOutRegInfo.grow(Reg); |
213 | LiveOutRegInfo[Reg].IsValid = false; | |
214 | } | |
215 | ||
216 | /// setArgumentFrameIndex - Record frame index for the byval | |
217 | /// argument. | |
218 | void setArgumentFrameIndex(const Argument *A, int FI); | |
219 | ||
220 | /// getArgumentFrameIndex - Get frame index for the byval argument. | |
221 | int getArgumentFrameIndex(const Argument *A); | |
222 | ||
223 | private: | |
224 | /// LiveOutRegInfo - Information about live out vregs. | |
225 | IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo; | |
226 | }; | |
227 | ||
228 | /// ComputeUsesVAFloatArgument - Determine if any floating-point values are | |
229 | /// being passed to this variadic function, and set the MachineModuleInfo's | |
230 | /// usesVAFloatArgument flag if so. This flag is used to emit an undefined | |
231 | /// reference to _fltused on Windows, which will link in MSVCRT's | |
232 | /// floating-point support. | |
233 | void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI); | |
234 | ||
235 | /// AddCatchInfo - Extract the personality and type infos from an eh.selector | |
236 | /// call, and add them to the specified machine basic block. | |
237 | void AddCatchInfo(const CallInst &I, | |
238 | MachineModuleInfo *MMI, MachineBasicBlock *MBB); | |
239 | ||
240 | /// AddLandingPadInfo - Extract the exception handling information from the | |
241 | /// landingpad instruction and add them to the specified machine module info. | |
242 | void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI, | |
243 | MachineBasicBlock *MBB); | |
244 | ||
245 | } // end namespace llvm | |
246 | ||
247 | #endif |