]>
Commit | Line | Data |
---|---|---|
223e47cc LB |
1 | //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===// |
2 | // | |
3 | // The LLVM Compiler Infrastructure | |
4 | // | |
5 | // This file is distributed under the University of Illinois Open Source | |
6 | // License. See LICENSE.TXT for details. | |
7 | // | |
8 | //===----------------------------------------------------------------------===// | |
9 | // | |
10 | // This file contains the Thumb-1 implementation of the TargetInstrInfo class. | |
11 | // | |
12 | //===----------------------------------------------------------------------===// | |
13 | ||
1a4d82fc JJ |
14 | #ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H |
15 | #define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H | |
223e47cc | 16 | |
223e47cc LB |
17 | #include "ARMBaseInstrInfo.h" |
18 | #include "Thumb1RegisterInfo.h" | |
19 | ||
20 | namespace llvm { | |
21 | class ARMSubtarget; | |
22 | ||
23 | class Thumb1InstrInfo : public ARMBaseInstrInfo { | |
24 | Thumb1RegisterInfo RI; | |
25 | public: | |
26 | explicit Thumb1InstrInfo(const ARMSubtarget &STI); | |
27 | ||
28 | /// getNoopForMachoTarget - Return the noop instruction to use for a noop. | |
1a4d82fc | 29 | void getNoopForMachoTarget(MCInst &NopInst) const override; |
223e47cc LB |
30 | |
31 | // Return the non-pre/post incrementing version of 'Opc'. Return 0 | |
32 | // if there is not such an opcode. | |
1a4d82fc | 33 | unsigned getUnindexedOpcode(unsigned Opc) const override; |
223e47cc LB |
34 | |
35 | /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As | |
36 | /// such, whenever a client has an instance of instruction info, it should | |
37 | /// always be able to get register info as well (through this method). | |
38 | /// | |
1a4d82fc | 39 | const Thumb1RegisterInfo &getRegisterInfo() const override { return RI; } |
223e47cc LB |
40 | |
41 | void copyPhysReg(MachineBasicBlock &MBB, | |
42 | MachineBasicBlock::iterator I, DebugLoc DL, | |
43 | unsigned DestReg, unsigned SrcReg, | |
1a4d82fc | 44 | bool KillSrc) const override; |
223e47cc LB |
45 | void storeRegToStackSlot(MachineBasicBlock &MBB, |
46 | MachineBasicBlock::iterator MBBI, | |
47 | unsigned SrcReg, bool isKill, int FrameIndex, | |
48 | const TargetRegisterClass *RC, | |
1a4d82fc | 49 | const TargetRegisterInfo *TRI) const override; |
223e47cc LB |
50 | |
51 | void loadRegFromStackSlot(MachineBasicBlock &MBB, | |
52 | MachineBasicBlock::iterator MBBI, | |
53 | unsigned DestReg, int FrameIndex, | |
54 | const TargetRegisterClass *RC, | |
1a4d82fc | 55 | const TargetRegisterInfo *TRI) const override; |
223e47cc | 56 | |
1a4d82fc JJ |
57 | private: |
58 | void expandLoadStackGuard(MachineBasicBlock::iterator MI, | |
59 | Reloc::Model RM) const override; | |
223e47cc LB |
60 | }; |
61 | } | |
62 | ||
1a4d82fc | 63 | #endif |