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1 | //===- Thumb2RegisterInfo.h - Thumb-2 Register Information Impl -*- C++ -*-===// |
2 | // | |
3 | // The LLVM Compiler Infrastructure | |
4 | // | |
5 | // This file is distributed under the University of Illinois Open Source | |
6 | // License. See LICENSE.TXT for details. | |
7 | // | |
8 | //===----------------------------------------------------------------------===// | |
9 | // | |
10 | // This file contains the Thumb-2 implementation of the TargetRegisterInfo | |
11 | // class. | |
12 | // | |
13 | //===----------------------------------------------------------------------===// | |
14 | ||
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15 | #ifndef LLVM_LIB_TARGET_ARM_THUMB2REGISTERINFO_H |
16 | #define LLVM_LIB_TARGET_ARM_THUMB2REGISTERINFO_H | |
223e47cc | 17 | |
223e47cc | 18 | #include "ARMBaseRegisterInfo.h" |
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19 | |
20 | namespace llvm { | |
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21 | |
22 | class ARMSubtarget; | |
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23 | |
24 | struct Thumb2RegisterInfo : public ARMBaseRegisterInfo { | |
25 | public: | |
1a4d82fc | 26 | Thumb2RegisterInfo(const ARMSubtarget &STI); |
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27 | |
28 | /// emitLoadConstPool - Emits a load from constpool to materialize the | |
29 | /// specified immediate. | |
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30 | void |
31 | emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, | |
32 | DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, | |
33 | ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0, | |
34 | unsigned MIFlags = MachineInstr::NoFlags) const override; | |
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35 | }; |
36 | } | |
37 | ||
1a4d82fc | 38 | #endif |