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1 | //===---- MipsISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips --------===// |
2 | // | |
3 | // The LLVM Compiler Infrastructure | |
4 | // | |
5 | // This file is distributed under the University of Illinois Open Source | |
6 | // License. See LICENSE.TXT for details. | |
7 | // | |
8 | //===----------------------------------------------------------------------===// | |
9 | // | |
10 | // This file defines an instruction selector for the MIPS target. | |
11 | // | |
12 | //===----------------------------------------------------------------------===// | |
13 | ||
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14 | #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H |
15 | #define LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H | |
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16 | |
17 | #include "Mips.h" | |
18 | #include "MipsSubtarget.h" | |
19 | #include "MipsTargetMachine.h" | |
20 | #include "llvm/CodeGen/SelectionDAGISel.h" | |
21 | ||
22 | //===----------------------------------------------------------------------===// | |
23 | // Instruction Selector Implementation | |
24 | //===----------------------------------------------------------------------===// | |
25 | ||
26 | //===----------------------------------------------------------------------===// | |
27 | // MipsDAGToDAGISel - MIPS specific code to select MIPS machine | |
28 | // instructions for SelectionDAG operations. | |
29 | //===----------------------------------------------------------------------===// | |
30 | namespace llvm { | |
31 | ||
32 | class MipsDAGToDAGISel : public SelectionDAGISel { | |
33 | public: | |
34 | explicit MipsDAGToDAGISel(MipsTargetMachine &TM) | |
1a4d82fc | 35 | : SelectionDAGISel(TM), Subtarget(nullptr) {} |
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36 | |
37 | // Pass Name | |
1a4d82fc | 38 | const char *getPassName() const override { |
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39 | return "MIPS DAG->DAG Pattern Instruction Selection"; |
40 | } | |
41 | ||
1a4d82fc | 42 | bool runOnMachineFunction(MachineFunction &MF) override; |
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43 | |
44 | protected: | |
45 | SDNode *getGlobalBaseReg(); | |
46 | ||
47 | /// Keep a pointer to the MipsSubtarget around so that we can make the right | |
48 | /// decision when generating code for different targets. | |
1a4d82fc | 49 | const MipsSubtarget *Subtarget; |
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50 | |
51 | private: | |
52 | // Include the pieces autogenerated from the target description. | |
53 | #include "MipsGenDAGISel.inc" | |
54 | ||
55 | // Complex Pattern. | |
56 | /// (reg + imm). | |
57 | virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base, | |
58 | SDValue &Offset) const; | |
59 | ||
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60 | // Complex Pattern. |
61 | /// (reg + reg). | |
62 | virtual bool selectAddrRegReg(SDValue Addr, SDValue &Base, | |
63 | SDValue &Offset) const; | |
64 | ||
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65 | /// Fall back on this function if all else fails. |
66 | virtual bool selectAddrDefault(SDValue Addr, SDValue &Base, | |
67 | SDValue &Offset) const; | |
68 | ||
69 | /// Match integer address pattern. | |
70 | virtual bool selectIntAddr(SDValue Addr, SDValue &Base, | |
71 | SDValue &Offset) const; | |
72 | ||
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73 | virtual bool selectIntAddrMM(SDValue Addr, SDValue &Base, |
74 | SDValue &Offset) const; | |
75 | ||
76 | /// Match addr+simm10 and addr | |
77 | virtual bool selectIntAddrMSA(SDValue Addr, SDValue &Base, | |
78 | SDValue &Offset) const; | |
79 | ||
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80 | virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, |
81 | SDValue &Offset, SDValue &Alias); | |
82 | ||
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83 | /// \brief Select constant vector splats. |
84 | virtual bool selectVSplat(SDNode *N, APInt &Imm) const; | |
85 | /// \brief Select constant vector splats whose value fits in a uimm1. | |
86 | virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const; | |
87 | /// \brief Select constant vector splats whose value fits in a uimm2. | |
88 | virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const; | |
89 | /// \brief Select constant vector splats whose value fits in a uimm3. | |
90 | virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const; | |
91 | /// \brief Select constant vector splats whose value fits in a uimm4. | |
92 | virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const; | |
93 | /// \brief Select constant vector splats whose value fits in a uimm5. | |
94 | virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const; | |
95 | /// \brief Select constant vector splats whose value fits in a uimm6. | |
96 | virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const; | |
97 | /// \brief Select constant vector splats whose value fits in a uimm8. | |
98 | virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const; | |
99 | /// \brief Select constant vector splats whose value fits in a simm5. | |
100 | virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const; | |
101 | /// \brief Select constant vector splats whose value is a power of 2. | |
102 | virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const; | |
103 | /// \brief Select constant vector splats whose value is the inverse of a | |
104 | /// power of 2. | |
105 | virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const; | |
106 | /// \brief Select constant vector splats whose value is a run of set bits | |
107 | /// ending at the most significant bit | |
108 | virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const; | |
109 | /// \brief Select constant vector splats whose value is a run of set bits | |
110 | /// starting at bit zero. | |
111 | virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const; | |
112 | ||
113 | SDNode *Select(SDNode *N) override; | |
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114 | |
115 | virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0; | |
116 | ||
117 | // getImm - Return a target constant with the specified value. | |
118 | inline SDValue getImm(const SDNode *Node, uint64_t Imm) { | |
119 | return CurDAG->getTargetConstant(Imm, Node->getValueType(0)); | |
120 | } | |
121 | ||
122 | virtual void processFunctionAfterISel(MachineFunction &MF) = 0; | |
123 | ||
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124 | bool SelectInlineAsmMemoryOperand(const SDValue &Op, |
125 | char ConstraintCode, | |
126 | std::vector<SDValue> &OutOps) override; | |
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127 | }; |
128 | ||
129 | /// createMipsISelDag - This pass converts a legalized DAG into a | |
130 | /// MIPS-specific DAG, ready for instruction scheduling. | |
131 | FunctionPass *createMipsISelDag(MipsTargetMachine &TM); | |
132 | ||
133 | } | |
134 | ||
135 | #endif |