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1 | //===-- MipsSEISelDAGToDAG.h - A Dag to Dag Inst Selector for MipsSE -----===// |
2 | // | |
3 | // The LLVM Compiler Infrastructure | |
4 | // | |
5 | // This file is distributed under the University of Illinois Open Source | |
6 | // License. See LICENSE.TXT for details. | |
7 | // | |
8 | //===----------------------------------------------------------------------===// | |
9 | // | |
10 | // Subclass of MipsDAGToDAGISel specialized for mips32/64. | |
11 | // | |
12 | //===----------------------------------------------------------------------===// | |
13 | ||
1a4d82fc JJ |
14 | #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H |
15 | #define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H | |
970d7e83 LB |
16 | |
17 | #include "MipsISelDAGToDAG.h" | |
18 | ||
19 | namespace llvm { | |
20 | ||
21 | class MipsSEDAGToDAGISel : public MipsDAGToDAGISel { | |
22 | ||
23 | public: | |
24 | explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {} | |
25 | ||
26 | private: | |
970d7e83 | 27 | |
1a4d82fc | 28 | bool runOnMachineFunction(MachineFunction &MF) override; |
970d7e83 | 29 | |
1a4d82fc JJ |
30 | void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, |
31 | MachineFunction &MF); | |
970d7e83 | 32 | |
1a4d82fc | 33 | unsigned getMSACtrlReg(const SDValue RegIdx) const; |
970d7e83 | 34 | |
1a4d82fc | 35 | bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&); |
970d7e83 | 36 | |
1a4d82fc JJ |
37 | std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc dl, |
38 | EVT Ty, bool HasLo, bool HasHi); | |
970d7e83 | 39 | |
1a4d82fc JJ |
40 | SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, |
41 | SDLoc DL, SDNode *Node) const; | |
42 | ||
43 | bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const; | |
44 | bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset, | |
45 | unsigned OffsetBits) const; | |
46 | ||
47 | bool selectAddrRegImm(SDValue Addr, SDValue &Base, | |
48 | SDValue &Offset) const override; | |
49 | ||
50 | bool selectAddrRegReg(SDValue Addr, SDValue &Base, | |
51 | SDValue &Offset) const override; | |
52 | ||
53 | bool selectAddrDefault(SDValue Addr, SDValue &Base, | |
54 | SDValue &Offset) const override; | |
55 | ||
56 | bool selectIntAddr(SDValue Addr, SDValue &Base, | |
57 | SDValue &Offset) const override; | |
58 | ||
59 | bool selectAddrRegImm10(SDValue Addr, SDValue &Base, | |
60 | SDValue &Offset) const; | |
61 | ||
62 | bool selectAddrRegImm12(SDValue Addr, SDValue &Base, | |
63 | SDValue &Offset) const; | |
64 | ||
65 | bool selectIntAddrMM(SDValue Addr, SDValue &Base, | |
66 | SDValue &Offset) const override; | |
67 | ||
68 | bool selectIntAddrMSA(SDValue Addr, SDValue &Base, | |
69 | SDValue &Offset) const override; | |
70 | ||
71 | /// \brief Select constant vector splats. | |
72 | bool selectVSplat(SDNode *N, APInt &Imm) const override; | |
73 | /// \brief Select constant vector splats whose value fits in a given integer. | |
74 | bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed, | |
75 | unsigned ImmBitSize) const; | |
76 | /// \brief Select constant vector splats whose value fits in a uimm1. | |
77 | bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override; | |
78 | /// \brief Select constant vector splats whose value fits in a uimm2. | |
79 | bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override; | |
80 | /// \brief Select constant vector splats whose value fits in a uimm3. | |
81 | bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override; | |
82 | /// \brief Select constant vector splats whose value fits in a uimm4. | |
83 | bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override; | |
84 | /// \brief Select constant vector splats whose value fits in a uimm5. | |
85 | bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override; | |
86 | /// \brief Select constant vector splats whose value fits in a uimm6. | |
87 | bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override; | |
88 | /// \brief Select constant vector splats whose value fits in a uimm8. | |
89 | bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override; | |
90 | /// \brief Select constant vector splats whose value fits in a simm5. | |
91 | bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override; | |
92 | /// \brief Select constant vector splats whose value is a power of 2. | |
93 | bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override; | |
94 | /// \brief Select constant vector splats whose value is the inverse of a | |
95 | /// power of 2. | |
96 | bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override; | |
97 | /// \brief Select constant vector splats whose value is a run of set bits | |
98 | /// ending at the most significant bit | |
99 | bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override; | |
100 | /// \brief Select constant vector splats whose value is a run of set bits | |
101 | /// starting at bit zero. | |
102 | bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override; | |
103 | ||
104 | std::pair<bool, SDNode*> selectNode(SDNode *Node) override; | |
105 | ||
106 | void processFunctionAfterISel(MachineFunction &MF) override; | |
970d7e83 LB |
107 | |
108 | // Insert instructions to initialize the global base register in the | |
109 | // first MBB of the function. | |
110 | void initGlobalBaseReg(MachineFunction &MF); | |
111 | }; | |
112 | ||
113 | FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM); | |
114 | ||
115 | } | |
116 | ||
117 | #endif |