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1 | //===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===// |
2 | // | |
3 | // The LLVM Compiler Infrastructure | |
4 | // | |
5 | // This file is distributed under the University of Illinois Open Source | |
6 | // License. See LICENSE.TXT for details. | |
7 | // | |
8 | //===----------------------------------------------------------------------===// | |
9 | // | |
10 | // This file defines the X86 subclass for TargetSelectionDAGInfo. | |
11 | // | |
12 | //===----------------------------------------------------------------------===// | |
13 | ||
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14 | #ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H |
15 | #define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H | |
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16 | |
17 | #include "llvm/Target/TargetSelectionDAGInfo.h" | |
18 | ||
19 | namespace llvm { | |
20 | ||
21 | class X86TargetLowering; | |
22 | class X86TargetMachine; | |
23 | class X86Subtarget; | |
24 | ||
25 | class X86SelectionDAGInfo : public TargetSelectionDAGInfo { | |
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26 | /// Returns true if it is possible for the base register to conflict with the |
27 | /// given set of clobbers for a memory intrinsic. | |
28 | bool isBaseRegConflictPossible(SelectionDAG &DAG, | |
29 | ArrayRef<unsigned> ClobberSet) const; | |
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30 | |
31 | public: | |
1a4d82fc | 32 | explicit X86SelectionDAGInfo(const DataLayout &DL); |
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33 | ~X86SelectionDAGInfo(); |
34 | ||
1a4d82fc | 35 | SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, |
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36 | SDValue Chain, |
37 | SDValue Dst, SDValue Src, | |
38 | SDValue Size, unsigned Align, | |
39 | bool isVolatile, | |
1a4d82fc | 40 | MachinePointerInfo DstPtrInfo) const override; |
223e47cc | 41 | |
1a4d82fc | 42 | SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, |
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43 | SDValue Chain, |
44 | SDValue Dst, SDValue Src, | |
45 | SDValue Size, unsigned Align, | |
46 | bool isVolatile, bool AlwaysInline, | |
47 | MachinePointerInfo DstPtrInfo, | |
1a4d82fc | 48 | MachinePointerInfo SrcPtrInfo) const override; |
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49 | }; |
50 | ||
51 | } | |
52 | ||
53 | #endif |