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970d7e83 LB |
1 | # RUN: llvm-mc -triple=aarch64 -disassemble < %s 2>&1 | FileCheck %s |
2 | ||
3 | #------------------------------------------------------------------------------ | |
4 | # Load-store exclusive | |
5 | #------------------------------------------------------------------------------ | |
6 | ||
7 | #ldxp x14, x14, [sp] | |
8 | 0xee 0x3b 0x7f 0xc8 | |
9 | #CHECK: warning: potentially undefined instruction encoding | |
10 | #CHECK-NEXT: 0xee 0x3b 0x7f 0xc8 | |
11 | ||
12 | #ldaxp w19, w19, [x1] | |
13 | 0x33 0xcc 0x7f 0x88 | |
14 | #CHECK: warning: potentially undefined instruction encoding | |
15 | #CHECK-NEXT: 0x33 0xcc 0x7f 0x88 | |
16 | ||
17 | #------------------------------------------------------------------------------ | |
18 | # Load-store register (immediate post-indexed) | |
19 | #------------------------------------------------------------------------------ | |
20 | ||
21 | 0x63 0x44 0x40 0xf8 | |
22 | #CHECK: warning: potentially undefined instruction encoding | |
23 | #CHECK-NEXT: 0x63 0x44 0x40 0xf8 | |
24 | ||
25 | 0x42 0x14 0xc0 0x38 | |
26 | #CHECK: warning: potentially undefined instruction encoding | |
27 | #CHECK-NEXT: 0x42 0x14 0xc0 0x38 | |
28 | ||
29 | #------------------------------------------------------------------------------ | |
30 | # Load-store register (immediate pre-indexed) | |
31 | #------------------------------------------------------------------------------ | |
32 | ||
33 | 0x63 0x4c 0x40 0xf8 | |
34 | #CHECK: warning: potentially undefined instruction encoding | |
35 | #CHECK-NEXT: 0x63 0x4c 0x40 0xf8 | |
36 | ||
37 | 0x42 0x1c 0xc0 0x38 | |
38 | #CHECK: warning: potentially undefined instruction encoding | |
39 | #CHECK-NEXT: 0x42 0x1c 0xc0 0x38 | |
40 | ||
41 | #------------------------------------------------------------------------------ | |
42 | # Load-store register pair (offset) | |
43 | #------------------------------------------------------------------------------ | |
44 | ||
45 | # Unpredictable if Rt == Rt2 on a load. | |
46 | ||
47 | 0xe3 0x0f 0x40 0xa9 | |
48 | # CHECK: warning: potentially undefined instruction encoding | |
49 | # CHECK-NEXT: 0xe3 0x0f 0x40 0xa9 | |
50 | # CHECK-NEXT: ^ | |
51 | ||
52 | 0xe2 0x8b 0x41 0x69 | |
53 | # CHECK: warning: potentially undefined instruction encoding | |
54 | # CHECK-NEXT: 0xe2 0x8b 0x41 0x69 | |
55 | # CHECK-NEXT: ^ | |
56 | ||
57 | 0x82 0x88 0x40 0x2d | |
58 | # CHECK: warning: potentially undefined instruction encoding | |
59 | # CHECK-NEXT: 0x82 0x88 0x40 0x2d | |
60 | # CHECK-NEXT: ^ | |
61 | ||
62 | #------------------------------------------------------------------------------ | |
63 | # Load-store register pair (post-indexed) | |
64 | #------------------------------------------------------------------------------ | |
65 | ||
66 | # Unpredictable if Rt == Rt2 on a load. | |
67 | ||
68 | 0xe3 0x0f 0xc0 0xa8 | |
69 | # CHECK: warning: potentially undefined instruction encoding | |
70 | # CHECK-NEXT: 0xe3 0x0f 0xc0 0xa8 | |
71 | # CHECK-NEXT: ^ | |
72 | ||
73 | 0xe2 0x8b 0xc1 0x68 | |
74 | # CHECK: warning: potentially undefined instruction encoding | |
75 | # CHECK-NEXT: 0xe2 0x8b 0xc1 0x68 | |
76 | # CHECK-NEXT: ^ | |
77 | ||
78 | 0x82 0x88 0xc0 0x2c | |
79 | # CHECK: warning: potentially undefined instruction encoding | |
80 | # CHECK-NEXT: 0x82 0x88 0xc0 0x2c | |
81 | # CHECK-NEXT: ^ | |
82 | ||
83 | # Also unpredictable if writeback clashes with either transfer register | |
84 | ||
85 | 0x63 0x94 0xc0 0xa8 | |
86 | # CHECK: warning: potentially undefined instruction encoding | |
87 | # CHECK-NEXT: 0x63 0x94 0xc0 0xa8 | |
88 | ||
89 | 0x69 0x2d 0x81 0xa8 | |
90 | # CHECK: warning: potentially undefined instruction encoding | |
91 | # CHECK-NEXT: 0x69 0x2d 0x81 0xa8 | |
92 | ||
93 | 0x29 0xad 0xc0 0x28 | |
94 | # CHECK: warning: potentially undefined instruction encoding | |
95 | # CHECK-NEXT: 0x29 0xad 0xc0 0x28 | |
96 |