[rustc.git] / src / llvm / test / MC / Disassembler / ARM / invalid-MOVs-LSL-arm.txt

# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 | grep "invalid instruction encoding"

# Opcode=196 Name=MOVs Format=ARM_FORMAT_DPSOREGFRM(5)
#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 0: 1| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 1: 0: 0| 0: 0: 1: 0| 1: 0: 0: 1| 0: 0: 1: 1|
# -------------------------------------------------------------------------------------------------
# A8.6.89 LSL (register): Inst{7-4} = 0b0001
0x93 0x42 0xa0 0xd1
Commit	Line	Data
223e47cc LB	1	# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 \| grep "invalid instruction encoding"
	2
	3	# Opcode=196 Name=MOVs Format=ARM_FORMAT_DPSOREGFRM(5)
	4	# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
	5	# -------------------------------------------------------------------------------------------------
	6	# \| 1: 1: 0: 1\| 0: 0: 0: 1\| 1: 0: 1: 0\| 0: 0: 0: 0\| 0: 1: 0: 0\| 0: 0: 1: 0\| 1: 0: 0: 1\| 0: 0: 1: 1\|
	7	# -------------------------------------------------------------------------------------------------
	8	# A8.6.89 LSL (register): Inst{7-4} = 0b0001
	9	0x93 0x42 0xa0 0xd1