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1a4d82fc JJ |
1 | # RUN: not llvm-mc -triple armv8 -show-encoding -disassemble %s 2>&1 | FileCheck %s |
2 | ||
3 | # Coprocessors other than CP10, CP11, CP14 and CP15 are undefined in ARMv8; | |
4 | # but in ARMv7, all these instructions are valid | |
5 | ||
6 | # RUN: llvm-mc -triple armv7 -show-encoding -disassemble %s | FileCheck %s --check-prefix=CHECK-V7 | |
7 | ||
8 | [0x00 0x01 0x00 0xee] | |
9 | # CHECK-V7: cdp | |
10 | # CHECK: invalid instruction encoding | |
11 | # CHECK-NEXT: [0x00 0x01 0x00 0xee] | |
12 | ||
13 | [0x00 0x0e 0x00 0xee] | |
14 | # CHECK-V7: cdp | |
15 | # CHECK: invalid instruction encoding | |
16 | # CHECK-NEXT: [0x00 0x0e 0x00 0xee] | |
17 | ||
18 | [0x00 0x0f 0x00 0xee] | |
19 | # CHECK-V7: cdp | |
20 | # CHECK: invalid instruction encoding | |
21 | # CHECK-NEXT: [0x00 0x0f 0x00 0xee] | |
22 | ||
23 | [0x00 0x01 0x00 0xfe] | |
24 | # CHECK-V7: cdp2 | |
25 | # CHECK: invalid instruction encoding | |
26 | # CHECK-NEXT: [0x00 0x01 0x00 0xfe] | |
27 | ||
28 | [0x00 0x0e 0x00 0xfe] | |
29 | # CHECK-V7: cdp2 | |
30 | # CHECK: invalid instruction encoding | |
31 | # CHECK-NEXT: [0x00 0x0e 0x00 0xfe] | |
32 | ||
33 | [0x00 0x0f 0x00 0xfe] | |
34 | # CHECK-V7: cdp2 | |
35 | # CHECK: invalid instruction encoding | |
36 | # CHECK-NEXT: [0x00 0x0f 0x00 0xfe] | |
37 | ||
38 | [0x10 0x01 0x00 0xee] | |
39 | # CHECK-V7: mcr | |
40 | # CHECK: invalid instruction encoding | |
41 | # CHECK-NEXT: [0x10 0x01 0x00 0xee] | |
42 | ||
43 | [0x10 0x01 0x00 0xfe] | |
44 | # CHECK-V7: mcr2 | |
45 | # CHECK: invalid instruction encoding | |
46 | # CHECK-NEXT: [0x10 0x01 0x00 0xfe] | |
47 | ||
48 | [0x10 0x0e 0x00 0xfe] | |
49 | # CHECK-V7: mcr2 | |
50 | # CHECK: invalid instruction encoding | |
51 | # CHECK-NEXT: [0x10 0x0e 0x00 0xfe] | |
52 | ||
53 | [0x10 0x0f 0x00 0xfe] | |
54 | # CHECK-V7: mcr2 | |
55 | # CHECK: invalid instruction encoding | |
56 | # CHECK-NEXT: [0x10 0x0f 0x00 0xfe] | |
57 | ||
58 | [0x10 0x01 0x10 0xee] | |
59 | # CHECK-V7: mrc | |
60 | # CHECK: invalid instruction encoding | |
61 | # CHECK-NEXT: [0x10 0x01 0x10 0xee] | |
62 | ||
63 | [0x10 0x01 0x10 0xfe] | |
64 | # CHECK-V7: mrc2 | |
65 | # CHECK: invalid instruction encoding | |
66 | # CHECK-NEXT: [0x10 0x01 0x10 0xfe] | |
67 | ||
68 | [0x10 0x0e 0x10 0xfe] | |
69 | # CHECK-V7: mrc2 | |
70 | # CHECK: invalid instruction encoding | |
71 | # CHECK-NEXT: [0x10 0x0e 0x10 0xfe] | |
72 | ||
73 | [0x10 0x0f 0x10 0xfe] | |
74 | # CHECK-V7: mrc2 | |
75 | # CHECK: invalid instruction encoding | |
76 | # CHECK-NEXT: [0x10 0x0f 0x10 0xfe] | |
77 | ||
78 | [0x00 0x01 0x40 0xec] | |
79 | # CHECK-V7: mcrr | |
80 | # CHECK: invalid instruction encoding | |
81 | # CHECK-NEXT: [0x00 0x01 0x40 0xec] | |
82 | ||
83 | [0x00 0x01 0x40 0xfc] | |
84 | # CHECK-V7: mcrr2 | |
85 | # CHECK: invalid instruction encoding | |
86 | # CHECK-NEXT: [0x00 0x01 0x40 0xfc] | |
87 | ||
88 | [0x00 0x0e 0x40 0xfc] | |
89 | # CHECK-V7: mcrr2 | |
90 | # CHECK: invalid instruction encoding | |
91 | # CHECK-NEXT: [0x00 0x0e 0x40 0xfc] | |
92 | ||
93 | [0x00 0x0f 0x40 0xfc] | |
94 | # CHECK-V7: mcrr2 | |
95 | # CHECK: invalid instruction encoding | |
96 | # CHECK-NEXT: [0x00 0x0f 0x40 0xfc] | |
97 | ||
98 | [0x00 0x01 0x50 0xec] | |
99 | # CHECK-V7: mrrc | |
100 | # CHECK: invalid instruction encoding | |
101 | # CHECK-NEXT: [0x00 0x01 0x50 0xec] | |
102 | ||
103 | [0x00 0x0e 0x50 0xfc] | |
104 | # CHECK-V7: mrrc2 | |
105 | # CHECK: invalid instruction encoding | |
106 | # CHECK-NEXT: [0x00 0x0e 0x50 0xfc] | |
107 | ||
108 | [0x00 0x0f 0x50 0xfc] | |
109 | # CHECK-V7: mrrc2 | |
110 | # CHECK: invalid instruction encoding | |
111 | # CHECK-NEXT: [0x00 0x0f 0x50 0xfc] | |
112 | ||
113 | [0x00 0x01 0x50 0xfc] | |
114 | # CHECK-V7: mrrc2 | |
115 | # CHECK: invalid instruction encoding | |
116 | # CHECK-NEXT: [0x00 0x01 0x50 0xfc] | |
117 | ||
118 | [0x00 0x01 0x80 0xec] | |
119 | # CHECK-V7: stc | |
120 | # CHECK: invalid instruction encoding | |
121 | # CHECK-NEXT: [0x00 0x01 0x80 0xec] | |
122 | ||
123 | [0x00 0x0f 0x80 0xec] | |
124 | # CHECK-V7: stc | |
125 | # CHECK: invalid instruction encoding | |
126 | # CHECK-NEXT: [0x00 0x0f 0x80 0xec] | |
127 | ||
128 | [0x00 0x01 0x80 0xfc] | |
129 | # CHECK-V7: stc2 | |
130 | # CHECK: invalid instruction encoding | |
131 | # CHECK-NEXT: [0x00 0x01 0x80 0xfc] | |
132 | ||
133 | [0x00 0x0e 0x80 0xfc] | |
134 | # CHECK-V7: stc2 | |
135 | # CHECK: invalid instruction encoding | |
136 | # CHECK-NEXT: [0x00 0x0e 0x80 0xfc] | |
137 | ||
138 | [0x00 0x0f 0x80 0xfc] | |
139 | # CHECK-V7: stc2 | |
140 | # CHECK: invalid instruction encoding | |
141 | # CHECK-NEXT: [0x00 0x0f 0x80 0xfc] | |
142 | ||
143 | [0x00 0x01 0x90 0xec] | |
144 | # CHECK-V7: ldc | |
145 | # CHECK: invalid instruction encoding | |
146 | # CHECK-NEXT: [0x00 0x01 0x90 0xec] | |
147 | ||
148 | [0x00 0x0f 0x90 0xec] | |
149 | # CHECK-V7: ldc | |
150 | # CHECK: invalid instruction encoding | |
151 | # CHECK-NEXT: [0x00 0x0f 0x90 0xec] | |
152 | ||
153 | [0x00 0x01 0x90 0xfc] | |
154 | # CHECK-V7: ldc2 | |
155 | # CHECK: invalid instruction encoding | |
156 | # CHECK-NEXT: [0x00 0x01 0x90 0xfc] | |
157 | ||
158 | [0x00 0x0e 0x90 0xfc] | |
159 | # CHECK-V7: ldc2 | |
160 | # CHECK: invalid instruction encoding | |
161 | # CHECK-NEXT: [0x00 0x0e 0x90 0xfc] | |
162 | ||
163 | [0x00 0x0f 0x90 0xfc] | |
164 | # CHECK-V7: ldc2 | |
165 | # CHECK: invalid instruction encoding | |
166 | # CHECK-NEXT: [0x00 0x0f 0x90 0xfc] | |
167 |