[rustc.git] / src / llvm / test / MC / Disassembler / ARM / unpredictable-LDRD-arm.txt

# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 | FileCheck %s

#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
# -------------------------------------------------------------------------------------------------
# | 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| X: X: X: 1| X: X: X: X| 1: 1: X: 1| X: X: X: X|
# -------------------------------------------------------------------------------------------------
# 
# A8.6.68 LDRD (register)
# if Rt{0} = 1 then UNDEFINED;

# CHECK: potentially undefined
# CHECK: 0xd0 0x10 0x00 0x00
0xd0 0x10 0x00 0x00
Commit	Line	Data
223e47cc LB	1	# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 \| FileCheck %s
	2
	3	# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
	4	# -------------------------------------------------------------------------------------------------
	5	# \| 0: 0: 0: 0\| 0: 0: 0: 0\| 0: 0: 0: 0\| 0: 0: 0: 0\| X: X: X: 1\| X: X: X: X\| 1: 1: X: 1\| X: X: X: X\|
	6	# -------------------------------------------------------------------------------------------------
	7	#
	8	# A8.6.68 LDRD (register)
	9	# if Rt{0} = 1 then UNDEFINED;
	10
	11	# CHECK: potentially undefined
	12	# CHECK: 0xd0 0x10 0x00 0x00
	13	0xd0 0x10 0x00 0x00