[rustc.git] / src / llvm / test / MC / Disassembler / ARM / unpredictable-SEL-arm.txt

# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi 2>&1 | FileCheck %s

# CHECK: potentially undefined
# CHECK: 0xb4 0x38 0x80 0x06
0xb4 0x38 0x80 0x06
Commit	Line	Data
223e47cc LB	1	# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi 2>&1 \| FileCheck %s
	2
	3	# CHECK: potentially undefined
	4	# CHECK: 0xb4 0x38 0x80 0x06
	5	0xb4 0x38 0x80 0x06