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New upstream version 1.27.1+dfsg1
[rustc.git] / src / stdsimd / coresimd / x86 / rdrand.rs
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2//! RDRAND and RDSEED instructions for returning random numbers from an Intel
3//! on-chip hardware random number generator which has been seeded by an
4//! on-chip entropy source.
5
6extern "platform-intrinsic" {
7 fn x86_rdrand16_step() -> (u16, i32);
8 fn x86_rdrand32_step() -> (u32, i32);
9 fn x86_rdseed16_step() -> (u16, i32);
10 fn x86_rdseed32_step() -> (u32, i32);
11}
12
13#[cfg(test)]
14use stdsimd_test::assert_instr;
15
16/// Read a hardware generated 16-bit random value and store the result in val.
17/// Return 1 if a random value was generated, and 0 otherwise.
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18///
19/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_rdrand16_step)
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20#[inline]
21#[target_feature(enable = "rdrand")]
22#[cfg_attr(test, assert_instr(rdrand))]
23#[cfg_attr(feature = "cargo-clippy", allow(stutter))]
83c7162d 24#[stable(feature = "simd_x86", since = "1.27.0")]
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25pub unsafe fn _rdrand16_step(val: &mut u16) -> i32 {
26 let (v, flag) = x86_rdrand16_step();
27 *val = v;
28 flag
29}
30
31/// Read a hardware generated 32-bit random value and store the result in val.
32/// Return 1 if a random value was generated, and 0 otherwise.
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33///
34/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_rdrand32_step)
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35#[inline]
36#[target_feature(enable = "rdrand")]
37#[cfg_attr(test, assert_instr(rdrand))]
38#[cfg_attr(feature = "cargo-clippy", allow(stutter))]
83c7162d 39#[stable(feature = "simd_x86", since = "1.27.0")]
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40pub unsafe fn _rdrand32_step(val: &mut u32) -> i32 {
41 let (v, flag) = x86_rdrand32_step();
42 *val = v;
43 flag
44}
45
46/// Read a 16-bit NIST SP800-90B and SP800-90C compliant random value and store
47/// in val. Return 1 if a random value was generated, and 0 otherwise.
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48///
49/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_rdseed16_step)
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50#[inline]
51#[target_feature(enable = "rdseed")]
52#[cfg_attr(test, assert_instr(rdseed))]
83c7162d 53#[stable(feature = "simd_x86", since = "1.27.0")]
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54pub unsafe fn _rdseed16_step(val: &mut u16) -> i32 {
55 let (v, flag) = x86_rdseed16_step();
56 *val = v;
57 flag
58}
59
60/// Read a 32-bit NIST SP800-90B and SP800-90C compliant random value and store
61/// in val. Return 1 if a random value was generated, and 0 otherwise.
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62///
63/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_rdseed32_step)
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64#[inline]
65#[target_feature(enable = "rdseed")]
66#[cfg_attr(test, assert_instr(rdseed))]
83c7162d 67#[stable(feature = "simd_x86", since = "1.27.0")]
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68pub unsafe fn _rdseed32_step(val: &mut u32) -> i32 {
69 let (v, flag) = x86_rdseed32_step();
70 *val = v;
71 flag
72}