]>
Commit | Line | Data |
---|---|---|
e9174d1e SL |
1 | // Copyright 2015 The Rust Project Developers. See the COPYRIGHT |
2 | // file at the top-level directory of this distribution and at | |
3 | // http://rust-lang.org/COPYRIGHT. | |
4 | // | |
5 | // Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or | |
6 | // http://www.apache.org/licenses/LICENSE-2.0> or the MIT license | |
7 | // <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your | |
8 | // option. This file may not be copied, modified, or distributed | |
9 | // except according to those terms. | |
10 | ||
b7449926 XL |
11 | // run-pass |
12 | #![allow(non_camel_case_types)] | |
13 | ||
0531ce1d XL |
14 | // ignore-emscripten FIXME(#45351) hits an LLVM assert |
15 | ||
e9174d1e SL |
16 | #![feature(repr_simd, platform_intrinsics)] |
17 | ||
18 | #[repr(simd)] | |
19 | #[derive(Copy, Clone)] | |
20 | struct i32x4(pub i32, pub i32, pub i32, pub i32); | |
21 | ||
22 | #[repr(simd)] | |
23 | #[derive(Copy, Clone)] | |
24 | struct u32x4(pub u32, pub u32, pub u32, pub u32); | |
25 | ||
26 | #[repr(simd)] | |
27 | #[derive(Copy, Clone)] | |
28 | struct f32x4(pub f32, pub f32, pub f32, pub f32); | |
29 | ||
30 | macro_rules! all_eq { | |
31 | ($a: expr, $b: expr) => {{ | |
32 | let a = $a; | |
33 | let b = $b; | |
34 | assert!(a.0 == b.0 && a.1 == b.1 && a.2 == b.2 && a.3 == b.3); | |
35 | }} | |
36 | } | |
37 | ||
38 | extern "platform-intrinsic" { | |
39 | fn simd_add<T>(x: T, y: T) -> T; | |
40 | fn simd_sub<T>(x: T, y: T) -> T; | |
41 | fn simd_mul<T>(x: T, y: T) -> T; | |
42 | fn simd_div<T>(x: T, y: T) -> T; | |
abe05a73 | 43 | fn simd_rem<T>(x: T, y: T) -> T; |
e9174d1e SL |
44 | fn simd_shl<T>(x: T, y: T) -> T; |
45 | fn simd_shr<T>(x: T, y: T) -> T; | |
46 | fn simd_and<T>(x: T, y: T) -> T; | |
47 | fn simd_or<T>(x: T, y: T) -> T; | |
48 | fn simd_xor<T>(x: T, y: T) -> T; | |
49 | } | |
50 | ||
51 | fn main() { | |
52 | let x1 = i32x4(1, 2, 3, 4); | |
53 | let y1 = u32x4(1, 2, 3, 4); | |
54 | let z1 = f32x4(1.0, 2.0, 3.0, 4.0); | |
55 | let x2 = i32x4(2, 3, 4, 5); | |
56 | let y2 = u32x4(2, 3, 4, 5); | |
57 | let z2 = f32x4(2.0, 3.0, 4.0, 5.0); | |
58 | ||
59 | unsafe { | |
60 | all_eq!(simd_add(x1, x2), i32x4(3, 5, 7, 9)); | |
61 | all_eq!(simd_add(x2, x1), i32x4(3, 5, 7, 9)); | |
62 | all_eq!(simd_add(y1, y2), u32x4(3, 5, 7, 9)); | |
63 | all_eq!(simd_add(y2, y1), u32x4(3, 5, 7, 9)); | |
64 | all_eq!(simd_add(z1, z2), f32x4(3.0, 5.0, 7.0, 9.0)); | |
65 | all_eq!(simd_add(z2, z1), f32x4(3.0, 5.0, 7.0, 9.0)); | |
66 | ||
67 | all_eq!(simd_mul(x1, x2), i32x4(2, 6, 12, 20)); | |
68 | all_eq!(simd_mul(x2, x1), i32x4(2, 6, 12, 20)); | |
69 | all_eq!(simd_mul(y1, y2), u32x4(2, 6, 12, 20)); | |
70 | all_eq!(simd_mul(y2, y1), u32x4(2, 6, 12, 20)); | |
71 | all_eq!(simd_mul(z1, z2), f32x4(2.0, 6.0, 12.0, 20.0)); | |
72 | all_eq!(simd_mul(z2, z1), f32x4(2.0, 6.0, 12.0, 20.0)); | |
73 | ||
74 | all_eq!(simd_sub(x2, x1), i32x4(1, 1, 1, 1)); | |
75 | all_eq!(simd_sub(x1, x2), i32x4(-1, -1, -1, -1)); | |
76 | all_eq!(simd_sub(y2, y1), u32x4(1, 1, 1, 1)); | |
77 | all_eq!(simd_sub(y1, y2), u32x4(!0, !0, !0, !0)); | |
78 | all_eq!(simd_sub(z2, z1), f32x4(1.0, 1.0, 1.0, 1.0)); | |
79 | all_eq!(simd_sub(z1, z2), f32x4(-1.0, -1.0, -1.0, -1.0)); | |
80 | ||
abe05a73 XL |
81 | all_eq!(simd_div(x1, x1), i32x4(1, 1, 1, 1)); |
82 | all_eq!(simd_div(i32x4(2, 4, 6, 8), i32x4(2, 2, 2, 2)), x1); | |
83 | all_eq!(simd_div(y1, y1), u32x4(1, 1, 1, 1)); | |
84 | all_eq!(simd_div(u32x4(2, 4, 6, 8), u32x4(2, 2, 2, 2)), y1); | |
85 | all_eq!(simd_div(z1, z1), f32x4(1.0, 1.0, 1.0, 1.0)); | |
e9174d1e SL |
86 | all_eq!(simd_div(z1, z2), f32x4(1.0/2.0, 2.0/3.0, 3.0/4.0, 4.0/5.0)); |
87 | all_eq!(simd_div(z2, z1), f32x4(2.0/1.0, 3.0/2.0, 4.0/3.0, 5.0/4.0)); | |
88 | ||
abe05a73 XL |
89 | all_eq!(simd_rem(x1, x1), i32x4(0, 0, 0, 0)); |
90 | all_eq!(simd_rem(x2, x1), i32x4(0, 1, 1, 1)); | |
91 | all_eq!(simd_rem(y1, y1), u32x4(0, 0, 0, 0)); | |
92 | all_eq!(simd_rem(y2, y1), u32x4(0, 1, 1, 1)); | |
93 | all_eq!(simd_rem(z1, z1), f32x4(0.0, 0.0, 0.0, 0.0)); | |
94 | all_eq!(simd_rem(z1, z2), z1); | |
95 | all_eq!(simd_rem(z2, z1), f32x4(0.0, 1.0, 1.0, 1.0)); | |
96 | ||
e9174d1e SL |
97 | all_eq!(simd_shl(x1, x2), i32x4(1 << 2, 2 << 3, 3 << 4, 4 << 5)); |
98 | all_eq!(simd_shl(x2, x1), i32x4(2 << 1, 3 << 2, 4 << 3, 5 << 4)); | |
99 | all_eq!(simd_shl(y1, y2), u32x4(1 << 2, 2 << 3, 3 << 4, 4 << 5)); | |
100 | all_eq!(simd_shl(y2, y1), u32x4(2 << 1, 3 << 2, 4 << 3, 5 << 4)); | |
101 | ||
102 | // test right-shift by assuming left-shift is correct | |
103 | all_eq!(simd_shr(simd_shl(x1, x2), x2), x1); | |
104 | all_eq!(simd_shr(simd_shl(x2, x1), x1), x2); | |
105 | all_eq!(simd_shr(simd_shl(y1, y2), y2), y1); | |
106 | all_eq!(simd_shr(simd_shl(y2, y1), y1), y2); | |
107 | ||
108 | // ensure we get logical vs. arithmetic shifts correct | |
109 | let (a, b, c, d) = (-12, -123, -1234, -12345); | |
110 | all_eq!(simd_shr(i32x4(a, b, c, d), x1), i32x4(a >> 1, b >> 2, c >> 3, d >> 4)); | |
111 | all_eq!(simd_shr(u32x4(a as u32, b as u32, c as u32, d as u32), y1), | |
112 | u32x4((a as u32) >> 1, (b as u32) >> 2, (c as u32) >> 3, (d as u32) >> 4)); | |
113 | ||
114 | all_eq!(simd_and(x1, x2), i32x4(0, 2, 0, 4)); | |
115 | all_eq!(simd_and(x2, x1), i32x4(0, 2, 0, 4)); | |
116 | all_eq!(simd_and(y1, y2), u32x4(0, 2, 0, 4)); | |
117 | all_eq!(simd_and(y2, y1), u32x4(0, 2, 0, 4)); | |
118 | ||
119 | all_eq!(simd_or(x1, x2), i32x4(3, 3, 7, 5)); | |
120 | all_eq!(simd_or(x2, x1), i32x4(3, 3, 7, 5)); | |
121 | all_eq!(simd_or(y1, y2), u32x4(3, 3, 7, 5)); | |
122 | all_eq!(simd_or(y2, y1), u32x4(3, 3, 7, 5)); | |
123 | ||
124 | all_eq!(simd_xor(x1, x2), i32x4(3, 1, 7, 1)); | |
125 | all_eq!(simd_xor(x2, x1), i32x4(3, 1, 7, 1)); | |
126 | all_eq!(simd_xor(y1, y2), u32x4(3, 1, 7, 1)); | |
127 | all_eq!(simd_xor(y2, y1), u32x4(3, 1, 7, 1)); | |
128 | ||
129 | } | |
130 | } |