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51409b9e RH |
1 | # A32 unconditional instructions |
2 | # | |
3 | # Copyright (c) 2019 Linaro, Ltd | |
4 | # | |
5 | # This library is free software; you can redistribute it and/or | |
6 | # modify it under the terms of the GNU Lesser General Public | |
7 | # License as published by the Free Software Foundation; either | |
8 | # version 2 of the License, or (at your option) any later version. | |
9 | # | |
10 | # This library is distributed in the hope that it will be useful, | |
11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | # Lesser General Public License for more details. | |
14 | # | |
15 | # You should have received a copy of the GNU Lesser General Public | |
16 | # License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
17 | ||
18 | # | |
19 | # This file is processed by scripts/decodetree.py | |
20 | # | |
21 | # All insns that have 0xf in insn[31:28] are decoded here. | |
22 | # All of those that have a COND field in insn[31:28] are in a32.decode | |
23 | # | |
360144f3 | 24 | |
519b8471 | 25 | &empty !extern |
360144f3 | 26 | &i !extern imm |
48c04a5d | 27 | &setend E |
360144f3 RH |
28 | |
29 | # Branch with Link and Exchange | |
30 | ||
31 | %imm24h 0:s24 24:1 !function=times_2 | |
32 | ||
33 | BLX_i 1111 101 . ........................ &i imm=%imm24h | |
885782a7 RH |
34 | |
35 | # System Instructions | |
36 | ||
37 | &rfe rn w pu | |
38 | &srs mode w pu | |
52f83b9c | 39 | &cps mode imod M A I F |
885782a7 RH |
40 | |
41 | RFE 1111 100 pu:2 0 w:1 1 rn:4 0000 1010 0000 0000 &rfe | |
42 | SRS 1111 100 pu:2 1 w:1 0 1101 0000 0101 000 mode:5 &srs | |
52f83b9c RH |
43 | CPS 1111 0001 0000 imod:2 M:1 0 0000 000 A:1 I:1 F:1 0 mode:5 \ |
44 | &cps | |
519b8471 RH |
45 | |
46 | # Clear-Exclusive, Barriers | |
47 | ||
48 | # QEMU does not require the option field for the barriers. | |
49 | CLREX 1111 0101 0111 1111 1111 0000 0001 1111 | |
50 | DSB 1111 0101 0111 1111 1111 0000 0100 ---- | |
51 | DMB 1111 0101 0111 1111 1111 0000 0101 ---- | |
52 | ISB 1111 0101 0111 1111 1111 0000 0110 ---- | |
53 | SB 1111 0101 0111 1111 1111 0000 0111 0000 | |
48c04a5d RH |
54 | |
55 | # Set Endianness | |
56 | SETEND 1111 0001 0000 0001 0000 00 E:1 0 0000 0000 &setend | |
beb595f6 RH |
57 | |
58 | # Preload instructions | |
59 | ||
60 | PLD 1111 0101 -101 ---- 1111 ---- ---- ---- # (imm, lit) 5te | |
61 | PLDW 1111 0101 -001 ---- 1111 ---- ---- ---- # (imm, lit) 7mp | |
62 | PLI 1111 0100 -101 ---- 1111 ---- ---- ---- # (imm, lit) 7 | |
63 | ||
64 | PLD 1111 0111 -101 ---- 1111 ----- -- 0 ---- # (register) 5te | |
65 | PLDW 1111 0111 -001 ---- 1111 ----- -- 0 ---- # (register) 7mp | |
66 | PLI 1111 0110 -101 ---- 1111 ----- -- 0 ---- # (register) 7 | |
610f4e17 RH |
67 | |
68 | # Unallocated memory hints | |
69 | # | |
70 | # Since these are v7MP nops, and PLDW is v7MP and implemented as nop, | |
71 | # (ab)use the PLDW helper. | |
72 | ||
73 | PLDW 1111 0100 -001 ---- ---- ---- ---- ---- | |
74 | PLDW 1111 0110 -001 ---- ---- ---- ---0 ---- |