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eb035b48 PM |
1 | /* |
2 | * QEMU KVM support -- ARM specific functions. | |
3 | * | |
4 | * Copyright (c) 2012 Linaro Limited | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
7 | * See the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
11 | #ifndef QEMU_KVM_ARM_H | |
12 | #define QEMU_KVM_ARM_H | |
13 | ||
14 | #include "sysemu/kvm.h" | |
15 | #include "exec/memory.h" | |
1b20616f | 16 | #include "qemu/error-report.h" |
eb035b48 | 17 | |
d45efe47 EA |
18 | #define KVM_ARM_VGIC_V2 (1 << 0) |
19 | #define KVM_ARM_VGIC_V3 (1 << 1) | |
20 | ||
ad5c6dde AO |
21 | /** |
22 | * kvm_arm_init_debug() - initialize guest debug capabilities | |
23 | * @s: KVMState | |
24 | * | |
25 | * Should be called only once before using guest debug capabilities. | |
26 | */ | |
27 | void kvm_arm_init_debug(KVMState *s); | |
28 | ||
228d5e04 PS |
29 | /** |
30 | * kvm_arm_vcpu_init: | |
31 | * @cs: CPUState | |
32 | * | |
33 | * Initialize (or reinitialize) the VCPU by invoking the | |
34 | * KVM_ARM_VCPU_INIT ioctl with the CPU type and feature | |
35 | * bitmask specified in the CPUState. | |
36 | * | |
37 | * Returns: 0 if success else < 0 error code | |
38 | */ | |
39 | int kvm_arm_vcpu_init(CPUState *cs); | |
40 | ||
14e99e0f | 41 | /** |
d1ebbc9d | 42 | * kvm_arm_vcpu_finalize: |
14e99e0f | 43 | * @cs: CPUState |
d1ebbc9d | 44 | * @feature: feature to finalize |
14e99e0f AJ |
45 | * |
46 | * Finalizes the configuration of the specified VCPU feature by | |
47 | * invoking the KVM_ARM_VCPU_FINALIZE ioctl. Features requiring | |
48 | * this are documented in the "KVM_ARM_VCPU_FINALIZE" section of | |
49 | * KVM's API documentation. | |
50 | * | |
51 | * Returns: 0 if success else < 0 error code | |
52 | */ | |
53 | int kvm_arm_vcpu_finalize(CPUState *cs, int feature); | |
54 | ||
eb035b48 PM |
55 | /** |
56 | * kvm_arm_register_device: | |
57 | * @mr: memory region for this device | |
58 | * @devid: the KVM device ID | |
1da41cc1 CD |
59 | * @group: device control API group for setting addresses |
60 | * @attr: device control API address type | |
61 | * @dev_fd: device control device file descriptor (or -1 if not supported) | |
19d1bd0b | 62 | * @addr_ormask: value to be OR'ed with resolved address |
eb035b48 PM |
63 | * |
64 | * Remember the memory region @mr, and when it is mapped by the | |
65 | * machine model, tell the kernel that base address using the | |
1da41cc1 CD |
66 | * KVM_ARM_SET_DEVICE_ADDRESS ioctl or the newer device control API. @devid |
67 | * should be the ID of the device as defined by KVM_ARM_SET_DEVICE_ADDRESS or | |
68 | * the arm-vgic device in the device control API. | |
69 | * The machine model may map | |
70 | * and unmap the device multiple times; the kernel will only be told the final | |
71 | * address at the point where machine init is complete. | |
eb035b48 | 72 | */ |
1da41cc1 | 73 | void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group, |
19d1bd0b | 74 | uint64_t attr, int dev_fd, uint64_t addr_ormask); |
eb035b48 | 75 | |
38df27c8 AB |
76 | /** |
77 | * kvm_arm_init_cpreg_list: | |
c8a44709 | 78 | * @cpu: ARMCPU |
38df27c8 | 79 | * |
c8a44709 | 80 | * Initialize the ARMCPU cpreg list according to the kernel's |
38df27c8 AB |
81 | * definition of what CPU registers it knows about (and throw away |
82 | * the previous TCG-created cpreg list). | |
83 | * | |
84 | * Returns: 0 if success, else < 0 error code | |
85 | */ | |
86 | int kvm_arm_init_cpreg_list(ARMCPU *cpu); | |
87 | ||
88 | /** | |
d1ebbc9d AJ |
89 | * kvm_arm_reg_syncs_via_cpreg_list: |
90 | * @regidx: KVM register index | |
38df27c8 AB |
91 | * |
92 | * Return true if this KVM register should be synchronized via the | |
93 | * cpreg list of arbitrary system registers, false if it is synchronized | |
94 | * by hand using code in kvm_arch_get/put_registers(). | |
95 | */ | |
96 | bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx); | |
97 | ||
4b7a6bf4 | 98 | /** |
d1ebbc9d AJ |
99 | * kvm_arm_cpreg_level: |
100 | * @regidx: KVM register index | |
4b7a6bf4 CD |
101 | * |
102 | * Return the level of this coprocessor/system register. Return value is | |
103 | * either KVM_PUT_RUNTIME_STATE, KVM_PUT_RESET_STATE, or KVM_PUT_FULL_STATE. | |
104 | */ | |
105 | int kvm_arm_cpreg_level(uint64_t regidx); | |
106 | ||
ff047453 PM |
107 | /** |
108 | * write_list_to_kvmstate: | |
109 | * @cpu: ARMCPU | |
4b7a6bf4 | 110 | * @level: the state level to sync |
ff047453 PM |
111 | * |
112 | * For each register listed in the ARMCPU cpreg_indexes list, write | |
113 | * its value from the cpreg_values list into the kernel (via ioctl). | |
114 | * This updates KVM's working data structures from TCG data or | |
115 | * from incoming migration state. | |
116 | * | |
117 | * Returns: true if all register values were updated correctly, | |
118 | * false if some register was unknown to the kernel or could not | |
119 | * be written (eg constant register with the wrong value). | |
120 | * Note that we do not stop early on failure -- we will attempt | |
121 | * writing all registers in the list. | |
122 | */ | |
4b7a6bf4 | 123 | bool write_list_to_kvmstate(ARMCPU *cpu, int level); |
ff047453 PM |
124 | |
125 | /** | |
126 | * write_kvmstate_to_list: | |
127 | * @cpu: ARMCPU | |
128 | * | |
129 | * For each register listed in the ARMCPU cpreg_indexes list, write | |
130 | * its value from the kernel into the cpreg_values list. This is used to | |
131 | * copy info from KVM's working data structures into TCG or | |
132 | * for outbound migration. | |
133 | * | |
134 | * Returns: true if all register values were read correctly, | |
135 | * false if some register was unknown or could not be read. | |
136 | * Note that we do not stop early on failure -- we will attempt | |
137 | * reading all registers in the list. | |
138 | */ | |
139 | bool write_kvmstate_to_list(ARMCPU *cpu); | |
140 | ||
e5ac4200 AJ |
141 | /** |
142 | * kvm_arm_cpu_pre_save: | |
143 | * @cpu: ARMCPU | |
144 | * | |
145 | * Called after write_kvmstate_to_list() from cpu_pre_save() to update | |
146 | * the cpreg list with KVM CPU state. | |
147 | */ | |
148 | void kvm_arm_cpu_pre_save(ARMCPU *cpu); | |
149 | ||
150 | /** | |
151 | * kvm_arm_cpu_post_load: | |
152 | * @cpu: ARMCPU | |
153 | * | |
154 | * Called from cpu_post_load() to update KVM CPU state from the cpreg list. | |
155 | */ | |
156 | void kvm_arm_cpu_post_load(ARMCPU *cpu); | |
157 | ||
50a2c6e5 PB |
158 | /** |
159 | * kvm_arm_reset_vcpu: | |
160 | * @cpu: ARMCPU | |
161 | * | |
162 | * Called at reset time to kernel registers to their initial values. | |
163 | */ | |
164 | void kvm_arm_reset_vcpu(ARMCPU *cpu); | |
165 | ||
202ccb6b DG |
166 | /** |
167 | * kvm_arm_init_serror_injection: | |
168 | * @cs: CPUState | |
169 | * | |
170 | * Check whether KVM can set guest SError syndrome. | |
171 | */ | |
172 | void kvm_arm_init_serror_injection(CPUState *cs); | |
173 | ||
174 | /** | |
175 | * kvm_get_vcpu_events: | |
176 | * @cpu: ARMCPU | |
177 | * | |
178 | * Get VCPU related state from kvm. | |
d1ebbc9d AJ |
179 | * |
180 | * Returns: 0 if success else < 0 error code | |
202ccb6b DG |
181 | */ |
182 | int kvm_get_vcpu_events(ARMCPU *cpu); | |
183 | ||
184 | /** | |
185 | * kvm_put_vcpu_events: | |
186 | * @cpu: ARMCPU | |
187 | * | |
188 | * Put VCPU related state to kvm. | |
d1ebbc9d AJ |
189 | * |
190 | * Returns: 0 if success else < 0 error code | |
202ccb6b DG |
191 | */ |
192 | int kvm_put_vcpu_events(ARMCPU *cpu); | |
193 | ||
a96c0514 PM |
194 | #ifdef CONFIG_KVM |
195 | /** | |
196 | * kvm_arm_create_scratch_host_vcpu: | |
197 | * @cpus_to_try: array of QEMU_KVM_ARM_TARGET_* values (terminated with | |
198 | * QEMU_KVM_ARM_TARGET_NONE) to try as fallback if the kernel does not | |
2f340e9c PX |
199 | * know the PREFERRED_TARGET ioctl. Passing NULL is the same as passing |
200 | * an empty array. | |
a96c0514 | 201 | * @fdarray: filled in with kvmfd, vmfd, cpufd file descriptors in that order |
2f340e9c PX |
202 | * @init: filled in with the necessary values for creating a host |
203 | * vcpu. If NULL is provided, will not init the vCPU (though the cpufd | |
204 | * will still be set up). | |
a96c0514 PM |
205 | * |
206 | * Create a scratch vcpu in its own VM of the type preferred by the host | |
207 | * kernel (as would be used for '-cpu host'), for purposes of probing it | |
208 | * for capabilities. | |
209 | * | |
210 | * Returns: true on success (and fdarray and init are filled in), | |
211 | * false on failure (and fdarray and init are not valid). | |
212 | */ | |
213 | bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, | |
214 | int *fdarray, | |
215 | struct kvm_vcpu_init *init); | |
216 | ||
217 | /** | |
218 | * kvm_arm_destroy_scratch_host_vcpu: | |
219 | * @fdarray: array of fds as set up by kvm_arm_create_scratch_host_vcpu | |
220 | * | |
221 | * Tear down the scratch vcpu created by kvm_arm_create_scratch_host_vcpu. | |
222 | */ | |
223 | void kvm_arm_destroy_scratch_host_vcpu(int *fdarray); | |
224 | ||
c4487d76 PM |
225 | /** |
226 | * ARMHostCPUFeatures: information about the host CPU (identified | |
227 | * by asking the host kernel) | |
228 | */ | |
229 | typedef struct ARMHostCPUFeatures { | |
4674097c | 230 | ARMISARegisters isar; |
a96c0514 PM |
231 | uint64_t features; |
232 | uint32_t target; | |
233 | const char *dtb_compatible; | |
c4487d76 | 234 | } ARMHostCPUFeatures; |
a96c0514 PM |
235 | |
236 | /** | |
237 | * kvm_arm_get_host_cpu_features: | |
d1ebbc9d | 238 | * @ahcf: ARMHostCPUClass to fill in |
a96c0514 PM |
239 | * |
240 | * Probe the capabilities of the host kernel's preferred CPU and fill | |
241 | * in the ARMHostCPUClass struct accordingly. | |
d1ebbc9d AJ |
242 | * |
243 | * Returns true on success and false otherwise. | |
a96c0514 | 244 | */ |
c4487d76 | 245 | bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf); |
a96c0514 | 246 | |
6fa8a379 AJ |
247 | /** |
248 | * kvm_arm_sve_get_vls: | |
249 | * @cs: CPUState | |
6fa8a379 AJ |
250 | * |
251 | * Get all the SVE vector lengths supported by the KVM host, setting | |
252 | * the bits corresponding to their length in quadwords minus one | |
886902ec | 253 | * (vq - 1) up to ARM_MAX_VQ. Return the resulting map. |
6fa8a379 | 254 | */ |
886902ec | 255 | uint32_t kvm_arm_sve_get_vls(CPUState *cs); |
6fa8a379 | 256 | |
c4487d76 PM |
257 | /** |
258 | * kvm_arm_set_cpu_features_from_host: | |
259 | * @cpu: ARMCPU to set the features for | |
260 | * | |
261 | * Set up the ARMCPU struct fields up to match the information probed | |
262 | * from the host CPU. | |
263 | */ | |
264 | void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu); | |
1a1753f7 | 265 | |
dea101a1 AJ |
266 | /** |
267 | * kvm_arm_add_vcpu_properties: | |
268 | * @obj: The CPU object to add the properties to | |
269 | * | |
270 | * Add all KVM specific CPU properties to the CPU object. These | |
271 | * are the CPU properties with "kvm-" prefixed names. | |
272 | */ | |
273 | void kvm_arm_add_vcpu_properties(Object *obj); | |
274 | ||
68970d1e AJ |
275 | /** |
276 | * kvm_arm_steal_time_finalize: | |
277 | * @cpu: ARMCPU for which to finalize kvm-steal-time | |
278 | * @errp: Pointer to Error* for error propagation | |
279 | * | |
280 | * Validate the kvm-steal-time property selection and set its default | |
281 | * based on KVM support and guest configuration. | |
282 | */ | |
283 | void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp); | |
284 | ||
285 | /** | |
286 | * kvm_arm_steal_time_supported: | |
287 | * | |
288 | * Returns: true if KVM can enable steal time reporting | |
289 | * and false otherwise. | |
290 | */ | |
291 | bool kvm_arm_steal_time_supported(void); | |
292 | ||
b9e758f0 AJ |
293 | /** |
294 | * kvm_arm_aarch32_supported: | |
b9e758f0 | 295 | * |
7d20e681 | 296 | * Returns: true if KVM can enable AArch32 mode |
b9e758f0 AJ |
297 | * and false otherwise. |
298 | */ | |
7d20e681 | 299 | bool kvm_arm_aarch32_supported(void); |
b9e758f0 | 300 | |
ae502508 | 301 | /** |
d1ebbc9d | 302 | * kvm_arm_pmu_supported: |
ae502508 | 303 | * |
7d20e681 | 304 | * Returns: true if KVM can enable the PMU |
ae502508 AJ |
305 | * and false otherwise. |
306 | */ | |
7d20e681 | 307 | bool kvm_arm_pmu_supported(void); |
ae502508 | 308 | |
14e99e0f | 309 | /** |
d1ebbc9d | 310 | * kvm_arm_sve_supported: |
14e99e0f | 311 | * |
7d20e681 | 312 | * Returns true if KVM can enable SVE and false otherwise. |
14e99e0f | 313 | */ |
7d20e681 | 314 | bool kvm_arm_sve_supported(void); |
14e99e0f | 315 | |
b320e21c CH |
316 | /** |
317 | * kvm_arm_mte_supported: | |
318 | * | |
319 | * Returns: true if KVM can enable MTE, and false otherwise. | |
320 | */ | |
321 | bool kvm_arm_mte_supported(void); | |
322 | ||
a27382e2 | 323 | /** |
d1ebbc9d | 324 | * kvm_arm_get_max_vm_ipa_size: |
a27382e2 | 325 | * @ms: Machine state handle |
bcb902a1 AJ |
326 | * @fixed_ipa: True when the IPA limit is fixed at 40. This is the case |
327 | * for legacy KVM. | |
d1ebbc9d AJ |
328 | * |
329 | * Returns the number of bits in the IPA address space supported by KVM | |
a27382e2 | 330 | */ |
bcb902a1 | 331 | int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa); |
a27382e2 | 332 | |
1a1753f7 | 333 | /** |
d1ebbc9d | 334 | * kvm_arm_sync_mpstate_to_kvm: |
1a1753f7 AB |
335 | * @cpu: ARMCPU |
336 | * | |
337 | * If supported set the KVM MP_STATE based on QEMU's model. | |
d1ebbc9d AJ |
338 | * |
339 | * Returns 0 on success and -1 on failure. | |
1a1753f7 AB |
340 | */ |
341 | int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu); | |
342 | ||
343 | /** | |
d1ebbc9d | 344 | * kvm_arm_sync_mpstate_to_qemu: |
1a1753f7 AB |
345 | * @cpu: ARMCPU |
346 | * | |
347 | * If supported get the MP_STATE from KVM and store in QEMU's model. | |
d1ebbc9d AJ |
348 | * |
349 | * Returns 0 on success and aborts on failure. | |
1a1753f7 AB |
350 | */ |
351 | int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu); | |
352 | ||
e5ac4200 AJ |
353 | /** |
354 | * kvm_arm_get_virtual_time: | |
355 | * @cs: CPUState | |
356 | * | |
357 | * Gets the VCPU's virtual counter and stores it in the KVM CPU state. | |
358 | */ | |
359 | void kvm_arm_get_virtual_time(CPUState *cs); | |
360 | ||
361 | /** | |
362 | * kvm_arm_put_virtual_time: | |
363 | * @cs: CPUState | |
364 | * | |
365 | * Sets the VCPU's virtual counter to the value stored in the KVM CPU state. | |
366 | */ | |
367 | void kvm_arm_put_virtual_time(CPUState *cs); | |
368 | ||
538f0497 | 369 | void kvm_arm_vm_state_change(void *opaque, bool running, RunState state); |
e5ac4200 | 370 | |
34e85cd9 PF |
371 | int kvm_arm_vgic_probe(void); |
372 | ||
b2bfe9f7 AJ |
373 | void kvm_arm_pmu_set_irq(CPUState *cs, int irq); |
374 | void kvm_arm_pmu_init(CPUState *cs); | |
68970d1e AJ |
375 | |
376 | /** | |
377 | * kvm_arm_pvtime_init: | |
378 | * @cs: CPUState | |
379 | * @ipa: Per-vcpu guest physical base address of the pvtime structures | |
380 | * | |
381 | * Initializes PVTIME for the VCPU, setting the PVTIME IPA to @ipa. | |
382 | */ | |
383 | void kvm_arm_pvtime_init(CPUState *cs, uint64_t ipa); | |
384 | ||
f6530926 | 385 | int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level); |
01fe6b60 | 386 | |
b320e21c CH |
387 | void kvm_arm_enable_mte(Object *cpuobj, Error **errp); |
388 | ||
34e85cd9 PF |
389 | #else |
390 | ||
281a3c33 AJ |
391 | /* |
392 | * It's safe to call these functions without KVM support. | |
393 | * They should either do nothing or return "not supported". | |
394 | */ | |
7d20e681 | 395 | static inline bool kvm_arm_aarch32_supported(void) |
b9e758f0 AJ |
396 | { |
397 | return false; | |
398 | } | |
399 | ||
7d20e681 | 400 | static inline bool kvm_arm_pmu_supported(void) |
ae502508 AJ |
401 | { |
402 | return false; | |
403 | } | |
404 | ||
7d20e681 | 405 | static inline bool kvm_arm_sve_supported(void) |
14e99e0f AJ |
406 | { |
407 | return false; | |
408 | } | |
409 | ||
68970d1e AJ |
410 | static inline bool kvm_arm_steal_time_supported(void) |
411 | { | |
412 | return false; | |
413 | } | |
414 | ||
b320e21c CH |
415 | static inline bool kvm_arm_mte_supported(void) |
416 | { | |
417 | return false; | |
418 | } | |
419 | ||
281a3c33 AJ |
420 | /* |
421 | * These functions should never actually be called without KVM support. | |
422 | */ | |
423 | static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) | |
424 | { | |
425 | g_assert_not_reached(); | |
426 | } | |
427 | ||
428 | static inline void kvm_arm_add_vcpu_properties(Object *obj) | |
429 | { | |
430 | g_assert_not_reached(); | |
431 | } | |
432 | ||
bcb902a1 | 433 | static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa) |
a27382e2 | 434 | { |
281a3c33 | 435 | g_assert_not_reached(); |
a27382e2 EA |
436 | } |
437 | ||
34e85cd9 PF |
438 | static inline int kvm_arm_vgic_probe(void) |
439 | { | |
281a3c33 | 440 | g_assert_not_reached(); |
34e85cd9 PF |
441 | } |
442 | ||
281a3c33 AJ |
443 | static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) |
444 | { | |
445 | g_assert_not_reached(); | |
446 | } | |
01fe6b60 | 447 | |
281a3c33 AJ |
448 | static inline void kvm_arm_pmu_init(CPUState *cs) |
449 | { | |
450 | g_assert_not_reached(); | |
451 | } | |
452 | ||
68970d1e AJ |
453 | static inline void kvm_arm_pvtime_init(CPUState *cs, uint64_t ipa) |
454 | { | |
455 | g_assert_not_reached(); | |
456 | } | |
457 | ||
458 | static inline void kvm_arm_steal_time_finalize(ARMCPU *cpu, Error **errp) | |
459 | { | |
460 | g_assert_not_reached(); | |
461 | } | |
462 | ||
886902ec | 463 | static inline uint32_t kvm_arm_sve_get_vls(CPUState *cs) |
281a3c33 AJ |
464 | { |
465 | g_assert_not_reached(); | |
466 | } | |
e5ac4200 | 467 | |
b320e21c CH |
468 | static inline void kvm_arm_enable_mte(Object *cpuobj, Error **errp) |
469 | { | |
470 | g_assert_not_reached(); | |
471 | } | |
472 | ||
a96c0514 PM |
473 | #endif |
474 | ||
e6fbcbc4 PF |
475 | static inline const char *gic_class_name(void) |
476 | { | |
477 | return kvm_irqchip_in_kernel() ? "kvm-arm-gic" : "arm_gic"; | |
478 | } | |
479 | ||
a7bf3034 PF |
480 | /** |
481 | * gicv3_class_name | |
482 | * | |
483 | * Return name of GICv3 class to use depending on whether KVM acceleration is | |
484 | * in use. May throw an error if the chosen implementation is not available. | |
485 | * | |
486 | * Returns: class name to use | |
487 | */ | |
1b20616f EA |
488 | static inline const char *gicv3_class_name(void) |
489 | { | |
490 | if (kvm_irqchip_in_kernel()) { | |
1b20616f | 491 | return "kvm-arm-gicv3"; |
1b20616f | 492 | } else { |
bd559478 CD |
493 | if (kvm_enabled()) { |
494 | error_report("Userspace GICv3 is not supported with KVM"); | |
495 | exit(1); | |
496 | } | |
1b20616f EA |
497 | return "arm-gicv3"; |
498 | } | |
499 | } | |
a7bf3034 | 500 | |
2ecb2027 AB |
501 | /** |
502 | * kvm_arm_handle_debug: | |
503 | * @cs: CPUState | |
504 | * @debug_exit: debug part of the KVM exit structure | |
505 | * | |
506 | * Returns: TRUE if the debug exception was handled. | |
507 | */ | |
508 | bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit); | |
509 | ||
e4482ab7 AB |
510 | /** |
511 | * kvm_arm_hw_debug_active: | |
512 | * @cs: CPU State | |
513 | * | |
514 | * Return: TRUE if any hardware breakpoints in use. | |
515 | */ | |
e4482ab7 AB |
516 | bool kvm_arm_hw_debug_active(CPUState *cs); |
517 | ||
518 | /** | |
519 | * kvm_arm_copy_hw_debug_data: | |
e4482ab7 AB |
520 | * @ptr: kvm_guest_debug_arch structure |
521 | * | |
522 | * Copy the architecture specific debug registers into the | |
523 | * kvm_guest_debug ioctl structure. | |
524 | */ | |
525 | struct kvm_guest_debug_arch; | |
e4482ab7 AB |
526 | void kvm_arm_copy_hw_debug_data(struct kvm_guest_debug_arch *ptr); |
527 | ||
1711bfa5 BM |
528 | /** |
529 | * kvm_arm_verify_ext_dabt_pending: | |
530 | * @cs: CPUState | |
531 | * | |
532 | * Verify the fault status code wrt the Ext DABT injection | |
533 | * | |
534 | * Returns: true if the fault status code is as expected, false otherwise | |
535 | */ | |
536 | bool kvm_arm_verify_ext_dabt_pending(CPUState *cs); | |
537 | ||
386ce3c7 | 538 | /** |
d1ebbc9d | 539 | * its_class_name: |
386ce3c7 PF |
540 | * |
541 | * Return the ITS class name to use depending on whether KVM acceleration | |
542 | * and KVM CAP_SIGNAL_MSI are supported | |
543 | * | |
544 | * Returns: class name to use or NULL | |
545 | */ | |
546 | static inline const char *its_class_name(void) | |
547 | { | |
548 | if (kvm_irqchip_in_kernel()) { | |
549 | /* KVM implementation requires this capability */ | |
550 | return kvm_direct_msi_enabled() ? "arm-its-kvm" : NULL; | |
551 | } else { | |
0e5c1c9a SM |
552 | /* Software emulation based model */ |
553 | return "arm-gicv3-its"; | |
386ce3c7 PF |
554 | } |
555 | } | |
556 | ||
eb035b48 | 557 | #endif |