]>
Commit | Line | Data |
---|---|---|
1118d7fa TS |
1 | /* |
2 | * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | /* Keep this as the first attribute: */ | |
19 | DEF_ATTRIB(AA_DUMMY, "Dummy Zeroth Attribute", "", "") | |
20 | ||
21 | /* Misc */ | |
22 | DEF_ATTRIB(EXTENSION, "Extension instruction", "", "") | |
23 | ||
24 | DEF_ATTRIB(PRIV, "Not available in user or guest mode", "", "") | |
25 | DEF_ATTRIB(GUEST, "Not available in user mode", "", "") | |
26 | ||
27 | DEF_ATTRIB(FPOP, "Floating Point Operation", "", "") | |
28 | ||
29 | DEF_ATTRIB(EXTENDABLE, "Immediate may be extended", "", "") | |
30 | ||
31 | DEF_ATTRIB(ARCHV2, "V2 architecture", "", "") | |
32 | DEF_ATTRIB(ARCHV3, "V3 architecture", "", "") | |
33 | DEF_ATTRIB(ARCHV4, "V4 architecture", "", "") | |
34 | DEF_ATTRIB(ARCHV5, "V5 architecture", "", "") | |
35 | ||
36 | DEF_ATTRIB(SUBINSN, "sub-instruction", "", "") | |
37 | ||
38 | /* Load and Store attributes */ | |
39 | DEF_ATTRIB(LOAD, "Loads from memory", "", "") | |
40 | DEF_ATTRIB(STORE, "Stores to memory", "", "") | |
41 | DEF_ATTRIB(MEMLIKE, "Memory-like instruction", "", "") | |
42 | DEF_ATTRIB(MEMLIKE_PACKET_RULES, "follows Memory-like packet rules", "", "") | |
43 | ||
44 | ||
45 | /* Change-of-flow attributes */ | |
46 | DEF_ATTRIB(JUMP, "Jump-type instruction", "", "") | |
47 | DEF_ATTRIB(INDIRECT, "Absolute register jump", "", "") | |
48 | DEF_ATTRIB(CALL, "Function call instruction", "", "") | |
49 | DEF_ATTRIB(COF, "Change-of-flow instruction", "", "") | |
50 | DEF_ATTRIB(CONDEXEC, "May be cancelled by a predicate", "", "") | |
51 | DEF_ATTRIB(DOTNEWVALUE, "Uses a register value generated in this pkt", "", "") | |
52 | DEF_ATTRIB(NEWCMPJUMP, "Compound compare and jump", "", "") | |
53 | ||
54 | /* access to implicit registers */ | |
55 | DEF_ATTRIB(IMPLICIT_WRITES_LR, "Writes the link register", "", "UREG.LR") | |
56 | DEF_ATTRIB(IMPLICIT_WRITES_SP, "Writes the stack pointer", "", "UREG.SP") | |
57 | DEF_ATTRIB(IMPLICIT_WRITES_FP, "Writes the frame pointer", "", "UREG.FP") | |
58 | DEF_ATTRIB(IMPLICIT_WRITES_LC0, "Writes loop count for loop 0", "", "UREG.LC0") | |
59 | DEF_ATTRIB(IMPLICIT_WRITES_LC1, "Writes loop count for loop 1", "", "UREG.LC1") | |
60 | DEF_ATTRIB(IMPLICIT_WRITES_SA0, "Writes start addr for loop 0", "", "UREG.SA0") | |
61 | DEF_ATTRIB(IMPLICIT_WRITES_SA1, "Writes start addr for loop 1", "", "UREG.SA1") | |
62 | DEF_ATTRIB(IMPLICIT_WRITES_P0, "Writes Predicate 0", "", "UREG.P0") | |
63 | DEF_ATTRIB(IMPLICIT_WRITES_P1, "Writes Predicate 1", "", "UREG.P1") | |
64 | DEF_ATTRIB(IMPLICIT_WRITES_P2, "Writes Predicate 1", "", "UREG.P2") | |
65 | DEF_ATTRIB(IMPLICIT_WRITES_P3, "May write Predicate 3", "", "UREG.P3") | |
66 | DEF_ATTRIB(IMPLICIT_READS_PC, "Reads the PC register", "", "") | |
67 | DEF_ATTRIB(WRITES_PRED_REG, "Writes a predicate register", "", "") | |
68 | ||
69 | DEF_ATTRIB(CRSLOT23, "Can execute in slot 2 or slot 3 (CR)", "", "") | |
70 | DEF_ATTRIB(IT_NOP, "nop instruction", "", "") | |
71 | DEF_ATTRIB(IT_EXTENDER, "constant extender instruction", "", "") | |
72 | ||
73 | ||
74 | /* Restrictions to make note of */ | |
75 | DEF_ATTRIB(RESTRICT_SLOT0ONLY, "Must execute on slot0", "", "") | |
76 | DEF_ATTRIB(RESTRICT_SLOT1ONLY, "Must execute on slot1", "", "") | |
77 | DEF_ATTRIB(RESTRICT_SLOT2ONLY, "Must execute on slot2", "", "") | |
78 | DEF_ATTRIB(RESTRICT_SLOT3ONLY, "Must execute on slot3", "", "") | |
79 | DEF_ATTRIB(RESTRICT_NOSLOT1, "No slot 1 instruction in parallel", "", "") | |
80 | DEF_ATTRIB(RESTRICT_PREFERSLOT0, "Try to encode into slot 0", "", "") | |
81 | ||
82 | DEF_ATTRIB(ICOP, "Instruction cache op", "", "") | |
83 | ||
84 | DEF_ATTRIB(HWLOOP0_END, "Ends HW loop0", "", "") | |
85 | DEF_ATTRIB(HWLOOP1_END, "Ends HW loop1", "", "") | |
86 | DEF_ATTRIB(DCZEROA, "dczeroa type", "", "") | |
87 | DEF_ATTRIB(ICFLUSHOP, "icflush op type", "", "") | |
88 | DEF_ATTRIB(DCFLUSHOP, "dcflush op type", "", "") | |
89 | DEF_ATTRIB(DCFETCH, "dcfetch type", "", "") | |
90 | ||
91 | DEF_ATTRIB(L2FETCH, "Instruction is l2fetch type", "", "") | |
92 | ||
93 | DEF_ATTRIB(ICINVA, "icinva", "", "") | |
94 | DEF_ATTRIB(DCCLEANINVA, "dccleaninva", "", "") | |
95 | ||
96 | /* Keep this as the last attribute: */ | |
97 | DEF_ATTRIB(ZZ_LASTATTRIB, "Last attribute in the file", "", "") |