[mirror_qemu.git] / target / hppa / op_helper.c

/*
 * Helpers for HPPA instructions.
 *
 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
#include "sysemu/sysemu.h"
#include "qemu/timer.h"


void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
{
    HPPACPU *cpu = hppa_env_get_cpu(env);
    CPUState *cs = CPU(cpu);

    cs->exception_index = excp;
    cpu_loop_exit(cs);
}

void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
{
    HPPACPU *cpu = hppa_env_get_cpu(env);
    CPUState *cs = CPU(cpu);

    cs->exception_index = excp;
    cpu_loop_exit_restore(cs, ra);
}

void HELPER(tsv)(CPUHPPAState *env, target_ureg cond)
{
    if (unlikely((target_sreg)cond < 0)) {
        hppa_dynamic_excp(env, EXCP_OVERFLOW, GETPC());
    }
}

void HELPER(tcond)(CPUHPPAState *env, target_ureg cond)
{
    if (unlikely(cond)) {
        hppa_dynamic_excp(env, EXCP_COND, GETPC());
    }
}

static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
                           uint32_t mask, uintptr_t ra)
{
#ifdef CONFIG_USER_ONLY
    uint32_t old, new, cmp;

    uint32_t *haddr = g2h(addr - 1);
    old = *haddr;
    while (1) {
        new = (old & ~mask) | (val & mask);
        cmp = atomic_cmpxchg(haddr, old, new);
        if (cmp == old) {
            return;
        }
        old = cmp;
    }
#else
    /* FIXME -- we can do better.  */
    cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
#endif
}

static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
                      bool parallel)
{
    uintptr_t ra = GETPC();

    switch (addr & 3) {
    case 3:
        cpu_stb_data_ra(env, addr, val, ra);
        break;
    case 2:
        cpu_stw_data_ra(env, addr, val, ra);
        break;
    case 1:
        /* The 3 byte store must appear atomic.  */
        if (parallel) {
            atomic_store_3(env, addr, val, 0x00ffffffu, ra);
        } else {
            cpu_stb_data_ra(env, addr, val >> 16, ra);
            cpu_stw_data_ra(env, addr + 1, val, ra);
        }
        break;
    default:
        cpu_stl_data_ra(env, addr, val, ra);
        break;
    }
}

void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ureg val)
{
    do_stby_b(env, addr, val, false);
}

void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr,
                             target_ureg val)
{
    do_stby_b(env, addr, val, true);
}

static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val,
                      bool parallel)
{
    uintptr_t ra = GETPC();

    switch (addr & 3) {
    case 3:
        /* The 3 byte store must appear atomic.  */
        if (parallel) {
            atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
        } else {
            cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
            cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
        }
        break;
    case 2:
        cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
        break;
    case 1:
        cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
        break;
    default:
        /* Nothing is stored, but protection is checked and the
           cacheline is marked dirty.  */
#ifndef CONFIG_USER_ONLY
        probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra);
#endif
        break;
    }
}

void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ureg val)
{
    do_stby_e(env, addr, val, false);
}

void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
                             target_ureg val)
{
    do_stby_e(env, addr, val, true);
}

target_ureg HELPER(probe_r)(target_ulong addr)
{
#ifdef CONFIG_USER_ONLY
    return page_check_range(addr, 1, PAGE_READ);
#else
    return 1; /* FIXME */
#endif
}

target_ureg HELPER(probe_w)(target_ulong addr)
{
#ifdef CONFIG_USER_ONLY
    return page_check_range(addr, 1, PAGE_WRITE);
#else
    return 1; /* FIXME */
#endif
}

void HELPER(loaded_fr0)(CPUHPPAState *env)
{
    uint32_t shadow = env->fr[0] >> 32;
    int rm, d;

    env->fr0_shadow = shadow;

    switch (extract32(shadow, 9, 2)) {
    default:
        rm = float_round_nearest_even;
        break;
    case 1:
        rm = float_round_to_zero;
        break;
    case 2:
        rm = float_round_up;
        break;
    case 3:
        rm = float_round_down;
        break;
    }
    set_float_rounding_mode(rm, &env->fp_status);

    d = extract32(shadow, 5, 1);
    set_flush_to_zero(d, &env->fp_status);
    set_flush_inputs_to_zero(d, &env->fp_status);
}

void cpu_hppa_loaded_fr0(CPUHPPAState *env)
{
    helper_loaded_fr0(env);
}

#define CONVERT_BIT(X, SRC, DST)        \
    ((SRC) > (DST)                      \
     ? (X) / ((SRC) / (DST)) & (DST)    \
     : ((X) & (SRC)) * ((DST) / (SRC)))

static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
{
    uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
    uint32_t hard_exp = 0;
    uint32_t shadow = env->fr0_shadow;

    if (likely(soft_exp == 0)) {
        env->fr[0] = (uint64_t)shadow << 32;
        return;
    }
    set_float_exception_flags(0, &env->fp_status);

    hard_exp |= CONVERT_BIT(soft_exp, float_flag_inexact,   1u << 0);
    hard_exp |= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
    hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow,  1u << 2);
    hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
    hard_exp |= CONVERT_BIT(soft_exp, float_flag_invalid,   1u << 4);
    shadow |= hard_exp << (32 - 5);
    env->fr0_shadow = shadow;
    env->fr[0] = (uint64_t)shadow << 32;

    if (hard_exp & shadow) {
        hppa_dynamic_excp(env, EXCP_ASSIST, ra);
    }
}

float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
{
    float32 ret = float32_sqrt(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
{
    float32 ret = float32_round_to_int(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
{
    float32 ret = float32_add(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
{
    float32 ret = float32_sub(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
{
    float32 ret = float32_mul(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
{
    float32 ret = float32_div(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
{
    float64 ret = float64_sqrt(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
{
    float64 ret = float64_round_to_int(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
{
    float64 ret = float64_add(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
{
    float64 ret = float64_sub(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
{
    float64 ret = float64_mul(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
{
    float64 ret = float64_div(a, b, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
{
    float64 ret = float32_to_float64(arg, &env->fp_status);
    ret = float64_maybe_silence_nan(ret, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
{
    float32 ret = float64_to_float32(arg, &env->fp_status);
    ret = float32_maybe_silence_nan(ret, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
{
    float32 ret = int32_to_float32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
{
    float32 ret = int64_to_float32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
{
    float64 ret = int32_to_float64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
{
    float64 ret = int64_to_float64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
{
    int32_t ret = float32_to_int32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
{
    int32_t ret = float64_to_int32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
{
    int64_t ret = float32_to_int64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
{
    int64_t ret = float64_to_int64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
{
    int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
{
    int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
{
    int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
{
    int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
{
    float32 ret = uint32_to_float32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
{
    float32 ret = uint64_to_float32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
{
    float64 ret = uint32_to_float64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
{
    float64 ret = uint64_to_float64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
{
    uint32_t ret = float32_to_uint32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
{
    uint32_t ret = float64_to_uint32(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
{
    uint64_t ret = float32_to_uint64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
{
    uint64_t ret = float64_to_uint64(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
{
    uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
{
    uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
{
    uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
{
    uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
{
    uint32_t shadow = env->fr0_shadow;

    switch (r) {
    case float_relation_greater:
        c = extract32(c, 4, 1);
        break;
    case float_relation_less:
        c = extract32(c, 3, 1);
        break;
    case float_relation_equal:
        c = extract32(c, 2, 1);
        break;
    case float_relation_unordered:
        c = extract32(c, 1, 1);
        break;
    default:
        g_assert_not_reached();
    }

    if (y) {
        /* targeted comparison */
        /* set fpsr[ca[y - 1]] to current compare */
        shadow = deposit32(shadow, 21 - (y - 1), 1, c);
    } else {
        /* queued comparison */
        /* shift cq right by one place */
        shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
        /* move fpsr[c] to fpsr[cq[0]] */
        shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
        /* set fpsr[c] to current compare */
        shadow = deposit32(shadow, 26, 1, c);
    }

    env->fr0_shadow = shadow;
    env->fr[0] = (uint64_t)shadow << 32;
}

void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
                    uint32_t y, uint32_t c)
{
    int r;
    if (c & 1) {
        r = float32_compare(a, b, &env->fp_status);
    } else {
        r = float32_compare_quiet(a, b, &env->fp_status);
    }
    update_fr0_op(env, GETPC());
    update_fr0_cmp(env, y, c, r);
}

void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
                    uint32_t y, uint32_t c)
{
    int r;
    if (c & 1) {
        r = float64_compare(a, b, &env->fp_status);
    } else {
        r = float64_compare_quiet(a, b, &env->fp_status);
    }
    update_fr0_op(env, GETPC());
    update_fr0_cmp(env, y, c, r);
}

float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
{
    float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
{
    float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
                                 &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
{
    float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
{
    float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
                                 &env->fp_status);
    update_fr0_op(env, GETPC());
    return ret;
}

target_ureg HELPER(read_interval_timer)(void)
{
#ifdef CONFIG_USER_ONLY
    /* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
       Just pass through the host cpu clock ticks.  */
    return cpu_get_host_ticks();
#else
    /* In system mode we have access to a decent high-resolution clock.
       In order to make OS-level time accounting work with the cr16,
       present it with a well-timed clock fixed at 250MHz.  */
    return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
#endif
}

#ifndef CONFIG_USER_ONLY
void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
{
    HPPACPU *cpu = hppa_env_get_cpu(env);
    uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
    uint64_t timeout;

    /* Even in 64-bit mode, the comparator is always 32-bit.  But the
       value we expose to the guest is 1/4 of the speed of the clock,
       so moosh in 34 bits.  */
    timeout = deposit64(current, 0, 34, (uint64_t)val << 2);

    /* If the mooshing puts the clock in the past, advance to next round.  */
    if (timeout < current + 1000) {
        timeout += 1ULL << 34;
    }

    cpu->env.cr[CR_IT] = timeout;
    timer_mod(cpu->alarm_timer, timeout);
}

void HELPER(halt)(CPUHPPAState *env)
{
    qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
    helper_excp(env, EXCP_HLT);
}

void HELPER(reset)(CPUHPPAState *env)
{
    qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
    helper_excp(env, EXCP_HLT);
}

target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
{
    target_ulong psw = env->psw;
    /* ??? On second reading this condition simply seems
       to be undefined rather than a diagnosed trap.  */
    if (nsm & ~psw & PSW_Q) {
        hppa_dynamic_excp(env, EXCP_ILL, GETPC());
    }
    env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
    return psw & PSW_SM;
}

void HELPER(rfi)(CPUHPPAState *env)
{
    /* ??? On second reading this condition simply seems
       to be undefined rather than a diagnosed trap.  */
    if (env->psw & (PSW_I | PSW_R | PSW_Q)) {
        helper_excp(env, EXCP_ILL);
    }
    env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32;
    env->iasq_b = (uint64_t)env->cr_back[0] << 32;
    env->iaoq_f = env->cr[CR_IIAOQ];
    env->iaoq_b = env->cr_back[1];
    cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
}

void HELPER(rfi_r)(CPUHPPAState *env)
{
    env->gr[1] = env->shadow[0];
    env->gr[8] = env->shadow[1];
    env->gr[9] = env->shadow[2];
    env->gr[16] = env->shadow[3];
    env->gr[17] = env->shadow[4];
    env->gr[24] = env->shadow[5];
    env->gr[25] = env->shadow[6];
    helper_rfi(env);
}
#endif
Commit	Line	Data
61766fe9 RH	1	/*
	2	* Helpers for HPPA instructions.
	3	*
	4	* Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#include "qemu/osdep.h"
	21	#include "cpu.h"
	22	#include "exec/exec-all.h"
	23	#include "exec/helper-proto.h"
96d6407f	24	#include "exec/cpu_ldst.h"
6210db05	25	#include "sysemu/sysemu.h"
49c29d6c RH	26	#include "qemu/timer.h"
49c29d6c RH	27
61766fe9 RH	28
	29	void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
	30	{
	31	HPPACPU *cpu = hppa_env_get_cpu(env);
	32	CPUState *cs = CPU(cpu);
	33
	34	cs->exception_index = excp;
	35	cpu_loop_exit(cs);
	36	}
	37
2dfcca9f	38	void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
b2167459 RH	39	{
	40	HPPACPU *cpu = hppa_env_get_cpu(env);
	41	CPUState *cs = CPU(cpu);
	42
	43	cs->exception_index = excp;
	44	cpu_loop_exit_restore(cs, ra);
	45	}
	46
eaa3783b	47	void HELPER(tsv)(CPUHPPAState *env, target_ureg cond)
b2167459	48	{
eaa3783b	49	if (unlikely((target_sreg)cond < 0)) {
2dfcca9f	50	hppa_dynamic_excp(env, EXCP_OVERFLOW, GETPC());
b2167459 RH	51	}
	52	}
	53
eaa3783b	54	void HELPER(tcond)(CPUHPPAState *env, target_ureg cond)
b2167459 RH	55	{
b2167459 RH	56	if (unlikely(cond)) {
2dfcca9f	57	hppa_dynamic_excp(env, EXCP_COND, GETPC());
b2167459 RH	58	}
	59	}
	60
96d6407f RH	61	static void atomic_store_3(CPUHPPAState *env, target_ulong addr, uint32_t val,
	62	uint32_t mask, uintptr_t ra)
	63	{
813dff13	64	#ifdef CONFIG_USER_ONLY
96d6407f RH	65	uint32_t old, new, cmp;
96d6407f RH	66
96d6407f RH	67	uint32_t *haddr = g2h(addr - 1);
	68	old = *haddr;
	69	while (1) {
	70	new = (old & ~mask) \| (val & mask);
	71	cmp = atomic_cmpxchg(haddr, old, new);
	72	if (cmp == old) {
	73	return;
	74	}
	75	old = cmp;
	76	}
	77	#else
813dff13 HD	78	/* FIXME -- we can do better. */
813dff13 HD	79	cpu_loop_exit_atomic(ENV_GET_CPU(env), ra);
96d6407f RH	80	#endif
	81	}
	82
eaa3783b	83	static void do_stby_b(CPUHPPAState *env, target_ulong addr, target_ureg val,
f9f46db4	84	bool parallel)
96d6407f RH	85	{
	86	uintptr_t ra = GETPC();
	87
	88	switch (addr & 3) {
	89	case 3:
	90	cpu_stb_data_ra(env, addr, val, ra);
	91	break;
	92	case 2:
	93	cpu_stw_data_ra(env, addr, val, ra);
	94	break;
	95	case 1:
	96	/* The 3 byte store must appear atomic. */
f9f46db4	97	if (parallel) {
96d6407f RH	98	atomic_store_3(env, addr, val, 0x00ffffffu, ra);
	99	} else {
	100	cpu_stb_data_ra(env, addr, val >> 16, ra);
	101	cpu_stw_data_ra(env, addr + 1, val, ra);
	102	}
	103	break;
	104	default:
	105	cpu_stl_data_ra(env, addr, val, ra);
	106	break;
	107	}
	108	}
	109
eaa3783b	110	void HELPER(stby_b)(CPUHPPAState *env, target_ulong addr, target_ureg val)
f9f46db4 EC	111	{
	112	do_stby_b(env, addr, val, false);
	113	}
	114
	115	void HELPER(stby_b_parallel)(CPUHPPAState *env, target_ulong addr,
eaa3783b	116	target_ureg val)
f9f46db4 EC	117	{
	118	do_stby_b(env, addr, val, true);
	119	}
	120
eaa3783b	121	static void do_stby_e(CPUHPPAState *env, target_ulong addr, target_ureg val,
f9f46db4	122	bool parallel)
96d6407f RH	123	{
	124	uintptr_t ra = GETPC();
	125
	126	switch (addr & 3) {
	127	case 3:
	128	/* The 3 byte store must appear atomic. */
f9f46db4	129	if (parallel) {
96d6407f RH	130	atomic_store_3(env, addr - 3, val, 0xffffff00u, ra);
	131	} else {
	132	cpu_stw_data_ra(env, addr - 3, val >> 16, ra);
	133	cpu_stb_data_ra(env, addr - 1, val >> 8, ra);
	134	}
	135	break;
	136	case 2:
	137	cpu_stw_data_ra(env, addr - 2, val >> 16, ra);
	138	break;
	139	case 1:
	140	cpu_stb_data_ra(env, addr - 1, val >> 24, ra);
	141	break;
	142	default:
	143	/* Nothing is stored, but protection is checked and the
	144	cacheline is marked dirty. */
	145	#ifndef CONFIG_USER_ONLY
98670d47	146	probe_write(env, addr, 0, cpu_mmu_index(env, 0), ra);
96d6407f RH	147	#endif
	148	break;
	149	}
	150	}
	151
eaa3783b	152	void HELPER(stby_e)(CPUHPPAState *env, target_ulong addr, target_ureg val)
f9f46db4 EC	153	{
	154	do_stby_e(env, addr, val, false);
	155	}
	156
	157	void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr,
eaa3783b	158	target_ureg val)
f9f46db4 EC	159	{
	160	do_stby_e(env, addr, val, true);
	161	}
	162
eaa3783b	163	target_ureg HELPER(probe_r)(target_ulong addr)
98a9cb79	164	{
813dff13	165	#ifdef CONFIG_USER_ONLY
98a9cb79	166	return page_check_range(addr, 1, PAGE_READ);
813dff13 HD	167	#else
	168	return 1; /* FIXME */
	169	#endif
98a9cb79 RH	170	}
98a9cb79 RH	171
eaa3783b	172	target_ureg HELPER(probe_w)(target_ulong addr)
98a9cb79	173	{
813dff13	174	#ifdef CONFIG_USER_ONLY
98a9cb79	175	return page_check_range(addr, 1, PAGE_WRITE);
813dff13 HD	176	#else
	177	return 1; /* FIXME */
	178	#endif
98a9cb79 RH	179	}
98a9cb79 RH	180
61766fe9 RH	181	void HELPER(loaded_fr0)(CPUHPPAState *env)
	182	{
	183	uint32_t shadow = env->fr[0] >> 32;
	184	int rm, d;
	185
	186	env->fr0_shadow = shadow;
	187
	188	switch (extract32(shadow, 9, 2)) {
	189	default:
	190	rm = float_round_nearest_even;
	191	break;
	192	case 1:
	193	rm = float_round_to_zero;
	194	break;
	195	case 2:
	196	rm = float_round_up;
	197	break;
	198	case 3:
	199	rm = float_round_down;
	200	break;
	201	}
	202	set_float_rounding_mode(rm, &env->fp_status);
	203
	204	d = extract32(shadow, 5, 1);
	205	set_flush_to_zero(d, &env->fp_status);
	206	set_flush_inputs_to_zero(d, &env->fp_status);
	207	}
	208
	209	void cpu_hppa_loaded_fr0(CPUHPPAState *env)
	210	{
	211	helper_loaded_fr0(env);
	212	}
ebe9383c RH	213
	214	#define CONVERT_BIT(X, SRC, DST) \
	215	((SRC) > (DST) \
	216	? (X) / ((SRC) / (DST)) & (DST) \
	217	: ((X) & (SRC)) * ((DST) / (SRC)))
	218
	219	static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
	220	{
	221	uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
	222	uint32_t hard_exp = 0;
	223	uint32_t shadow = env->fr0_shadow;
	224
	225	if (likely(soft_exp == 0)) {
	226	env->fr[0] = (uint64_t)shadow << 32;
	227	return;
	228	}
	229	set_float_exception_flags(0, &env->fp_status);
	230
	231	hard_exp \|= CONVERT_BIT(soft_exp, float_flag_inexact, 1u << 0);
	232	hard_exp \|= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
	233	hard_exp \|= CONVERT_BIT(soft_exp, float_flag_overflow, 1u << 2);
	234	hard_exp \|= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
	235	hard_exp \|= CONVERT_BIT(soft_exp, float_flag_invalid, 1u << 4);
	236	shadow \|= hard_exp << (32 - 5);
	237	env->fr0_shadow = shadow;
	238	env->fr[0] = (uint64_t)shadow << 32;
	239
	240	if (hard_exp & shadow) {
2dfcca9f	241	hppa_dynamic_excp(env, EXCP_ASSIST, ra);
ebe9383c RH	242	}
	243	}
	244
	245	float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
	246	{
	247	float32 ret = float32_sqrt(arg, &env->fp_status);
	248	update_fr0_op(env, GETPC());
	249	return ret;
	250	}
	251
	252	float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
	253	{
	254	float32 ret = float32_round_to_int(arg, &env->fp_status);
	255	update_fr0_op(env, GETPC());
	256	return ret;
	257	}
	258
	259	float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
	260	{
	261	float32 ret = float32_add(a, b, &env->fp_status);
	262	update_fr0_op(env, GETPC());
	263	return ret;
	264	}
	265
	266	float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
	267	{
	268	float32 ret = float32_sub(a, b, &env->fp_status);
	269	update_fr0_op(env, GETPC());
	270	return ret;
	271	}
	272
	273	float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
	274	{
	275	float32 ret = float32_mul(a, b, &env->fp_status);
	276	update_fr0_op(env, GETPC());
	277	return ret;
	278	}
	279
	280	float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
	281	{
	282	float32 ret = float32_div(a, b, &env->fp_status);
	283	update_fr0_op(env, GETPC());
	284	return ret;
	285	}
	286
	287	float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
	288	{
	289	float64 ret = float64_sqrt(arg, &env->fp_status);
	290	update_fr0_op(env, GETPC());
	291	return ret;
	292	}
	293
	294	float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
	295	{
	296	float64 ret = float64_round_to_int(arg, &env->fp_status);
	297	update_fr0_op(env, GETPC());
	298	return ret;
	299	}
	300
	301	float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
	302	{
	303	float64 ret = float64_add(a, b, &env->fp_status);
	304	update_fr0_op(env, GETPC());
	305	return ret;
306	}
307
308	float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
309	{
310	float64 ret = float64_sub(a, b, &env->fp_status);
311	update_fr0_op(env, GETPC());
312	return ret;
313	}
314
315	float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
316	{
317	float64 ret = float64_mul(a, b, &env->fp_status);
318	update_fr0_op(env, GETPC());
319	return ret;
320	}
321
322	float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
323	{
324	float64 ret = float64_div(a, b, &env->fp_status);
325	update_fr0_op(env, GETPC());
326	return ret;
327	}
328
329	float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
330	{
331	float64 ret = float32_to_float64(arg, &env->fp_status);
332	ret = float64_maybe_silence_nan(ret, &env->fp_status);
333	update_fr0_op(env, GETPC());
334	return ret;
335	}
336
337	float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
338	{
339	float32 ret = float64_to_float32(arg, &env->fp_status);
340	ret = float32_maybe_silence_nan(ret, &env->fp_status);
341	update_fr0_op(env, GETPC());
342	return ret;
343	}
344
345	float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
346	{
347	float32 ret = int32_to_float32(arg, &env->fp_status);
348	update_fr0_op(env, GETPC());
349	return ret;
350	}
351
352	float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
353	{
354	float32 ret = int64_to_float32(arg, &env->fp_status);
355	update_fr0_op(env, GETPC());
356	return ret;
357	}
358
359	float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
360	{
361	float64 ret = int32_to_float64(arg, &env->fp_status);
362	update_fr0_op(env, GETPC());
363	return ret;
364	}
365
366	float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
367	{
368	float64 ret = int64_to_float64(arg, &env->fp_status);
369	update_fr0_op(env, GETPC());
370	return ret;
371	}
372
373	int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
374	{
375	int32_t ret = float32_to_int32(arg, &env->fp_status);
376	update_fr0_op(env, GETPC());
377	return ret;
378	}
379
380	int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
381	{
382	int32_t ret = float64_to_int32(arg, &env->fp_status);
383	update_fr0_op(env, GETPC());
384	return ret;
385	}
386
387	int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
388	{
389	int64_t ret = float32_to_int64(arg, &env->fp_status);
390	update_fr0_op(env, GETPC());
391	return ret;
392	}
393
394	int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
395	{
396	int64_t ret = float64_to_int64(arg, &env->fp_status);
397	update_fr0_op(env, GETPC());
398	return ret;
399	}
400
401	int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
402	{
403	int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
404	update_fr0_op(env, GETPC());
405	return ret;
406	}
407
408	int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
409	{
410	int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
411	update_fr0_op(env, GETPC());
412	return ret;
413	}
414
415	int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
416	{
417	int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
418	update_fr0_op(env, GETPC());
419	return ret;
420	}
421
422	int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
423	{
424	int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
425	update_fr0_op(env, GETPC());
426	return ret;
427	}
428
429	float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
430	{
431	float32 ret = uint32_to_float32(arg, &env->fp_status);
432	update_fr0_op(env, GETPC());
433	return ret;
434	}
435
436	float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
437	{
438	float32 ret = uint64_to_float32(arg, &env->fp_status);
439	update_fr0_op(env, GETPC());
440	return ret;
441	}
442
443	float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
444	{
445	float64 ret = uint32_to_float64(arg, &env->fp_status);
446	update_fr0_op(env, GETPC());
447	return ret;
448	}
449
450	float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
451	{
452	float64 ret = uint64_to_float64(arg, &env->fp_status);
453	update_fr0_op(env, GETPC());
454	return ret;
455	}
456
457	uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
458	{
459	uint32_t ret = float32_to_uint32(arg, &env->fp_status);
460	update_fr0_op(env, GETPC());
461	return ret;
462	}
463
464	uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
465	{
466	uint32_t ret = float64_to_uint32(arg, &env->fp_status);
467	update_fr0_op(env, GETPC());
468	return ret;
469	}
470
471	uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
472	{
473	uint64_t ret = float32_to_uint64(arg, &env->fp_status);
474	update_fr0_op(env, GETPC());
475	return ret;
476	}
477
478	uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
479	{
480	uint64_t ret = float64_to_uint64(arg, &env->fp_status);
481	update_fr0_op(env, GETPC());
482	return ret;
483	}
484
485	uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
486	{
487	uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
488	update_fr0_op(env, GETPC());
489	return ret;
490	}
491
492	uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
493	{
494	uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
495	update_fr0_op(env, GETPC());
496	return ret;
497	}
498
499	uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
500	{
501	uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
502	update_fr0_op(env, GETPC());
503	return ret;
504	}
505
506	uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
507	{
508	uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
509	update_fr0_op(env, GETPC());
510	return ret;
511	}
512
513	static void update_fr0_cmp(CPUHPPAState *env, uint32_t y, uint32_t c, int r)
514	{
515	uint32_t shadow = env->fr0_shadow;
516
517	switch (r) {
518	case float_relation_greater:
519	c = extract32(c, 4, 1);
520	break;
521	case float_relation_less:
522	c = extract32(c, 3, 1);
523	break;
524	case float_relation_equal:
525	c = extract32(c, 2, 1);
526	break;
527	case float_relation_unordered:
528	c = extract32(c, 1, 1);
529	break;
530	default:
531	g_assert_not_reached();
532	}
533
534	if (y) {
535	/* targeted comparison */
536	/* set fpsr[ca[y - 1]] to current compare */
537	shadow = deposit32(shadow, 21 - (y - 1), 1, c);
538	} else {
539	/* queued comparison */
540	/* shift cq right by one place */
541	shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
542	/* move fpsr[c] to fpsr[cq[0]] */
543	shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
544	/* set fpsr[c] to current compare */
545	shadow = deposit32(shadow, 26, 1, c);
546	}
547
548	env->fr0_shadow = shadow;
549	env->fr[0] = (uint64_t)shadow << 32;
550	}
551
552	void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
553	uint32_t y, uint32_t c)
554	{
555	int r;
556	if (c & 1) {
557	r = float32_compare(a, b, &env->fp_status);
558	} else {
559	r = float32_compare_quiet(a, b, &env->fp_status);
560	}
561	update_fr0_op(env, GETPC());
562	update_fr0_cmp(env, y, c, r);
563	}
564
565	void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
566	uint32_t y, uint32_t c)
567	{
568	int r;
569	if (c & 1) {
570	r = float64_compare(a, b, &env->fp_status);
571	} else {
572	r = float64_compare_quiet(a, b, &env->fp_status);
573	}
574	update_fr0_op(env, GETPC());
575	update_fr0_cmp(env, y, c, r);
576	}
577
578	float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
579	{
580	float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
581	update_fr0_op(env, GETPC());
582	return ret;
583	}
584
585	float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
586	{
587	float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
588	&env->fp_status);
589	update_fr0_op(env, GETPC());
590	return ret;
591	}
592
593	float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
594	{
595	float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
596	update_fr0_op(env, GETPC());
597	return ret;
598	}
599
600	float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
601	{
602	float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
603	&env->fp_status);
604	update_fr0_op(env, GETPC());
605	return ret;
606	}
e1b5a5ed	607
49c29d6c RH	608	target_ureg HELPER(read_interval_timer)(void)
	609	{
	610	#ifdef CONFIG_USER_ONLY
	611	/* In user-mode, QEMU_CLOCK_VIRTUAL doesn't exist.
	612	Just pass through the host cpu clock ticks. */
	613	return cpu_get_host_ticks();
	614	#else
	615	/* In system mode we have access to a decent high-resolution clock.
	616	In order to make OS-level time accounting work with the cr16,
	617	present it with a well-timed clock fixed at 250MHz. */
	618	return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
	619	#endif
	620	}
	621
e1b5a5ed	622	#ifndef CONFIG_USER_ONLY
49c29d6c RH	623	void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
	624	{
	625	HPPACPU *cpu = hppa_env_get_cpu(env);
	626	uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
	627	uint64_t timeout;
	628
	629	/* Even in 64-bit mode, the comparator is always 32-bit. But the
	630	value we expose to the guest is 1/4 of the speed of the clock,
	631	so moosh in 34 bits. */
	632	timeout = deposit64(current, 0, 34, (uint64_t)val << 2);
	633
	634	/* If the mooshing puts the clock in the past, advance to next round. */
	635	if (timeout < current + 1000) {
	636	timeout += 1ULL << 34;
	637	}
	638
	639	cpu->env.cr[CR_IT] = timeout;
	640	timer_mod(cpu->alarm_timer, timeout);
	641	}
	642
6210db05 HD	643	void HELPER(halt)(CPUHPPAState *env)
	644	{
	645	qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
	646	helper_excp(env, EXCP_HLT);
	647	}
	648
	649	void HELPER(reset)(CPUHPPAState *env)
	650	{
	651	qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
	652	helper_excp(env, EXCP_HLT);
	653	}
	654
e1b5a5ed RH	655	target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
	656	{
	657	target_ulong psw = env->psw;
	658	/* ??? On second reading this condition simply seems
	659	to be undefined rather than a diagnosed trap. */
	660	if (nsm & ~psw & PSW_Q) {
2dfcca9f	661	hppa_dynamic_excp(env, EXCP_ILL, GETPC());
e1b5a5ed RH	662	}
	663	env->psw = (psw & ~PSW_SM) \| (nsm & PSW_SM);
	664	return psw & PSW_SM;
	665	}
f49b3537 RH	666
	667	void HELPER(rfi)(CPUHPPAState *env)
	668	{
	669	/* ??? On second reading this condition simply seems
	670	to be undefined rather than a diagnosed trap. */
	671	if (env->psw & (PSW_I \| PSW_R \| PSW_Q)) {
	672	helper_excp(env, EXCP_ILL);
	673	}
c301f34e RH	674	env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32;
c301f34e RH	675	env->iasq_b = (uint64_t)env->cr_back[0] << 32;
f49b3537 RH	676	env->iaoq_f = env->cr[CR_IIAOQ];
	677	env->iaoq_b = env->cr_back[1];
	678	cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
	679	}
	680
	681	void HELPER(rfi_r)(CPUHPPAState *env)
	682	{
	683	env->gr[1] = env->shadow[0];
	684	env->gr[8] = env->shadow[1];
	685	env->gr[9] = env->shadow[2];
	686	env->gr[16] = env->shadow[3];
	687	env->gr[17] = env->shadow[4];
	688	env->gr[24] = env->shadow[5];
	689	env->gr[25] = env->shadow[6];
	690	helper_rfi(env);
	691	}
e1b5a5ed	692	#endif