[mirror_qemu.git] / target / i386 / arch_dump.c

/*
 * i386 memory mapping
 *
 * Copyright Fujitsu, Corp. 2011, 2012
 *
 * Authors:
 *     Wen Congyang <wency@cn.fujitsu.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2 or later.
 * See the COPYING file in the top-level directory.
 *
 */

#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/cpu-all.h"
#include "sysemu/dump.h"
#include "elf.h"
#include "sysemu/memory_mapping.h"

#ifdef TARGET_X86_64
typedef struct {
    target_ulong r15, r14, r13, r12, rbp, rbx, r11, r10;
    target_ulong r9, r8, rax, rcx, rdx, rsi, rdi, orig_rax;
    target_ulong rip, cs, eflags;
    target_ulong rsp, ss;
    target_ulong fs_base, gs_base;
    target_ulong ds, es, fs, gs;
} x86_64_user_regs_struct;

typedef struct {
    char pad1[32];
    uint32_t pid;
    char pad2[76];
    x86_64_user_regs_struct regs;
    char pad3[8];
} x86_64_elf_prstatus;

static int x86_64_write_elf64_note(WriteCoreDumpFunction f,
                                   CPUX86State *env, int id,
                                   void *opaque)
{
    x86_64_user_regs_struct regs;
    Elf64_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    regs.r15 = env->regs[15];
    regs.r14 = env->regs[14];
    regs.r13 = env->regs[13];
    regs.r12 = env->regs[12];
    regs.r11 = env->regs[11];
    regs.r10 = env->regs[10];
    regs.r9  = env->regs[9];
    regs.r8  = env->regs[8];
    regs.rbp = env->regs[R_EBP];
    regs.rsp = env->regs[R_ESP];
    regs.rdi = env->regs[R_EDI];
    regs.rsi = env->regs[R_ESI];
    regs.rdx = env->regs[R_EDX];
    regs.rcx = env->regs[R_ECX];
    regs.rbx = env->regs[R_EBX];
    regs.rax = env->regs[R_EAX];
    regs.rip = env->eip;
    regs.eflags = env->eflags;

    regs.orig_rax = 0; /* FIXME */
    regs.cs = env->segs[R_CS].selector;
    regs.ss = env->segs[R_SS].selector;
    regs.fs_base = env->segs[R_FS].base;
    regs.gs_base = env->segs[R_GS].base;
    regs.ds = env->segs[R_DS].selector;
    regs.es = env->segs[R_ES].selector;
    regs.fs = env->segs[R_FS].selector;
    regs.gs = env->segs[R_GS].selector;

    descsz = sizeof(x86_64_elf_prstatus);
    note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf + 32, &id, 4); /* pr_pid */
    buf += descsz - sizeof(x86_64_user_regs_struct)-sizeof(target_ulong);
    memcpy(buf, &regs, sizeof(x86_64_user_regs_struct));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}
#endif

typedef struct {
    uint32_t ebx, ecx, edx, esi, edi, ebp, eax;
    unsigned short ds, __ds, es, __es;
    unsigned short fs, __fs, gs, __gs;
    uint32_t orig_eax, eip;
    unsigned short cs, __cs;
    uint32_t eflags, esp;
    unsigned short ss, __ss;
} x86_user_regs_struct;

typedef struct {
    char pad1[24];
    uint32_t pid;
    char pad2[44];
    x86_user_regs_struct regs;
    char pad3[4];
} x86_elf_prstatus;

static void x86_fill_elf_prstatus(x86_elf_prstatus *prstatus, CPUX86State *env,
                                  int id)
{
    memset(prstatus, 0, sizeof(x86_elf_prstatus));
    prstatus->regs.ebp = env->regs[R_EBP] & 0xffffffff;
    prstatus->regs.esp = env->regs[R_ESP] & 0xffffffff;
    prstatus->regs.edi = env->regs[R_EDI] & 0xffffffff;
    prstatus->regs.esi = env->regs[R_ESI] & 0xffffffff;
    prstatus->regs.edx = env->regs[R_EDX] & 0xffffffff;
    prstatus->regs.ecx = env->regs[R_ECX] & 0xffffffff;
    prstatus->regs.ebx = env->regs[R_EBX] & 0xffffffff;
    prstatus->regs.eax = env->regs[R_EAX] & 0xffffffff;
    prstatus->regs.eip = env->eip & 0xffffffff;
    prstatus->regs.eflags = env->eflags & 0xffffffff;

    prstatus->regs.cs = env->segs[R_CS].selector;
    prstatus->regs.ss = env->segs[R_SS].selector;
    prstatus->regs.ds = env->segs[R_DS].selector;
    prstatus->regs.es = env->segs[R_ES].selector;
    prstatus->regs.fs = env->segs[R_FS].selector;
    prstatus->regs.gs = env->segs[R_GS].selector;

    prstatus->pid = id;
}

static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUX86State *env,
                                int id, void *opaque)
{
    x86_elf_prstatus prstatus;
    Elf64_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    x86_fill_elf_prstatus(&prstatus, env, id);
    descsz = sizeof(x86_elf_prstatus);
    note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &prstatus, sizeof(prstatus));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
                             int cpuid, void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);
    int ret;
#ifdef TARGET_X86_64
    X86CPU *first_x86_cpu = X86_CPU(first_cpu);
    bool lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);

    if (lma) {
        ret = x86_64_write_elf64_note(f, &cpu->env, cpuid, opaque);
    } else {
#endif
        ret = x86_write_elf64_note(f, &cpu->env, cpuid, opaque);
#ifdef TARGET_X86_64
    }
#endif

    return ret;
}

int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
                             int cpuid, void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);
    x86_elf_prstatus prstatus;
    Elf32_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    x86_fill_elf_prstatus(&prstatus, &cpu->env, cpuid);
    descsz = sizeof(x86_elf_prstatus);
    note_size = ((sizeof(Elf32_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf32_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &prstatus, sizeof(prstatus));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

/*
 * please count up QEMUCPUSTATE_VERSION if you have changed definition of
 * QEMUCPUState, and modify the tools using this information accordingly.
 */
#define QEMUCPUSTATE_VERSION (1)

struct QEMUCPUSegment {
    uint32_t selector;
    uint32_t limit;
    uint32_t flags;
    uint32_t pad;
    uint64_t base;
};

typedef struct QEMUCPUSegment QEMUCPUSegment;

struct QEMUCPUState {
    uint32_t version;
    uint32_t size;
    uint64_t rax, rbx, rcx, rdx, rsi, rdi, rsp, rbp;
    uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
    uint64_t rip, rflags;
    QEMUCPUSegment cs, ds, es, fs, gs, ss;
    QEMUCPUSegment ldt, tr, gdt, idt;
    uint64_t cr[5];
};

typedef struct QEMUCPUState QEMUCPUState;

static void copy_segment(QEMUCPUSegment *d, SegmentCache *s)
{
    d->pad = 0;
    d->selector = s->selector;
    d->limit = s->limit;
    d->flags = s->flags;
    d->base = s->base;
}

static void qemu_get_cpustate(QEMUCPUState *s, CPUX86State *env)
{
    memset(s, 0, sizeof(QEMUCPUState));

    s->version = QEMUCPUSTATE_VERSION;
    s->size = sizeof(QEMUCPUState);

    s->rax = env->regs[R_EAX];
    s->rbx = env->regs[R_EBX];
    s->rcx = env->regs[R_ECX];
    s->rdx = env->regs[R_EDX];
    s->rsi = env->regs[R_ESI];
    s->rdi = env->regs[R_EDI];
    s->rsp = env->regs[R_ESP];
    s->rbp = env->regs[R_EBP];
#ifdef TARGET_X86_64
    s->r8  = env->regs[8];
    s->r9  = env->regs[9];
    s->r10 = env->regs[10];
    s->r11 = env->regs[11];
    s->r12 = env->regs[12];
    s->r13 = env->regs[13];
    s->r14 = env->regs[14];
    s->r15 = env->regs[15];
#endif
    s->rip = env->eip;
    s->rflags = env->eflags;

    copy_segment(&s->cs, &env->segs[R_CS]);
    copy_segment(&s->ds, &env->segs[R_DS]);
    copy_segment(&s->es, &env->segs[R_ES]);
    copy_segment(&s->fs, &env->segs[R_FS]);
    copy_segment(&s->gs, &env->segs[R_GS]);
    copy_segment(&s->ss, &env->segs[R_SS]);
    copy_segment(&s->ldt, &env->ldt);
    copy_segment(&s->tr, &env->tr);
    copy_segment(&s->gdt, &env->gdt);
    copy_segment(&s->idt, &env->idt);

    s->cr[0] = env->cr[0];
    s->cr[1] = env->cr[1];
    s->cr[2] = env->cr[2];
    s->cr[3] = env->cr[3];
    s->cr[4] = env->cr[4];
}

static inline int cpu_write_qemu_note(WriteCoreDumpFunction f,
                                      CPUX86State *env,
                                      void *opaque,
                                      int type)
{
    QEMUCPUState state;
    Elf64_Nhdr *note64;
    Elf32_Nhdr *note32;
    void *note;
    char *buf;
    int descsz, note_size, name_size = 5, note_head_size;
    const char *name = "QEMU";
    int ret;

    qemu_get_cpustate(&state, env);

    descsz = sizeof(state);
    if (type == 0) {
        note_head_size = sizeof(Elf32_Nhdr);
    } else {
        note_head_size = sizeof(Elf64_Nhdr);
    }
    note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    if (type == 0) {
        note32 = note;
        note32->n_namesz = cpu_to_le32(name_size);
        note32->n_descsz = cpu_to_le32(descsz);
        note32->n_type = 0;
    } else {
        note64 = note;
        note64->n_namesz = cpu_to_le32(name_size);
        note64->n_descsz = cpu_to_le32(descsz);
        note64->n_type = 0;
    }
    buf = note;
    buf += ((note_head_size + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &state, sizeof(state));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cs,
                                 void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);

    return cpu_write_qemu_note(f, &cpu->env, opaque, 1);
}

int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cs,
                                 void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);

    return cpu_write_qemu_note(f, &cpu->env, opaque, 0);
}

int cpu_get_dump_info(ArchDumpInfo *info,
                      const GuestPhysBlockList *guest_phys_blocks)
{
    bool lma = false;
    GuestPhysBlock *block;

#ifdef TARGET_X86_64
    X86CPU *first_x86_cpu = X86_CPU(first_cpu);
    lma = first_cpu && (first_x86_cpu->env.hflags & HF_LMA_MASK);
#endif

    if (lma) {
        info->d_machine = EM_X86_64;
    } else {
        info->d_machine = EM_386;
    }
    info->d_endian = ELFDATA2LSB;

    if (lma) {
        info->d_class = ELFCLASS64;
    } else {
        info->d_class = ELFCLASS32;

        QTAILQ_FOREACH(block, &guest_phys_blocks->head, next) {
            if (block->target_end > UINT_MAX) {
                /* The memory size is greater than 4G */
                info->d_class = ELFCLASS64;
                break;
            }
        }
    }

    return 0;
}

ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
{
    int name_size = 5; /* "CORE" or "QEMU" */
    size_t elf_note_size = 0;
    size_t qemu_note_size = 0;
    int elf_desc_size = 0;
    int qemu_desc_size = 0;
    int note_head_size;

    if (class == ELFCLASS32) {
        note_head_size = sizeof(Elf32_Nhdr);
    } else {
        note_head_size = sizeof(Elf64_Nhdr);
    }

    if (machine == EM_386) {
        elf_desc_size = sizeof(x86_elf_prstatus);
    }
#ifdef TARGET_X86_64
    else {
        elf_desc_size = sizeof(x86_64_elf_prstatus);
    }
#endif
    qemu_desc_size = sizeof(QEMUCPUState);

    elf_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                     (elf_desc_size + 3) / 4) * 4;
    qemu_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                      (qemu_desc_size + 3) / 4) * 4;

    return (elf_note_size + qemu_note_size) * nr_cpus;
}
Commit	Line	Data
9fecbed0 WC	1	/*
	2	* i386 memory mapping
	3	*
	4	* Copyright Fujitsu, Corp. 2011, 2012
	5	*
	6	* Authors:
	7	* Wen Congyang <wency@cn.fujitsu.com>
	8	*
fc0608ac SW	9	* This work is licensed under the terms of the GNU GPL, version 2 or later.
fc0608ac SW	10	* See the COPYING file in the top-level directory.
9fecbed0 WC	11	*
	12	*/
	13
b6a0aa05	14	#include "qemu/osdep.h"
9fecbed0	15	#include "cpu.h"
022c62cb	16	#include "exec/cpu-all.h"
9c17d615	17	#include "sysemu/dump.h"
9fecbed0	18	#include "elf.h"
56c4bfb3	19	#include "sysemu/memory_mapping.h"
9fecbed0 WC	20
	21	#ifdef TARGET_X86_64
	22	typedef struct {
	23	target_ulong r15, r14, r13, r12, rbp, rbx, r11, r10;
	24	target_ulong r9, r8, rax, rcx, rdx, rsi, rdi, orig_rax;
	25	target_ulong rip, cs, eflags;
	26	target_ulong rsp, ss;
	27	target_ulong fs_base, gs_base;
	28	target_ulong ds, es, fs, gs;
	29	} x86_64_user_regs_struct;
	30
	31	typedef struct {
	32	char pad1[32];
	33	uint32_t pid;
	34	char pad2[76];
	35	x86_64_user_regs_struct regs;
	36	char pad3[8];
	37	} x86_64_elf_prstatus;
	38
c72bf468	39	static int x86_64_write_elf64_note(WriteCoreDumpFunction f,
369ff018	40	CPUX86State *env, int id,
9fecbed0 WC	41	void *opaque)
	42	{
	43	x86_64_user_regs_struct regs;
	44	Elf64_Nhdr *note;
	45	char *buf;
	46	int descsz, note_size, name_size = 5;
	47	const char *name = "CORE";
	48	int ret;
	49
	50	regs.r15 = env->regs[15];
	51	regs.r14 = env->regs[14];
	52	regs.r13 = env->regs[13];
	53	regs.r12 = env->regs[12];
	54	regs.r11 = env->regs[11];
	55	regs.r10 = env->regs[10];
	56	regs.r9 = env->regs[9];
	57	regs.r8 = env->regs[8];
	58	regs.rbp = env->regs[R_EBP];
	59	regs.rsp = env->regs[R_ESP];
	60	regs.rdi = env->regs[R_EDI];
	61	regs.rsi = env->regs[R_ESI];
	62	regs.rdx = env->regs[R_EDX];
	63	regs.rcx = env->regs[R_ECX];
	64	regs.rbx = env->regs[R_EBX];
	65	regs.rax = env->regs[R_EAX];
	66	regs.rip = env->eip;
	67	regs.eflags = env->eflags;
	68
	69	regs.orig_rax = 0; /* FIXME */
	70	regs.cs = env->segs[R_CS].selector;
	71	regs.ss = env->segs[R_SS].selector;
	72	regs.fs_base = env->segs[R_FS].base;
	73	regs.gs_base = env->segs[R_GS].base;
	74	regs.ds = env->segs[R_DS].selector;
	75	regs.es = env->segs[R_ES].selector;
	76	regs.fs = env->segs[R_FS].selector;
	77	regs.gs = env->segs[R_GS].selector;
	78
	79	descsz = sizeof(x86_64_elf_prstatus);
	80	note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	81	(descsz + 3) / 4) * 4;
4be34d1e	82	note = g_malloc0(note_size);
9fecbed0 WC	83	note->n_namesz = cpu_to_le32(name_size);
	84	note->n_descsz = cpu_to_le32(descsz);
	85	note->n_type = cpu_to_le32(NT_PRSTATUS);
	86	buf = (char *)note;
	87	buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
	88	memcpy(buf, name, name_size);
	89	buf += ((name_size + 3) / 4) * 4;
	90	memcpy(buf + 32, &id, 4); /* pr_pid */
	91	buf += descsz - sizeof(x86_64_user_regs_struct)-sizeof(target_ulong);
	92	memcpy(buf, &regs, sizeof(x86_64_user_regs_struct));
	93
	94	ret = f(note, note_size, opaque);
	95	g_free(note);
	96	if (ret < 0) {
	97	return -1;
	98	}
	99
	100	return 0;
	101	}
	102	#endif
	103
	104	typedef struct {
	105	uint32_t ebx, ecx, edx, esi, edi, ebp, eax;
	106	unsigned short ds, __ds, es, __es;
	107	unsigned short fs, __fs, gs, __gs;
	108	uint32_t orig_eax, eip;
	109	unsigned short cs, __cs;
	110	uint32_t eflags, esp;
	111	unsigned short ss, __ss;
	112	} x86_user_regs_struct;
	113
	114	typedef struct {
	115	char pad1[24];
	116	uint32_t pid;
	117	char pad2[44];
	118	x86_user_regs_struct regs;
	119	char pad3[4];
	120	} x86_elf_prstatus;
	121
369ff018	122	static void x86_fill_elf_prstatus(x86_elf_prstatus prstatus, CPUX86State env,
9fecbed0 WC	123	int id)
	124	{
	125	memset(prstatus, 0, sizeof(x86_elf_prstatus));
	126	prstatus->regs.ebp = env->regs[R_EBP] & 0xffffffff;
	127	prstatus->regs.esp = env->regs[R_ESP] & 0xffffffff;
	128	prstatus->regs.edi = env->regs[R_EDI] & 0xffffffff;
	129	prstatus->regs.esi = env->regs[R_ESI] & 0xffffffff;
	130	prstatus->regs.edx = env->regs[R_EDX] & 0xffffffff;
	131	prstatus->regs.ecx = env->regs[R_ECX] & 0xffffffff;
	132	prstatus->regs.ebx = env->regs[R_EBX] & 0xffffffff;
	133	prstatus->regs.eax = env->regs[R_EAX] & 0xffffffff;
	134	prstatus->regs.eip = env->eip & 0xffffffff;
	135	prstatus->regs.eflags = env->eflags & 0xffffffff;
	136
	137	prstatus->regs.cs = env->segs[R_CS].selector;
	138	prstatus->regs.ss = env->segs[R_SS].selector;
	139	prstatus->regs.ds = env->segs[R_DS].selector;
	140	prstatus->regs.es = env->segs[R_ES].selector;
	141	prstatus->regs.fs = env->segs[R_FS].selector;
	142	prstatus->regs.gs = env->segs[R_GS].selector;
	143
	144	prstatus->pid = id;
	145	}
	146
369ff018	147	static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUX86State *env,
9fecbed0 WC	148	int id, void *opaque)
	149	{
	150	x86_elf_prstatus prstatus;
	151	Elf64_Nhdr *note;
	152	char *buf;
	153	int descsz, note_size, name_size = 5;
	154	const char *name = "CORE";
	155	int ret;
	156
	157	x86_fill_elf_prstatus(&prstatus, env, id);
	158	descsz = sizeof(x86_elf_prstatus);
	159	note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	160	(descsz + 3) / 4) * 4;
4be34d1e	161	note = g_malloc0(note_size);
9fecbed0 WC	162	note->n_namesz = cpu_to_le32(name_size);
	163	note->n_descsz = cpu_to_le32(descsz);
	164	note->n_type = cpu_to_le32(NT_PRSTATUS);
	165	buf = (char *)note;
	166	buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
	167	memcpy(buf, name, name_size);
	168	buf += ((name_size + 3) / 4) * 4;
	169	memcpy(buf, &prstatus, sizeof(prstatus));
	170
	171	ret = f(note, note_size, opaque);
	172	g_free(note);
	173	if (ret < 0) {
	174	return -1;
	175	}
	176
	177	return 0;
	178	}
	179
c72bf468 JF	180	int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	181	int cpuid, void *opaque)
9fecbed0	182	{
c72bf468	183	X86CPU *cpu = X86_CPU(cs);
9fecbed0 WC	184	int ret;
9fecbed0 WC	185	#ifdef TARGET_X86_64
182735ef AF	186	X86CPU *first_x86_cpu = X86_CPU(first_cpu);
182735ef AF	187	bool lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);
9fecbed0 WC	188
9fecbed0 WC	189	if (lma) {
c72bf468	190	ret = x86_64_write_elf64_note(f, &cpu->env, cpuid, opaque);
9fecbed0 WC	191	} else {
9fecbed0 WC	192	#endif
c72bf468	193	ret = x86_write_elf64_note(f, &cpu->env, cpuid, opaque);
9fecbed0 WC	194	#ifdef TARGET_X86_64
	195	}
	196	#endif
	197
	198	return ret;
	199	}
	200
c72bf468 JF	201	int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	202	int cpuid, void *opaque)
9fecbed0	203	{
c72bf468	204	X86CPU *cpu = X86_CPU(cs);
9fecbed0 WC	205	x86_elf_prstatus prstatus;
	206	Elf32_Nhdr *note;
	207	char *buf;
	208	int descsz, note_size, name_size = 5;
	209	const char *name = "CORE";
	210	int ret;
	211
c72bf468	212	x86_fill_elf_prstatus(&prstatus, &cpu->env, cpuid);
9fecbed0 WC	213	descsz = sizeof(x86_elf_prstatus);
	214	note_size = ((sizeof(Elf32_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	215	(descsz + 3) / 4) * 4;
4be34d1e	216	note = g_malloc0(note_size);
9fecbed0 WC	217	note->n_namesz = cpu_to_le32(name_size);
	218	note->n_descsz = cpu_to_le32(descsz);
	219	note->n_type = cpu_to_le32(NT_PRSTATUS);
	220	buf = (char *)note;
	221	buf += ((sizeof(Elf32_Nhdr) + 3) / 4) * 4;
	222	memcpy(buf, name, name_size);
	223	buf += ((name_size + 3) / 4) * 4;
	224	memcpy(buf, &prstatus, sizeof(prstatus));
	225
	226	ret = f(note, note_size, opaque);
	227	g_free(note);
	228	if (ret < 0) {
	229	return -1;
	230	}
	231
	232	return 0;
	233	}
90166b71 WC	234
	235	/*
	236	* please count up QEMUCPUSTATE_VERSION if you have changed definition of
	237	* QEMUCPUState, and modify the tools using this information accordingly.
	238	*/
	239	#define QEMUCPUSTATE_VERSION (1)
	240
	241	struct QEMUCPUSegment {
	242	uint32_t selector;
	243	uint32_t limit;
	244	uint32_t flags;
	245	uint32_t pad;
	246	uint64_t base;
	247	};
	248
	249	typedef struct QEMUCPUSegment QEMUCPUSegment;
	250
	251	struct QEMUCPUState {
	252	uint32_t version;
	253	uint32_t size;
	254	uint64_t rax, rbx, rcx, rdx, rsi, rdi, rsp, rbp;
	255	uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
	256	uint64_t rip, rflags;
	257	QEMUCPUSegment cs, ds, es, fs, gs, ss;
	258	QEMUCPUSegment ldt, tr, gdt, idt;
	259	uint64_t cr[5];
	260	};
	261
	262	typedef struct QEMUCPUState QEMUCPUState;
	263
	264	static void copy_segment(QEMUCPUSegment d, SegmentCache s)
	265	{
	266	d->pad = 0;
	267	d->selector = s->selector;
	268	d->limit = s->limit;
	269	d->flags = s->flags;
	270	d->base = s->base;
	271	}
	272
369ff018	273	static void qemu_get_cpustate(QEMUCPUState s, CPUX86State env)
90166b71 WC	274	{
	275	memset(s, 0, sizeof(QEMUCPUState));
	276
	277	s->version = QEMUCPUSTATE_VERSION;
	278	s->size = sizeof(QEMUCPUState);
	279
	280	s->rax = env->regs[R_EAX];
	281	s->rbx = env->regs[R_EBX];
	282	s->rcx = env->regs[R_ECX];
	283	s->rdx = env->regs[R_EDX];
	284	s->rsi = env->regs[R_ESI];
	285	s->rdi = env->regs[R_EDI];
	286	s->rsp = env->regs[R_ESP];
	287	s->rbp = env->regs[R_EBP];
	288	#ifdef TARGET_X86_64
	289	s->r8 = env->regs[8];
	290	s->r9 = env->regs[9];
	291	s->r10 = env->regs[10];
	292	s->r11 = env->regs[11];
	293	s->r12 = env->regs[12];
	294	s->r13 = env->regs[13];
	295	s->r14 = env->regs[14];
	296	s->r15 = env->regs[15];
	297	#endif
	298	s->rip = env->eip;
	299	s->rflags = env->eflags;
	300
	301	copy_segment(&s->cs, &env->segs[R_CS]);
	302	copy_segment(&s->ds, &env->segs[R_DS]);
	303	copy_segment(&s->es, &env->segs[R_ES]);
	304	copy_segment(&s->fs, &env->segs[R_FS]);
	305	copy_segment(&s->gs, &env->segs[R_GS]);
	306	copy_segment(&s->ss, &env->segs[R_SS]);
	307	copy_segment(&s->ldt, &env->ldt);
	308	copy_segment(&s->tr, &env->tr);
	309	copy_segment(&s->gdt, &env->gdt);
	310	copy_segment(&s->idt, &env->idt);
	311
	312	s->cr[0] = env->cr[0];
	313	s->cr[1] = env->cr[1];
	314	s->cr[2] = env->cr[2];
	315	s->cr[3] = env->cr[3];
	316	s->cr[4] = env->cr[4];
	317	}
	318
c72bf468	319	static inline int cpu_write_qemu_note(WriteCoreDumpFunction f,
369ff018	320	CPUX86State *env,
90166b71 WC	321	void *opaque,
	322	int type)
	323	{
	324	QEMUCPUState state;
	325	Elf64_Nhdr *note64;
	326	Elf32_Nhdr *note32;
	327	void *note;
	328	char *buf;
	329	int descsz, note_size, name_size = 5, note_head_size;
	330	const char *name = "QEMU";
	331	int ret;
	332
	333	qemu_get_cpustate(&state, env);
	334
	335	descsz = sizeof(state);
	336	if (type == 0) {
	337	note_head_size = sizeof(Elf32_Nhdr);
	338	} else {
	339	note_head_size = sizeof(Elf64_Nhdr);
	340	}
	341	note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	342	(descsz + 3) / 4) * 4;
4be34d1e	343	note = g_malloc0(note_size);
90166b71 WC	344	if (type == 0) {
	345	note32 = note;
	346	note32->n_namesz = cpu_to_le32(name_size);
	347	note32->n_descsz = cpu_to_le32(descsz);
	348	note32->n_type = 0;
	349	} else {
	350	note64 = note;
	351	note64->n_namesz = cpu_to_le32(name_size);
	352	note64->n_descsz = cpu_to_le32(descsz);
	353	note64->n_type = 0;
	354	}
	355	buf = note;
	356	buf += ((note_head_size + 3) / 4) * 4;
	357	memcpy(buf, name, name_size);
	358	buf += ((name_size + 3) / 4) * 4;
	359	memcpy(buf, &state, sizeof(state));
	360
	361	ret = f(note, note_size, opaque);
	362	g_free(note);
	363	if (ret < 0) {
	364	return -1;
	365	}
	366
	367	return 0;
	368	}
	369
c72bf468 JF	370	int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	371	void *opaque)
90166b71	372	{
c72bf468 JF	373	X86CPU *cpu = X86_CPU(cs);
	374
	375	return cpu_write_qemu_note(f, &cpu->env, opaque, 1);
90166b71 WC	376	}
90166b71 WC	377
c72bf468 JF	378	int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	379	void *opaque)
90166b71	380	{
c72bf468 JF	381	X86CPU *cpu = X86_CPU(cs);
	382
	383	return cpu_write_qemu_note(f, &cpu->env, opaque, 0);
90166b71	384	}
25ae9c1d	385
56c4bfb3 LE	386	int cpu_get_dump_info(ArchDumpInfo *info,
56c4bfb3 LE	387	const GuestPhysBlockList *guest_phys_blocks)
25ae9c1d WC	388	{
25ae9c1d WC	389	bool lma = false;
56c4bfb3	390	GuestPhysBlock *block;
25ae9c1d WC	391
25ae9c1d WC	392	#ifdef TARGET_X86_64
182735ef	393	X86CPU *first_x86_cpu = X86_CPU(first_cpu);
fd5d23ba	394	lma = first_cpu && (first_x86_cpu->env.hflags & HF_LMA_MASK);
25ae9c1d WC	395	#endif
	396
	397	if (lma) {
	398	info->d_machine = EM_X86_64;
	399	} else {
	400	info->d_machine = EM_386;
	401	}
	402	info->d_endian = ELFDATA2LSB;
	403
	404	if (lma) {
	405	info->d_class = ELFCLASS64;
	406	} else {
	407	info->d_class = ELFCLASS32;
	408
56c4bfb3 LE	409	QTAILQ_FOREACH(block, &guest_phys_blocks->head, next) {
56c4bfb3 LE	410	if (block->target_end > UINT_MAX) {
25ae9c1d WC	411	/* The memory size is greater than 4G */
	412	info->d_class = ELFCLASS64;
	413	break;
	414	}
	415	}
	416	}
	417
	418	return 0;
	419	}
0038ffb0	420
4720bd05	421	ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
0038ffb0 WC	422	{
	423	int name_size = 5; /* "CORE" or "QEMU" */
	424	size_t elf_note_size = 0;
	425	size_t qemu_note_size = 0;
	426	int elf_desc_size = 0;
	427	int qemu_desc_size = 0;
	428	int note_head_size;
	429
	430	if (class == ELFCLASS32) {
	431	note_head_size = sizeof(Elf32_Nhdr);
	432	} else {
	433	note_head_size = sizeof(Elf64_Nhdr);
	434	}
	435
	436	if (machine == EM_386) {
	437	elf_desc_size = sizeof(x86_elf_prstatus);
	438	}
	439	#ifdef TARGET_X86_64
	440	else {
	441	elf_desc_size = sizeof(x86_64_elf_prstatus);
	442	}
	443	#endif
	444	qemu_desc_size = sizeof(QEMUCPUState);
	445
	446	elf_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	447	(elf_desc_size + 3) / 4) * 4;
	448	qemu_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	449	(qemu_desc_size + 3) / 4) * 4;
	450
	451	return (elf_note_size + qemu_note_size) * nr_cpus;
	452	}