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Commit | Line | Data |
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664e0f19 | 1 | /* |
222a3336 | 2 | * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support |
5fafdf24 | 3 | * |
664e0f19 | 4 | * Copyright (c) 2005 Fabrice Bellard |
222a3336 | 5 | * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com> |
664e0f19 FB |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
664e0f19 | 19 | */ |
04af534d | 20 | |
6f2945cd | 21 | #include "crypto/aes.h" |
04af534d | 22 | |
664e0f19 FB |
23 | #if SHIFT == 0 |
24 | #define Reg MMXReg | |
001faf32 | 25 | #define XMM_ONLY(...) |
664e0f19 FB |
26 | #define B(n) MMX_B(n) |
27 | #define W(n) MMX_W(n) | |
28 | #define L(n) MMX_L(n) | |
83625474 | 29 | #define Q(n) MMX_Q(n) |
664e0f19 FB |
30 | #define SUFFIX _mmx |
31 | #else | |
fa451874 | 32 | #define Reg ZMMReg |
001faf32 | 33 | #define XMM_ONLY(...) __VA_ARGS__ |
19cbd87c EH |
34 | #define B(n) ZMM_B(n) |
35 | #define W(n) ZMM_W(n) | |
36 | #define L(n) ZMM_L(n) | |
37 | #define Q(n) ZMM_Q(n) | |
664e0f19 FB |
38 | #define SUFFIX _xmm |
39 | #endif | |
40 | ||
d3eb5eae | 41 | void glue(helper_psrlw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 42 | { |
664e0f19 FB |
43 | int shift; |
44 | ||
664e0f19 FB |
45 | if (s->Q(0) > 15) { |
46 | d->Q(0) = 0; | |
47 | #if SHIFT == 1 | |
48 | d->Q(1) = 0; | |
49 | #endif | |
50 | } else { | |
51 | shift = s->B(0); | |
52 | d->W(0) >>= shift; | |
53 | d->W(1) >>= shift; | |
54 | d->W(2) >>= shift; | |
55 | d->W(3) >>= shift; | |
56 | #if SHIFT == 1 | |
57 | d->W(4) >>= shift; | |
58 | d->W(5) >>= shift; | |
59 | d->W(6) >>= shift; | |
60 | d->W(7) >>= shift; | |
61 | #endif | |
62 | } | |
63 | } | |
64 | ||
d3eb5eae | 65 | void glue(helper_psraw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 66 | { |
664e0f19 FB |
67 | int shift; |
68 | ||
664e0f19 FB |
69 | if (s->Q(0) > 15) { |
70 | shift = 15; | |
71 | } else { | |
72 | shift = s->B(0); | |
73 | } | |
74 | d->W(0) = (int16_t)d->W(0) >> shift; | |
75 | d->W(1) = (int16_t)d->W(1) >> shift; | |
76 | d->W(2) = (int16_t)d->W(2) >> shift; | |
77 | d->W(3) = (int16_t)d->W(3) >> shift; | |
78 | #if SHIFT == 1 | |
79 | d->W(4) = (int16_t)d->W(4) >> shift; | |
80 | d->W(5) = (int16_t)d->W(5) >> shift; | |
81 | d->W(6) = (int16_t)d->W(6) >> shift; | |
82 | d->W(7) = (int16_t)d->W(7) >> shift; | |
83 | #endif | |
84 | } | |
85 | ||
d3eb5eae | 86 | void glue(helper_psllw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 87 | { |
664e0f19 FB |
88 | int shift; |
89 | ||
664e0f19 FB |
90 | if (s->Q(0) > 15) { |
91 | d->Q(0) = 0; | |
92 | #if SHIFT == 1 | |
93 | d->Q(1) = 0; | |
94 | #endif | |
95 | } else { | |
96 | shift = s->B(0); | |
97 | d->W(0) <<= shift; | |
98 | d->W(1) <<= shift; | |
99 | d->W(2) <<= shift; | |
100 | d->W(3) <<= shift; | |
101 | #if SHIFT == 1 | |
102 | d->W(4) <<= shift; | |
103 | d->W(5) <<= shift; | |
104 | d->W(6) <<= shift; | |
105 | d->W(7) <<= shift; | |
106 | #endif | |
107 | } | |
108 | } | |
109 | ||
d3eb5eae | 110 | void glue(helper_psrld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 111 | { |
664e0f19 FB |
112 | int shift; |
113 | ||
664e0f19 FB |
114 | if (s->Q(0) > 31) { |
115 | d->Q(0) = 0; | |
116 | #if SHIFT == 1 | |
117 | d->Q(1) = 0; | |
118 | #endif | |
119 | } else { | |
120 | shift = s->B(0); | |
121 | d->L(0) >>= shift; | |
122 | d->L(1) >>= shift; | |
123 | #if SHIFT == 1 | |
124 | d->L(2) >>= shift; | |
125 | d->L(3) >>= shift; | |
126 | #endif | |
127 | } | |
128 | } | |
129 | ||
d3eb5eae | 130 | void glue(helper_psrad, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 131 | { |
664e0f19 FB |
132 | int shift; |
133 | ||
664e0f19 FB |
134 | if (s->Q(0) > 31) { |
135 | shift = 31; | |
136 | } else { | |
137 | shift = s->B(0); | |
138 | } | |
139 | d->L(0) = (int32_t)d->L(0) >> shift; | |
140 | d->L(1) = (int32_t)d->L(1) >> shift; | |
141 | #if SHIFT == 1 | |
142 | d->L(2) = (int32_t)d->L(2) >> shift; | |
143 | d->L(3) = (int32_t)d->L(3) >> shift; | |
144 | #endif | |
145 | } | |
146 | ||
d3eb5eae | 147 | void glue(helper_pslld, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 148 | { |
664e0f19 FB |
149 | int shift; |
150 | ||
664e0f19 FB |
151 | if (s->Q(0) > 31) { |
152 | d->Q(0) = 0; | |
153 | #if SHIFT == 1 | |
154 | d->Q(1) = 0; | |
155 | #endif | |
156 | } else { | |
157 | shift = s->B(0); | |
158 | d->L(0) <<= shift; | |
159 | d->L(1) <<= shift; | |
160 | #if SHIFT == 1 | |
161 | d->L(2) <<= shift; | |
162 | d->L(3) <<= shift; | |
163 | #endif | |
164 | } | |
165 | } | |
166 | ||
d3eb5eae | 167 | void glue(helper_psrlq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 168 | { |
664e0f19 FB |
169 | int shift; |
170 | ||
664e0f19 FB |
171 | if (s->Q(0) > 63) { |
172 | d->Q(0) = 0; | |
173 | #if SHIFT == 1 | |
174 | d->Q(1) = 0; | |
175 | #endif | |
176 | } else { | |
177 | shift = s->B(0); | |
178 | d->Q(0) >>= shift; | |
179 | #if SHIFT == 1 | |
180 | d->Q(1) >>= shift; | |
181 | #endif | |
182 | } | |
183 | } | |
184 | ||
d3eb5eae | 185 | void glue(helper_psllq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 186 | { |
664e0f19 FB |
187 | int shift; |
188 | ||
664e0f19 FB |
189 | if (s->Q(0) > 63) { |
190 | d->Q(0) = 0; | |
191 | #if SHIFT == 1 | |
192 | d->Q(1) = 0; | |
193 | #endif | |
194 | } else { | |
195 | shift = s->B(0); | |
196 | d->Q(0) <<= shift; | |
197 | #if SHIFT == 1 | |
198 | d->Q(1) <<= shift; | |
199 | #endif | |
200 | } | |
201 | } | |
202 | ||
203 | #if SHIFT == 1 | |
d3eb5eae | 204 | void glue(helper_psrldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 205 | { |
664e0f19 FB |
206 | int shift, i; |
207 | ||
664e0f19 | 208 | shift = s->L(0); |
e01d9d31 | 209 | if (shift > 16) { |
664e0f19 | 210 | shift = 16; |
e01d9d31 BS |
211 | } |
212 | for (i = 0; i < 16 - shift; i++) { | |
664e0f19 | 213 | d->B(i) = d->B(i + shift); |
e01d9d31 BS |
214 | } |
215 | for (i = 16 - shift; i < 16; i++) { | |
664e0f19 | 216 | d->B(i) = 0; |
e01d9d31 | 217 | } |
664e0f19 FB |
218 | } |
219 | ||
d3eb5eae | 220 | void glue(helper_pslldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 221 | { |
664e0f19 FB |
222 | int shift, i; |
223 | ||
664e0f19 | 224 | shift = s->L(0); |
e01d9d31 | 225 | if (shift > 16) { |
664e0f19 | 226 | shift = 16; |
e01d9d31 BS |
227 | } |
228 | for (i = 15; i >= shift; i--) { | |
664e0f19 | 229 | d->B(i) = d->B(i - shift); |
e01d9d31 BS |
230 | } |
231 | for (i = 0; i < shift; i++) { | |
664e0f19 | 232 | d->B(i) = 0; |
e01d9d31 | 233 | } |
664e0f19 FB |
234 | } |
235 | #endif | |
236 | ||
e01d9d31 | 237 | #define SSE_HELPER_B(name, F) \ |
d3eb5eae | 238 | void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ |
e01d9d31 BS |
239 | { \ |
240 | d->B(0) = F(d->B(0), s->B(0)); \ | |
241 | d->B(1) = F(d->B(1), s->B(1)); \ | |
242 | d->B(2) = F(d->B(2), s->B(2)); \ | |
243 | d->B(3) = F(d->B(3), s->B(3)); \ | |
244 | d->B(4) = F(d->B(4), s->B(4)); \ | |
245 | d->B(5) = F(d->B(5), s->B(5)); \ | |
246 | d->B(6) = F(d->B(6), s->B(6)); \ | |
247 | d->B(7) = F(d->B(7), s->B(7)); \ | |
248 | XMM_ONLY( \ | |
249 | d->B(8) = F(d->B(8), s->B(8)); \ | |
250 | d->B(9) = F(d->B(9), s->B(9)); \ | |
251 | d->B(10) = F(d->B(10), s->B(10)); \ | |
252 | d->B(11) = F(d->B(11), s->B(11)); \ | |
253 | d->B(12) = F(d->B(12), s->B(12)); \ | |
254 | d->B(13) = F(d->B(13), s->B(13)); \ | |
255 | d->B(14) = F(d->B(14), s->B(14)); \ | |
256 | d->B(15) = F(d->B(15), s->B(15)); \ | |
257 | ) \ | |
258 | } | |
259 | ||
260 | #define SSE_HELPER_W(name, F) \ | |
d3eb5eae | 261 | void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ |
e01d9d31 BS |
262 | { \ |
263 | d->W(0) = F(d->W(0), s->W(0)); \ | |
264 | d->W(1) = F(d->W(1), s->W(1)); \ | |
265 | d->W(2) = F(d->W(2), s->W(2)); \ | |
266 | d->W(3) = F(d->W(3), s->W(3)); \ | |
267 | XMM_ONLY( \ | |
268 | d->W(4) = F(d->W(4), s->W(4)); \ | |
269 | d->W(5) = F(d->W(5), s->W(5)); \ | |
270 | d->W(6) = F(d->W(6), s->W(6)); \ | |
271 | d->W(7) = F(d->W(7), s->W(7)); \ | |
272 | ) \ | |
273 | } | |
274 | ||
275 | #define SSE_HELPER_L(name, F) \ | |
d3eb5eae | 276 | void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ |
e01d9d31 BS |
277 | { \ |
278 | d->L(0) = F(d->L(0), s->L(0)); \ | |
279 | d->L(1) = F(d->L(1), s->L(1)); \ | |
280 | XMM_ONLY( \ | |
281 | d->L(2) = F(d->L(2), s->L(2)); \ | |
282 | d->L(3) = F(d->L(3), s->L(3)); \ | |
283 | ) \ | |
284 | } | |
285 | ||
286 | #define SSE_HELPER_Q(name, F) \ | |
d3eb5eae | 287 | void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ |
e01d9d31 BS |
288 | { \ |
289 | d->Q(0) = F(d->Q(0), s->Q(0)); \ | |
290 | XMM_ONLY( \ | |
291 | d->Q(1) = F(d->Q(1), s->Q(1)); \ | |
292 | ) \ | |
293 | } | |
664e0f19 FB |
294 | |
295 | #if SHIFT == 0 | |
296 | static inline int satub(int x) | |
297 | { | |
e01d9d31 | 298 | if (x < 0) { |
664e0f19 | 299 | return 0; |
e01d9d31 | 300 | } else if (x > 255) { |
664e0f19 | 301 | return 255; |
e01d9d31 | 302 | } else { |
664e0f19 | 303 | return x; |
e01d9d31 | 304 | } |
664e0f19 FB |
305 | } |
306 | ||
307 | static inline int satuw(int x) | |
308 | { | |
e01d9d31 | 309 | if (x < 0) { |
664e0f19 | 310 | return 0; |
e01d9d31 | 311 | } else if (x > 65535) { |
664e0f19 | 312 | return 65535; |
e01d9d31 | 313 | } else { |
664e0f19 | 314 | return x; |
e01d9d31 | 315 | } |
664e0f19 FB |
316 | } |
317 | ||
318 | static inline int satsb(int x) | |
319 | { | |
e01d9d31 | 320 | if (x < -128) { |
664e0f19 | 321 | return -128; |
e01d9d31 | 322 | } else if (x > 127) { |
664e0f19 | 323 | return 127; |
e01d9d31 | 324 | } else { |
664e0f19 | 325 | return x; |
e01d9d31 | 326 | } |
664e0f19 FB |
327 | } |
328 | ||
329 | static inline int satsw(int x) | |
330 | { | |
e01d9d31 | 331 | if (x < -32768) { |
664e0f19 | 332 | return -32768; |
e01d9d31 | 333 | } else if (x > 32767) { |
664e0f19 | 334 | return 32767; |
e01d9d31 | 335 | } else { |
664e0f19 | 336 | return x; |
e01d9d31 | 337 | } |
664e0f19 FB |
338 | } |
339 | ||
340 | #define FADD(a, b) ((a) + (b)) | |
341 | #define FADDUB(a, b) satub((a) + (b)) | |
342 | #define FADDUW(a, b) satuw((a) + (b)) | |
343 | #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b)) | |
344 | #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b)) | |
345 | ||
346 | #define FSUB(a, b) ((a) - (b)) | |
347 | #define FSUBUB(a, b) satub((a) - (b)) | |
348 | #define FSUBUW(a, b) satuw((a) - (b)) | |
349 | #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b)) | |
350 | #define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b)) | |
351 | #define FMINUB(a, b) ((a) < (b)) ? (a) : (b) | |
352 | #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b) | |
353 | #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b) | |
354 | #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b) | |
355 | ||
e01d9d31 | 356 | #define FAND(a, b) ((a) & (b)) |
664e0f19 | 357 | #define FANDN(a, b) ((~(a)) & (b)) |
e01d9d31 BS |
358 | #define FOR(a, b) ((a) | (b)) |
359 | #define FXOR(a, b) ((a) ^ (b)) | |
664e0f19 | 360 | |
e01d9d31 BS |
361 | #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0) |
362 | #define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0) | |
363 | #define FCMPGTL(a, b) ((int32_t)(a) > (int32_t)(b) ? -1 : 0) | |
364 | #define FCMPEQ(a, b) ((a) == (b) ? -1 : 0) | |
664e0f19 | 365 | |
e01d9d31 BS |
366 | #define FMULLW(a, b) ((a) * (b)) |
367 | #define FMULHRW(a, b) (((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16) | |
368 | #define FMULHUW(a, b) ((a) * (b) >> 16) | |
369 | #define FMULHW(a, b) ((int16_t)(a) * (int16_t)(b) >> 16) | |
664e0f19 | 370 | |
e01d9d31 | 371 | #define FAVG(a, b) (((a) + (b) + 1) >> 1) |
664e0f19 FB |
372 | #endif |
373 | ||
5af45186 FB |
374 | SSE_HELPER_B(helper_paddb, FADD) |
375 | SSE_HELPER_W(helper_paddw, FADD) | |
376 | SSE_HELPER_L(helper_paddl, FADD) | |
377 | SSE_HELPER_Q(helper_paddq, FADD) | |
664e0f19 | 378 | |
5af45186 FB |
379 | SSE_HELPER_B(helper_psubb, FSUB) |
380 | SSE_HELPER_W(helper_psubw, FSUB) | |
381 | SSE_HELPER_L(helper_psubl, FSUB) | |
382 | SSE_HELPER_Q(helper_psubq, FSUB) | |
664e0f19 | 383 | |
5af45186 FB |
384 | SSE_HELPER_B(helper_paddusb, FADDUB) |
385 | SSE_HELPER_B(helper_paddsb, FADDSB) | |
386 | SSE_HELPER_B(helper_psubusb, FSUBUB) | |
387 | SSE_HELPER_B(helper_psubsb, FSUBSB) | |
664e0f19 | 388 | |
5af45186 FB |
389 | SSE_HELPER_W(helper_paddusw, FADDUW) |
390 | SSE_HELPER_W(helper_paddsw, FADDSW) | |
391 | SSE_HELPER_W(helper_psubusw, FSUBUW) | |
392 | SSE_HELPER_W(helper_psubsw, FSUBSW) | |
664e0f19 | 393 | |
5af45186 FB |
394 | SSE_HELPER_B(helper_pminub, FMINUB) |
395 | SSE_HELPER_B(helper_pmaxub, FMAXUB) | |
664e0f19 | 396 | |
5af45186 FB |
397 | SSE_HELPER_W(helper_pminsw, FMINSW) |
398 | SSE_HELPER_W(helper_pmaxsw, FMAXSW) | |
664e0f19 | 399 | |
5af45186 FB |
400 | SSE_HELPER_Q(helper_pand, FAND) |
401 | SSE_HELPER_Q(helper_pandn, FANDN) | |
402 | SSE_HELPER_Q(helper_por, FOR) | |
403 | SSE_HELPER_Q(helper_pxor, FXOR) | |
664e0f19 | 404 | |
5af45186 FB |
405 | SSE_HELPER_B(helper_pcmpgtb, FCMPGTB) |
406 | SSE_HELPER_W(helper_pcmpgtw, FCMPGTW) | |
407 | SSE_HELPER_L(helper_pcmpgtl, FCMPGTL) | |
664e0f19 | 408 | |
5af45186 FB |
409 | SSE_HELPER_B(helper_pcmpeqb, FCMPEQ) |
410 | SSE_HELPER_W(helper_pcmpeqw, FCMPEQ) | |
411 | SSE_HELPER_L(helper_pcmpeql, FCMPEQ) | |
664e0f19 | 412 | |
5af45186 | 413 | SSE_HELPER_W(helper_pmullw, FMULLW) |
a35f3ec7 | 414 | #if SHIFT == 0 |
5af45186 | 415 | SSE_HELPER_W(helper_pmulhrw, FMULHRW) |
a35f3ec7 | 416 | #endif |
5af45186 FB |
417 | SSE_HELPER_W(helper_pmulhuw, FMULHUW) |
418 | SSE_HELPER_W(helper_pmulhw, FMULHW) | |
664e0f19 | 419 | |
5af45186 FB |
420 | SSE_HELPER_B(helper_pavgb, FAVG) |
421 | SSE_HELPER_W(helper_pavgw, FAVG) | |
664e0f19 | 422 | |
d3eb5eae | 423 | void glue(helper_pmuludq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 424 | { |
664e0f19 FB |
425 | d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0); |
426 | #if SHIFT == 1 | |
427 | d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2); | |
428 | #endif | |
429 | } | |
430 | ||
d3eb5eae | 431 | void glue(helper_pmaddwd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 FB |
432 | { |
433 | int i; | |
664e0f19 | 434 | |
e01d9d31 BS |
435 | for (i = 0; i < (2 << SHIFT); i++) { |
436 | d->L(i) = (int16_t)s->W(2 * i) * (int16_t)d->W(2 * i) + | |
437 | (int16_t)s->W(2 * i + 1) * (int16_t)d->W(2 * i + 1); | |
664e0f19 FB |
438 | } |
439 | } | |
440 | ||
441 | #if SHIFT == 0 | |
442 | static inline int abs1(int a) | |
443 | { | |
e01d9d31 | 444 | if (a < 0) { |
664e0f19 | 445 | return -a; |
e01d9d31 | 446 | } else { |
664e0f19 | 447 | return a; |
e01d9d31 | 448 | } |
664e0f19 FB |
449 | } |
450 | #endif | |
d3eb5eae | 451 | void glue(helper_psadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 FB |
452 | { |
453 | unsigned int val; | |
664e0f19 FB |
454 | |
455 | val = 0; | |
456 | val += abs1(d->B(0) - s->B(0)); | |
457 | val += abs1(d->B(1) - s->B(1)); | |
458 | val += abs1(d->B(2) - s->B(2)); | |
459 | val += abs1(d->B(3) - s->B(3)); | |
460 | val += abs1(d->B(4) - s->B(4)); | |
461 | val += abs1(d->B(5) - s->B(5)); | |
462 | val += abs1(d->B(6) - s->B(6)); | |
463 | val += abs1(d->B(7) - s->B(7)); | |
464 | d->Q(0) = val; | |
465 | #if SHIFT == 1 | |
466 | val = 0; | |
467 | val += abs1(d->B(8) - s->B(8)); | |
468 | val += abs1(d->B(9) - s->B(9)); | |
469 | val += abs1(d->B(10) - s->B(10)); | |
470 | val += abs1(d->B(11) - s->B(11)); | |
471 | val += abs1(d->B(12) - s->B(12)); | |
472 | val += abs1(d->B(13) - s->B(13)); | |
473 | val += abs1(d->B(14) - s->B(14)); | |
474 | val += abs1(d->B(15) - s->B(15)); | |
475 | d->Q(1) = val; | |
476 | #endif | |
477 | } | |
478 | ||
d3eb5eae BS |
479 | void glue(helper_maskmov, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
480 | target_ulong a0) | |
664e0f19 FB |
481 | { |
482 | int i; | |
e01d9d31 BS |
483 | |
484 | for (i = 0; i < (8 << SHIFT); i++) { | |
485 | if (s->B(i) & 0x80) { | |
4054cdec | 486 | cpu_stb_data_ra(env, a0 + i, d->B(i), GETPC()); |
e01d9d31 | 487 | } |
664e0f19 FB |
488 | } |
489 | } | |
490 | ||
e01d9d31 | 491 | void glue(helper_movl_mm_T0, SUFFIX)(Reg *d, uint32_t val) |
664e0f19 | 492 | { |
5af45186 | 493 | d->L(0) = val; |
664e0f19 FB |
494 | d->L(1) = 0; |
495 | #if SHIFT == 1 | |
496 | d->Q(1) = 0; | |
497 | #endif | |
498 | } | |
499 | ||
dabd98dd | 500 | #ifdef TARGET_X86_64 |
e01d9d31 | 501 | void glue(helper_movq_mm_T0, SUFFIX)(Reg *d, uint64_t val) |
dabd98dd | 502 | { |
5af45186 | 503 | d->Q(0) = val; |
dabd98dd FB |
504 | #if SHIFT == 1 |
505 | d->Q(1) = 0; | |
506 | #endif | |
507 | } | |
dabd98dd FB |
508 | #endif |
509 | ||
664e0f19 | 510 | #if SHIFT == 0 |
e01d9d31 | 511 | void glue(helper_pshufw, SUFFIX)(Reg *d, Reg *s, int order) |
664e0f19 | 512 | { |
5af45186 | 513 | Reg r; |
e01d9d31 | 514 | |
664e0f19 FB |
515 | r.W(0) = s->W(order & 3); |
516 | r.W(1) = s->W((order >> 2) & 3); | |
517 | r.W(2) = s->W((order >> 4) & 3); | |
518 | r.W(3) = s->W((order >> 6) & 3); | |
519 | *d = r; | |
520 | } | |
521 | #else | |
5af45186 | 522 | void helper_shufps(Reg *d, Reg *s, int order) |
d52cf7a6 | 523 | { |
5af45186 | 524 | Reg r; |
e01d9d31 | 525 | |
d52cf7a6 FB |
526 | r.L(0) = d->L(order & 3); |
527 | r.L(1) = d->L((order >> 2) & 3); | |
528 | r.L(2) = s->L((order >> 4) & 3); | |
529 | r.L(3) = s->L((order >> 6) & 3); | |
530 | *d = r; | |
531 | } | |
532 | ||
5af45186 | 533 | void helper_shufpd(Reg *d, Reg *s, int order) |
664e0f19 | 534 | { |
5af45186 | 535 | Reg r; |
e01d9d31 | 536 | |
d52cf7a6 | 537 | r.Q(0) = d->Q(order & 1); |
664e0f19 FB |
538 | r.Q(1) = s->Q((order >> 1) & 1); |
539 | *d = r; | |
540 | } | |
541 | ||
e01d9d31 | 542 | void glue(helper_pshufd, SUFFIX)(Reg *d, Reg *s, int order) |
664e0f19 | 543 | { |
5af45186 | 544 | Reg r; |
e01d9d31 | 545 | |
664e0f19 FB |
546 | r.L(0) = s->L(order & 3); |
547 | r.L(1) = s->L((order >> 2) & 3); | |
548 | r.L(2) = s->L((order >> 4) & 3); | |
549 | r.L(3) = s->L((order >> 6) & 3); | |
550 | *d = r; | |
551 | } | |
552 | ||
e01d9d31 | 553 | void glue(helper_pshuflw, SUFFIX)(Reg *d, Reg *s, int order) |
664e0f19 | 554 | { |
5af45186 | 555 | Reg r; |
e01d9d31 | 556 | |
664e0f19 FB |
557 | r.W(0) = s->W(order & 3); |
558 | r.W(1) = s->W((order >> 2) & 3); | |
559 | r.W(2) = s->W((order >> 4) & 3); | |
560 | r.W(3) = s->W((order >> 6) & 3); | |
561 | r.Q(1) = s->Q(1); | |
562 | *d = r; | |
563 | } | |
564 | ||
e01d9d31 | 565 | void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order) |
664e0f19 | 566 | { |
5af45186 | 567 | Reg r; |
e01d9d31 | 568 | |
664e0f19 FB |
569 | r.Q(0) = s->Q(0); |
570 | r.W(4) = s->W(4 + (order & 3)); | |
571 | r.W(5) = s->W(4 + ((order >> 2) & 3)); | |
572 | r.W(6) = s->W(4 + ((order >> 4) & 3)); | |
573 | r.W(7) = s->W(4 + ((order >> 6) & 3)); | |
574 | *d = r; | |
575 | } | |
576 | #endif | |
577 | ||
578 | #if SHIFT == 1 | |
579 | /* FPU ops */ | |
580 | /* XXX: not accurate */ | |
581 | ||
d3eb5eae BS |
582 | #define SSE_HELPER_S(name, F) \ |
583 | void helper_ ## name ## ps(CPUX86State *env, Reg *d, Reg *s) \ | |
584 | { \ | |
19cbd87c EH |
585 | d->ZMM_S(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \ |
586 | d->ZMM_S(1) = F(32, d->ZMM_S(1), s->ZMM_S(1)); \ | |
587 | d->ZMM_S(2) = F(32, d->ZMM_S(2), s->ZMM_S(2)); \ | |
588 | d->ZMM_S(3) = F(32, d->ZMM_S(3), s->ZMM_S(3)); \ | |
d3eb5eae BS |
589 | } \ |
590 | \ | |
591 | void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s) \ | |
592 | { \ | |
19cbd87c | 593 | d->ZMM_S(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \ |
d3eb5eae BS |
594 | } \ |
595 | \ | |
596 | void helper_ ## name ## pd(CPUX86State *env, Reg *d, Reg *s) \ | |
597 | { \ | |
19cbd87c EH |
598 | d->ZMM_D(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \ |
599 | d->ZMM_D(1) = F(64, d->ZMM_D(1), s->ZMM_D(1)); \ | |
d3eb5eae BS |
600 | } \ |
601 | \ | |
602 | void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s) \ | |
603 | { \ | |
19cbd87c | 604 | d->ZMM_D(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \ |
e01d9d31 | 605 | } |
664e0f19 | 606 | |
7a0e1f41 FB |
607 | #define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status) |
608 | #define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status) | |
609 | #define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status) | |
610 | #define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status) | |
7a0e1f41 | 611 | #define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status) |
664e0f19 | 612 | |
a4d1f142 AJ |
613 | /* Note that the choice of comparison op here is important to get the |
614 | * special cases right: for min and max Intel specifies that (-0,0), | |
615 | * (NaN, anything) and (anything, NaN) return the second argument. | |
616 | */ | |
e01d9d31 BS |
617 | #define FPU_MIN(size, a, b) \ |
618 | (float ## size ## _lt(a, b, &env->sse_status) ? (a) : (b)) | |
619 | #define FPU_MAX(size, a, b) \ | |
620 | (float ## size ## _lt(b, a, &env->sse_status) ? (a) : (b)) | |
a4d1f142 | 621 | |
5af45186 FB |
622 | SSE_HELPER_S(add, FPU_ADD) |
623 | SSE_HELPER_S(sub, FPU_SUB) | |
624 | SSE_HELPER_S(mul, FPU_MUL) | |
625 | SSE_HELPER_S(div, FPU_DIV) | |
626 | SSE_HELPER_S(min, FPU_MIN) | |
627 | SSE_HELPER_S(max, FPU_MAX) | |
628 | SSE_HELPER_S(sqrt, FPU_SQRT) | |
664e0f19 FB |
629 | |
630 | ||
631 | /* float to float conversions */ | |
d3eb5eae | 632 | void helper_cvtps2pd(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 633 | { |
8422b113 | 634 | float32 s0, s1; |
e01d9d31 | 635 | |
19cbd87c EH |
636 | s0 = s->ZMM_S(0); |
637 | s1 = s->ZMM_S(1); | |
638 | d->ZMM_D(0) = float32_to_float64(s0, &env->sse_status); | |
639 | d->ZMM_D(1) = float32_to_float64(s1, &env->sse_status); | |
664e0f19 FB |
640 | } |
641 | ||
d3eb5eae | 642 | void helper_cvtpd2ps(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 643 | { |
19cbd87c EH |
644 | d->ZMM_S(0) = float64_to_float32(s->ZMM_D(0), &env->sse_status); |
645 | d->ZMM_S(1) = float64_to_float32(s->ZMM_D(1), &env->sse_status); | |
664e0f19 FB |
646 | d->Q(1) = 0; |
647 | } | |
648 | ||
d3eb5eae | 649 | void helper_cvtss2sd(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 650 | { |
19cbd87c | 651 | d->ZMM_D(0) = float32_to_float64(s->ZMM_S(0), &env->sse_status); |
664e0f19 FB |
652 | } |
653 | ||
d3eb5eae | 654 | void helper_cvtsd2ss(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 655 | { |
19cbd87c | 656 | d->ZMM_S(0) = float64_to_float32(s->ZMM_D(0), &env->sse_status); |
664e0f19 FB |
657 | } |
658 | ||
659 | /* integer to float */ | |
d3eb5eae | 660 | void helper_cvtdq2ps(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 661 | { |
19cbd87c EH |
662 | d->ZMM_S(0) = int32_to_float32(s->ZMM_L(0), &env->sse_status); |
663 | d->ZMM_S(1) = int32_to_float32(s->ZMM_L(1), &env->sse_status); | |
664 | d->ZMM_S(2) = int32_to_float32(s->ZMM_L(2), &env->sse_status); | |
665 | d->ZMM_S(3) = int32_to_float32(s->ZMM_L(3), &env->sse_status); | |
664e0f19 FB |
666 | } |
667 | ||
d3eb5eae | 668 | void helper_cvtdq2pd(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 669 | { |
664e0f19 | 670 | int32_t l0, l1; |
e01d9d31 | 671 | |
19cbd87c EH |
672 | l0 = (int32_t)s->ZMM_L(0); |
673 | l1 = (int32_t)s->ZMM_L(1); | |
674 | d->ZMM_D(0) = int32_to_float64(l0, &env->sse_status); | |
675 | d->ZMM_D(1) = int32_to_float64(l1, &env->sse_status); | |
664e0f19 FB |
676 | } |
677 | ||
fa451874 | 678 | void helper_cvtpi2ps(CPUX86State *env, ZMMReg *d, MMXReg *s) |
664e0f19 | 679 | { |
19cbd87c EH |
680 | d->ZMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status); |
681 | d->ZMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status); | |
664e0f19 FB |
682 | } |
683 | ||
fa451874 | 684 | void helper_cvtpi2pd(CPUX86State *env, ZMMReg *d, MMXReg *s) |
664e0f19 | 685 | { |
19cbd87c EH |
686 | d->ZMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status); |
687 | d->ZMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status); | |
664e0f19 FB |
688 | } |
689 | ||
fa451874 | 690 | void helper_cvtsi2ss(CPUX86State *env, ZMMReg *d, uint32_t val) |
664e0f19 | 691 | { |
19cbd87c | 692 | d->ZMM_S(0) = int32_to_float32(val, &env->sse_status); |
664e0f19 FB |
693 | } |
694 | ||
fa451874 | 695 | void helper_cvtsi2sd(CPUX86State *env, ZMMReg *d, uint32_t val) |
664e0f19 | 696 | { |
19cbd87c | 697 | d->ZMM_D(0) = int32_to_float64(val, &env->sse_status); |
664e0f19 FB |
698 | } |
699 | ||
700 | #ifdef TARGET_X86_64 | |
fa451874 | 701 | void helper_cvtsq2ss(CPUX86State *env, ZMMReg *d, uint64_t val) |
664e0f19 | 702 | { |
19cbd87c | 703 | d->ZMM_S(0) = int64_to_float32(val, &env->sse_status); |
664e0f19 FB |
704 | } |
705 | ||
fa451874 | 706 | void helper_cvtsq2sd(CPUX86State *env, ZMMReg *d, uint64_t val) |
664e0f19 | 707 | { |
19cbd87c | 708 | d->ZMM_D(0) = int64_to_float64(val, &env->sse_status); |
664e0f19 FB |
709 | } |
710 | #endif | |
711 | ||
712 | /* float to integer */ | |
1e8a98b5 PM |
713 | |
714 | /* | |
715 | * x86 mandates that we return the indefinite integer value for the result | |
716 | * of any float-to-integer conversion that raises the 'invalid' exception. | |
717 | * Wrap the softfloat functions to get this behaviour. | |
718 | */ | |
719 | #define WRAP_FLOATCONV(RETTYPE, FN, FLOATTYPE, INDEFVALUE) \ | |
720 | static inline RETTYPE x86_##FN(FLOATTYPE a, float_status *s) \ | |
721 | { \ | |
722 | int oldflags, newflags; \ | |
723 | RETTYPE r; \ | |
724 | \ | |
725 | oldflags = get_float_exception_flags(s); \ | |
726 | set_float_exception_flags(0, s); \ | |
727 | r = FN(a, s); \ | |
728 | newflags = get_float_exception_flags(s); \ | |
729 | if (newflags & float_flag_invalid) { \ | |
730 | r = INDEFVALUE; \ | |
731 | } \ | |
732 | set_float_exception_flags(newflags | oldflags, s); \ | |
733 | return r; \ | |
734 | } | |
735 | ||
736 | WRAP_FLOATCONV(int32_t, float32_to_int32, float32, INT32_MIN) | |
737 | WRAP_FLOATCONV(int32_t, float32_to_int32_round_to_zero, float32, INT32_MIN) | |
738 | WRAP_FLOATCONV(int32_t, float64_to_int32, float64, INT32_MIN) | |
739 | WRAP_FLOATCONV(int32_t, float64_to_int32_round_to_zero, float64, INT32_MIN) | |
740 | WRAP_FLOATCONV(int64_t, float32_to_int64, float32, INT64_MIN) | |
741 | WRAP_FLOATCONV(int64_t, float32_to_int64_round_to_zero, float32, INT64_MIN) | |
742 | WRAP_FLOATCONV(int64_t, float64_to_int64, float64, INT64_MIN) | |
743 | WRAP_FLOATCONV(int64_t, float64_to_int64_round_to_zero, float64, INT64_MIN) | |
744 | ||
fa451874 | 745 | void helper_cvtps2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 746 | { |
1e8a98b5 PM |
747 | d->ZMM_L(0) = x86_float32_to_int32(s->ZMM_S(0), &env->sse_status); |
748 | d->ZMM_L(1) = x86_float32_to_int32(s->ZMM_S(1), &env->sse_status); | |
749 | d->ZMM_L(2) = x86_float32_to_int32(s->ZMM_S(2), &env->sse_status); | |
750 | d->ZMM_L(3) = x86_float32_to_int32(s->ZMM_S(3), &env->sse_status); | |
664e0f19 FB |
751 | } |
752 | ||
fa451874 | 753 | void helper_cvtpd2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 754 | { |
1e8a98b5 PM |
755 | d->ZMM_L(0) = x86_float64_to_int32(s->ZMM_D(0), &env->sse_status); |
756 | d->ZMM_L(1) = x86_float64_to_int32(s->ZMM_D(1), &env->sse_status); | |
19cbd87c | 757 | d->ZMM_Q(1) = 0; |
664e0f19 FB |
758 | } |
759 | ||
fa451874 | 760 | void helper_cvtps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) |
664e0f19 | 761 | { |
1e8a98b5 PM |
762 | d->MMX_L(0) = x86_float32_to_int32(s->ZMM_S(0), &env->sse_status); |
763 | d->MMX_L(1) = x86_float32_to_int32(s->ZMM_S(1), &env->sse_status); | |
664e0f19 FB |
764 | } |
765 | ||
fa451874 | 766 | void helper_cvtpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) |
664e0f19 | 767 | { |
1e8a98b5 PM |
768 | d->MMX_L(0) = x86_float64_to_int32(s->ZMM_D(0), &env->sse_status); |
769 | d->MMX_L(1) = x86_float64_to_int32(s->ZMM_D(1), &env->sse_status); | |
664e0f19 FB |
770 | } |
771 | ||
fa451874 | 772 | int32_t helper_cvtss2si(CPUX86State *env, ZMMReg *s) |
664e0f19 | 773 | { |
1e8a98b5 | 774 | return x86_float32_to_int32(s->ZMM_S(0), &env->sse_status); |
664e0f19 FB |
775 | } |
776 | ||
fa451874 | 777 | int32_t helper_cvtsd2si(CPUX86State *env, ZMMReg *s) |
664e0f19 | 778 | { |
1e8a98b5 | 779 | return x86_float64_to_int32(s->ZMM_D(0), &env->sse_status); |
664e0f19 FB |
780 | } |
781 | ||
782 | #ifdef TARGET_X86_64 | |
fa451874 | 783 | int64_t helper_cvtss2sq(CPUX86State *env, ZMMReg *s) |
664e0f19 | 784 | { |
1e8a98b5 | 785 | return x86_float32_to_int64(s->ZMM_S(0), &env->sse_status); |
664e0f19 FB |
786 | } |
787 | ||
fa451874 | 788 | int64_t helper_cvtsd2sq(CPUX86State *env, ZMMReg *s) |
664e0f19 | 789 | { |
1e8a98b5 | 790 | return x86_float64_to_int64(s->ZMM_D(0), &env->sse_status); |
664e0f19 FB |
791 | } |
792 | #endif | |
793 | ||
794 | /* float to integer truncated */ | |
fa451874 | 795 | void helper_cvttps2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 796 | { |
1e8a98b5 PM |
797 | d->ZMM_L(0) = x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status); |
798 | d->ZMM_L(1) = x86_float32_to_int32_round_to_zero(s->ZMM_S(1), &env->sse_status); | |
799 | d->ZMM_L(2) = x86_float32_to_int32_round_to_zero(s->ZMM_S(2), &env->sse_status); | |
800 | d->ZMM_L(3) = x86_float32_to_int32_round_to_zero(s->ZMM_S(3), &env->sse_status); | |
664e0f19 FB |
801 | } |
802 | ||
fa451874 | 803 | void helper_cvttpd2dq(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 804 | { |
1e8a98b5 PM |
805 | d->ZMM_L(0) = x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status); |
806 | d->ZMM_L(1) = x86_float64_to_int32_round_to_zero(s->ZMM_D(1), &env->sse_status); | |
19cbd87c | 807 | d->ZMM_Q(1) = 0; |
664e0f19 FB |
808 | } |
809 | ||
fa451874 | 810 | void helper_cvttps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) |
664e0f19 | 811 | { |
1e8a98b5 PM |
812 | d->MMX_L(0) = x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status); |
813 | d->MMX_L(1) = x86_float32_to_int32_round_to_zero(s->ZMM_S(1), &env->sse_status); | |
664e0f19 FB |
814 | } |
815 | ||
fa451874 | 816 | void helper_cvttpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s) |
664e0f19 | 817 | { |
1e8a98b5 PM |
818 | d->MMX_L(0) = x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status); |
819 | d->MMX_L(1) = x86_float64_to_int32_round_to_zero(s->ZMM_D(1), &env->sse_status); | |
664e0f19 FB |
820 | } |
821 | ||
fa451874 | 822 | int32_t helper_cvttss2si(CPUX86State *env, ZMMReg *s) |
664e0f19 | 823 | { |
1e8a98b5 | 824 | return x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status); |
664e0f19 FB |
825 | } |
826 | ||
fa451874 | 827 | int32_t helper_cvttsd2si(CPUX86State *env, ZMMReg *s) |
664e0f19 | 828 | { |
1e8a98b5 | 829 | return x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status); |
664e0f19 FB |
830 | } |
831 | ||
832 | #ifdef TARGET_X86_64 | |
fa451874 | 833 | int64_t helper_cvttss2sq(CPUX86State *env, ZMMReg *s) |
664e0f19 | 834 | { |
1e8a98b5 | 835 | return x86_float32_to_int64_round_to_zero(s->ZMM_S(0), &env->sse_status); |
664e0f19 FB |
836 | } |
837 | ||
fa451874 | 838 | int64_t helper_cvttsd2sq(CPUX86State *env, ZMMReg *s) |
664e0f19 | 839 | { |
1e8a98b5 | 840 | return x86_float64_to_int64_round_to_zero(s->ZMM_D(0), &env->sse_status); |
664e0f19 FB |
841 | } |
842 | #endif | |
843 | ||
fa451874 | 844 | void helper_rsqrtps(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 845 | { |
19cbd87c EH |
846 | d->ZMM_S(0) = float32_div(float32_one, |
847 | float32_sqrt(s->ZMM_S(0), &env->sse_status), | |
c2ef9a83 | 848 | &env->sse_status); |
19cbd87c EH |
849 | d->ZMM_S(1) = float32_div(float32_one, |
850 | float32_sqrt(s->ZMM_S(1), &env->sse_status), | |
c2ef9a83 | 851 | &env->sse_status); |
19cbd87c EH |
852 | d->ZMM_S(2) = float32_div(float32_one, |
853 | float32_sqrt(s->ZMM_S(2), &env->sse_status), | |
c2ef9a83 | 854 | &env->sse_status); |
19cbd87c EH |
855 | d->ZMM_S(3) = float32_div(float32_one, |
856 | float32_sqrt(s->ZMM_S(3), &env->sse_status), | |
c2ef9a83 | 857 | &env->sse_status); |
664e0f19 FB |
858 | } |
859 | ||
fa451874 | 860 | void helper_rsqrtss(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 861 | { |
19cbd87c EH |
862 | d->ZMM_S(0) = float32_div(float32_one, |
863 | float32_sqrt(s->ZMM_S(0), &env->sse_status), | |
c2ef9a83 | 864 | &env->sse_status); |
664e0f19 FB |
865 | } |
866 | ||
fa451874 | 867 | void helper_rcpps(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 868 | { |
19cbd87c EH |
869 | d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status); |
870 | d->ZMM_S(1) = float32_div(float32_one, s->ZMM_S(1), &env->sse_status); | |
871 | d->ZMM_S(2) = float32_div(float32_one, s->ZMM_S(2), &env->sse_status); | |
872 | d->ZMM_S(3) = float32_div(float32_one, s->ZMM_S(3), &env->sse_status); | |
664e0f19 FB |
873 | } |
874 | ||
fa451874 | 875 | void helper_rcpss(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 876 | { |
19cbd87c | 877 | d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status); |
664e0f19 FB |
878 | } |
879 | ||
d9f4bb27 AP |
880 | static inline uint64_t helper_extrq(uint64_t src, int shift, int len) |
881 | { | |
882 | uint64_t mask; | |
883 | ||
884 | if (len == 0) { | |
885 | mask = ~0LL; | |
886 | } else { | |
887 | mask = (1ULL << len) - 1; | |
888 | } | |
889 | return (src >> shift) & mask; | |
890 | } | |
891 | ||
fa451874 | 892 | void helper_extrq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
d9f4bb27 | 893 | { |
19cbd87c | 894 | d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), s->ZMM_B(1), s->ZMM_B(0)); |
d9f4bb27 AP |
895 | } |
896 | ||
fa451874 | 897 | void helper_extrq_i(CPUX86State *env, ZMMReg *d, int index, int length) |
d9f4bb27 | 898 | { |
19cbd87c | 899 | d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), index, length); |
d9f4bb27 AP |
900 | } |
901 | ||
902 | static inline uint64_t helper_insertq(uint64_t src, int shift, int len) | |
903 | { | |
904 | uint64_t mask; | |
905 | ||
906 | if (len == 0) { | |
907 | mask = ~0ULL; | |
908 | } else { | |
909 | mask = (1ULL << len) - 1; | |
910 | } | |
911 | return (src & ~(mask << shift)) | ((src & mask) << shift); | |
912 | } | |
913 | ||
fa451874 | 914 | void helper_insertq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
d9f4bb27 | 915 | { |
19cbd87c | 916 | d->ZMM_Q(0) = helper_insertq(s->ZMM_Q(0), s->ZMM_B(9), s->ZMM_B(8)); |
d9f4bb27 AP |
917 | } |
918 | ||
fa451874 | 919 | void helper_insertq_i(CPUX86State *env, ZMMReg *d, int index, int length) |
d9f4bb27 | 920 | { |
19cbd87c | 921 | d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), index, length); |
d9f4bb27 AP |
922 | } |
923 | ||
fa451874 | 924 | void helper_haddps(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 925 | { |
fa451874 | 926 | ZMMReg r; |
e01d9d31 | 927 | |
19cbd87c EH |
928 | r.ZMM_S(0) = float32_add(d->ZMM_S(0), d->ZMM_S(1), &env->sse_status); |
929 | r.ZMM_S(1) = float32_add(d->ZMM_S(2), d->ZMM_S(3), &env->sse_status); | |
930 | r.ZMM_S(2) = float32_add(s->ZMM_S(0), s->ZMM_S(1), &env->sse_status); | |
931 | r.ZMM_S(3) = float32_add(s->ZMM_S(2), s->ZMM_S(3), &env->sse_status); | |
664e0f19 FB |
932 | *d = r; |
933 | } | |
934 | ||
fa451874 | 935 | void helper_haddpd(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 936 | { |
fa451874 | 937 | ZMMReg r; |
e01d9d31 | 938 | |
19cbd87c EH |
939 | r.ZMM_D(0) = float64_add(d->ZMM_D(0), d->ZMM_D(1), &env->sse_status); |
940 | r.ZMM_D(1) = float64_add(s->ZMM_D(0), s->ZMM_D(1), &env->sse_status); | |
664e0f19 FB |
941 | *d = r; |
942 | } | |
943 | ||
fa451874 | 944 | void helper_hsubps(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 945 | { |
fa451874 | 946 | ZMMReg r; |
e01d9d31 | 947 | |
19cbd87c EH |
948 | r.ZMM_S(0) = float32_sub(d->ZMM_S(0), d->ZMM_S(1), &env->sse_status); |
949 | r.ZMM_S(1) = float32_sub(d->ZMM_S(2), d->ZMM_S(3), &env->sse_status); | |
950 | r.ZMM_S(2) = float32_sub(s->ZMM_S(0), s->ZMM_S(1), &env->sse_status); | |
951 | r.ZMM_S(3) = float32_sub(s->ZMM_S(2), s->ZMM_S(3), &env->sse_status); | |
664e0f19 FB |
952 | *d = r; |
953 | } | |
954 | ||
fa451874 | 955 | void helper_hsubpd(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 956 | { |
fa451874 | 957 | ZMMReg r; |
e01d9d31 | 958 | |
19cbd87c EH |
959 | r.ZMM_D(0) = float64_sub(d->ZMM_D(0), d->ZMM_D(1), &env->sse_status); |
960 | r.ZMM_D(1) = float64_sub(s->ZMM_D(0), s->ZMM_D(1), &env->sse_status); | |
664e0f19 FB |
961 | *d = r; |
962 | } | |
963 | ||
fa451874 | 964 | void helper_addsubps(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 965 | { |
19cbd87c EH |
966 | d->ZMM_S(0) = float32_sub(d->ZMM_S(0), s->ZMM_S(0), &env->sse_status); |
967 | d->ZMM_S(1) = float32_add(d->ZMM_S(1), s->ZMM_S(1), &env->sse_status); | |
968 | d->ZMM_S(2) = float32_sub(d->ZMM_S(2), s->ZMM_S(2), &env->sse_status); | |
969 | d->ZMM_S(3) = float32_add(d->ZMM_S(3), s->ZMM_S(3), &env->sse_status); | |
664e0f19 FB |
970 | } |
971 | ||
fa451874 | 972 | void helper_addsubpd(CPUX86State *env, ZMMReg *d, ZMMReg *s) |
664e0f19 | 973 | { |
19cbd87c EH |
974 | d->ZMM_D(0) = float64_sub(d->ZMM_D(0), s->ZMM_D(0), &env->sse_status); |
975 | d->ZMM_D(1) = float64_add(d->ZMM_D(1), s->ZMM_D(1), &env->sse_status); | |
664e0f19 FB |
976 | } |
977 | ||
978 | /* XXX: unordered */ | |
d3eb5eae BS |
979 | #define SSE_HELPER_CMP(name, F) \ |
980 | void helper_ ## name ## ps(CPUX86State *env, Reg *d, Reg *s) \ | |
981 | { \ | |
19cbd87c EH |
982 | d->ZMM_L(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \ |
983 | d->ZMM_L(1) = F(32, d->ZMM_S(1), s->ZMM_S(1)); \ | |
984 | d->ZMM_L(2) = F(32, d->ZMM_S(2), s->ZMM_S(2)); \ | |
985 | d->ZMM_L(3) = F(32, d->ZMM_S(3), s->ZMM_S(3)); \ | |
d3eb5eae BS |
986 | } \ |
987 | \ | |
988 | void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s) \ | |
989 | { \ | |
19cbd87c | 990 | d->ZMM_L(0) = F(32, d->ZMM_S(0), s->ZMM_S(0)); \ |
d3eb5eae BS |
991 | } \ |
992 | \ | |
993 | void helper_ ## name ## pd(CPUX86State *env, Reg *d, Reg *s) \ | |
994 | { \ | |
19cbd87c EH |
995 | d->ZMM_Q(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \ |
996 | d->ZMM_Q(1) = F(64, d->ZMM_D(1), s->ZMM_D(1)); \ | |
d3eb5eae BS |
997 | } \ |
998 | \ | |
999 | void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s) \ | |
1000 | { \ | |
19cbd87c | 1001 | d->ZMM_Q(0) = F(64, d->ZMM_D(0), s->ZMM_D(0)); \ |
e01d9d31 BS |
1002 | } |
1003 | ||
1004 | #define FPU_CMPEQ(size, a, b) \ | |
1005 | (float ## size ## _eq_quiet(a, b, &env->sse_status) ? -1 : 0) | |
1006 | #define FPU_CMPLT(size, a, b) \ | |
1007 | (float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0) | |
1008 | #define FPU_CMPLE(size, a, b) \ | |
1009 | (float ## size ## _le(a, b, &env->sse_status) ? -1 : 0) | |
1010 | #define FPU_CMPUNORD(size, a, b) \ | |
1011 | (float ## size ## _unordered_quiet(a, b, &env->sse_status) ? -1 : 0) | |
1012 | #define FPU_CMPNEQ(size, a, b) \ | |
1013 | (float ## size ## _eq_quiet(a, b, &env->sse_status) ? 0 : -1) | |
1014 | #define FPU_CMPNLT(size, a, b) \ | |
1015 | (float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1) | |
1016 | #define FPU_CMPNLE(size, a, b) \ | |
1017 | (float ## size ## _le(a, b, &env->sse_status) ? 0 : -1) | |
1018 | #define FPU_CMPORD(size, a, b) \ | |
1019 | (float ## size ## _unordered_quiet(a, b, &env->sse_status) ? 0 : -1) | |
664e0f19 | 1020 | |
5af45186 FB |
1021 | SSE_HELPER_CMP(cmpeq, FPU_CMPEQ) |
1022 | SSE_HELPER_CMP(cmplt, FPU_CMPLT) | |
1023 | SSE_HELPER_CMP(cmple, FPU_CMPLE) | |
1024 | SSE_HELPER_CMP(cmpunord, FPU_CMPUNORD) | |
1025 | SSE_HELPER_CMP(cmpneq, FPU_CMPNEQ) | |
1026 | SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT) | |
1027 | SSE_HELPER_CMP(cmpnle, FPU_CMPNLE) | |
1028 | SSE_HELPER_CMP(cmpord, FPU_CMPORD) | |
664e0f19 | 1029 | |
1e6eec8b | 1030 | static const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C}; |
43fb823b | 1031 | |
d3eb5eae | 1032 | void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 1033 | { |
71bfd65c | 1034 | FloatRelation ret; |
8422b113 | 1035 | float32 s0, s1; |
664e0f19 | 1036 | |
19cbd87c EH |
1037 | s0 = d->ZMM_S(0); |
1038 | s1 = s->ZMM_S(0); | |
43fb823b FB |
1039 | ret = float32_compare_quiet(s0, s1, &env->sse_status); |
1040 | CC_SRC = comis_eflags[ret + 1]; | |
664e0f19 FB |
1041 | } |
1042 | ||
d3eb5eae | 1043 | void helper_comiss(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 1044 | { |
71bfd65c | 1045 | FloatRelation ret; |
8422b113 | 1046 | float32 s0, s1; |
664e0f19 | 1047 | |
19cbd87c EH |
1048 | s0 = d->ZMM_S(0); |
1049 | s1 = s->ZMM_S(0); | |
43fb823b FB |
1050 | ret = float32_compare(s0, s1, &env->sse_status); |
1051 | CC_SRC = comis_eflags[ret + 1]; | |
664e0f19 FB |
1052 | } |
1053 | ||
d3eb5eae | 1054 | void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 1055 | { |
71bfd65c | 1056 | FloatRelation ret; |
8422b113 | 1057 | float64 d0, d1; |
664e0f19 | 1058 | |
19cbd87c EH |
1059 | d0 = d->ZMM_D(0); |
1060 | d1 = s->ZMM_D(0); | |
43fb823b FB |
1061 | ret = float64_compare_quiet(d0, d1, &env->sse_status); |
1062 | CC_SRC = comis_eflags[ret + 1]; | |
664e0f19 FB |
1063 | } |
1064 | ||
d3eb5eae | 1065 | void helper_comisd(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 1066 | { |
71bfd65c | 1067 | FloatRelation ret; |
8422b113 | 1068 | float64 d0, d1; |
664e0f19 | 1069 | |
19cbd87c EH |
1070 | d0 = d->ZMM_D(0); |
1071 | d1 = s->ZMM_D(0); | |
43fb823b FB |
1072 | ret = float64_compare(d0, d1, &env->sse_status); |
1073 | CC_SRC = comis_eflags[ret + 1]; | |
664e0f19 FB |
1074 | } |
1075 | ||
d3eb5eae | 1076 | uint32_t helper_movmskps(CPUX86State *env, Reg *s) |
664e0f19 FB |
1077 | { |
1078 | int b0, b1, b2, b3; | |
e01d9d31 | 1079 | |
19cbd87c EH |
1080 | b0 = s->ZMM_L(0) >> 31; |
1081 | b1 = s->ZMM_L(1) >> 31; | |
1082 | b2 = s->ZMM_L(2) >> 31; | |
1083 | b3 = s->ZMM_L(3) >> 31; | |
5af45186 | 1084 | return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3); |
664e0f19 FB |
1085 | } |
1086 | ||
d3eb5eae | 1087 | uint32_t helper_movmskpd(CPUX86State *env, Reg *s) |
664e0f19 FB |
1088 | { |
1089 | int b0, b1; | |
e01d9d31 | 1090 | |
19cbd87c EH |
1091 | b0 = s->ZMM_L(1) >> 31; |
1092 | b1 = s->ZMM_L(3) >> 31; | |
5af45186 | 1093 | return b0 | (b1 << 1); |
664e0f19 FB |
1094 | } |
1095 | ||
1096 | #endif | |
1097 | ||
d3eb5eae | 1098 | uint32_t glue(helper_pmovmskb, SUFFIX)(CPUX86State *env, Reg *s) |
5af45186 FB |
1099 | { |
1100 | uint32_t val; | |
e01d9d31 | 1101 | |
5af45186 | 1102 | val = 0; |
30913bae AJ |
1103 | val |= (s->B(0) >> 7); |
1104 | val |= (s->B(1) >> 6) & 0x02; | |
1105 | val |= (s->B(2) >> 5) & 0x04; | |
1106 | val |= (s->B(3) >> 4) & 0x08; | |
1107 | val |= (s->B(4) >> 3) & 0x10; | |
1108 | val |= (s->B(5) >> 2) & 0x20; | |
1109 | val |= (s->B(6) >> 1) & 0x40; | |
1110 | val |= (s->B(7)) & 0x80; | |
664e0f19 | 1111 | #if SHIFT == 1 |
30913bae AJ |
1112 | val |= (s->B(8) << 1) & 0x0100; |
1113 | val |= (s->B(9) << 2) & 0x0200; | |
1114 | val |= (s->B(10) << 3) & 0x0400; | |
1115 | val |= (s->B(11) << 4) & 0x0800; | |
1116 | val |= (s->B(12) << 5) & 0x1000; | |
1117 | val |= (s->B(13) << 6) & 0x2000; | |
1118 | val |= (s->B(14) << 7) & 0x4000; | |
1119 | val |= (s->B(15) << 8) & 0x8000; | |
664e0f19 | 1120 | #endif |
5af45186 | 1121 | return val; |
664e0f19 FB |
1122 | } |
1123 | ||
d3eb5eae | 1124 | void glue(helper_packsswb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 1125 | { |
5af45186 | 1126 | Reg r; |
664e0f19 FB |
1127 | |
1128 | r.B(0) = satsb((int16_t)d->W(0)); | |
1129 | r.B(1) = satsb((int16_t)d->W(1)); | |
1130 | r.B(2) = satsb((int16_t)d->W(2)); | |
1131 | r.B(3) = satsb((int16_t)d->W(3)); | |
1132 | #if SHIFT == 1 | |
1133 | r.B(4) = satsb((int16_t)d->W(4)); | |
1134 | r.B(5) = satsb((int16_t)d->W(5)); | |
1135 | r.B(6) = satsb((int16_t)d->W(6)); | |
1136 | r.B(7) = satsb((int16_t)d->W(7)); | |
1137 | #endif | |
1138 | r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0)); | |
1139 | r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1)); | |
1140 | r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2)); | |
1141 | r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3)); | |
1142 | #if SHIFT == 1 | |
1143 | r.B(12) = satsb((int16_t)s->W(4)); | |
1144 | r.B(13) = satsb((int16_t)s->W(5)); | |
1145 | r.B(14) = satsb((int16_t)s->W(6)); | |
1146 | r.B(15) = satsb((int16_t)s->W(7)); | |
1147 | #endif | |
1148 | *d = r; | |
1149 | } | |
1150 | ||
d3eb5eae | 1151 | void glue(helper_packuswb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 1152 | { |
5af45186 | 1153 | Reg r; |
664e0f19 FB |
1154 | |
1155 | r.B(0) = satub((int16_t)d->W(0)); | |
1156 | r.B(1) = satub((int16_t)d->W(1)); | |
1157 | r.B(2) = satub((int16_t)d->W(2)); | |
1158 | r.B(3) = satub((int16_t)d->W(3)); | |
1159 | #if SHIFT == 1 | |
1160 | r.B(4) = satub((int16_t)d->W(4)); | |
1161 | r.B(5) = satub((int16_t)d->W(5)); | |
1162 | r.B(6) = satub((int16_t)d->W(6)); | |
1163 | r.B(7) = satub((int16_t)d->W(7)); | |
1164 | #endif | |
1165 | r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0)); | |
1166 | r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1)); | |
1167 | r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2)); | |
1168 | r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3)); | |
1169 | #if SHIFT == 1 | |
1170 | r.B(12) = satub((int16_t)s->W(4)); | |
1171 | r.B(13) = satub((int16_t)s->W(5)); | |
1172 | r.B(14) = satub((int16_t)s->W(6)); | |
1173 | r.B(15) = satub((int16_t)s->W(7)); | |
1174 | #endif | |
1175 | *d = r; | |
1176 | } | |
1177 | ||
d3eb5eae | 1178 | void glue(helper_packssdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
664e0f19 | 1179 | { |
5af45186 | 1180 | Reg r; |
664e0f19 FB |
1181 | |
1182 | r.W(0) = satsw(d->L(0)); | |
1183 | r.W(1) = satsw(d->L(1)); | |
1184 | #if SHIFT == 1 | |
1185 | r.W(2) = satsw(d->L(2)); | |
1186 | r.W(3) = satsw(d->L(3)); | |
1187 | #endif | |
1188 | r.W((2 << SHIFT) + 0) = satsw(s->L(0)); | |
1189 | r.W((2 << SHIFT) + 1) = satsw(s->L(1)); | |
1190 | #if SHIFT == 1 | |
1191 | r.W(6) = satsw(s->L(2)); | |
1192 | r.W(7) = satsw(s->L(3)); | |
1193 | #endif | |
1194 | *d = r; | |
1195 | } | |
1196 | ||
e01d9d31 BS |
1197 | #define UNPCK_OP(base_name, base) \ |
1198 | \ | |
d3eb5eae BS |
1199 | void glue(helper_punpck ## base_name ## bw, SUFFIX)(CPUX86State *env,\ |
1200 | Reg *d, Reg *s) \ | |
e01d9d31 BS |
1201 | { \ |
1202 | Reg r; \ | |
1203 | \ | |
1204 | r.B(0) = d->B((base << (SHIFT + 2)) + 0); \ | |
1205 | r.B(1) = s->B((base << (SHIFT + 2)) + 0); \ | |
1206 | r.B(2) = d->B((base << (SHIFT + 2)) + 1); \ | |
1207 | r.B(3) = s->B((base << (SHIFT + 2)) + 1); \ | |
1208 | r.B(4) = d->B((base << (SHIFT + 2)) + 2); \ | |
1209 | r.B(5) = s->B((base << (SHIFT + 2)) + 2); \ | |
1210 | r.B(6) = d->B((base << (SHIFT + 2)) + 3); \ | |
1211 | r.B(7) = s->B((base << (SHIFT + 2)) + 3); \ | |
1212 | XMM_ONLY( \ | |
1213 | r.B(8) = d->B((base << (SHIFT + 2)) + 4); \ | |
1214 | r.B(9) = s->B((base << (SHIFT + 2)) + 4); \ | |
1215 | r.B(10) = d->B((base << (SHIFT + 2)) + 5); \ | |
1216 | r.B(11) = s->B((base << (SHIFT + 2)) + 5); \ | |
1217 | r.B(12) = d->B((base << (SHIFT + 2)) + 6); \ | |
1218 | r.B(13) = s->B((base << (SHIFT + 2)) + 6); \ | |
1219 | r.B(14) = d->B((base << (SHIFT + 2)) + 7); \ | |
1220 | r.B(15) = s->B((base << (SHIFT + 2)) + 7); \ | |
d3eb5eae | 1221 | ) \ |
e01d9d31 BS |
1222 | *d = r; \ |
1223 | } \ | |
1224 | \ | |
d3eb5eae BS |
1225 | void glue(helper_punpck ## base_name ## wd, SUFFIX)(CPUX86State *env,\ |
1226 | Reg *d, Reg *s) \ | |
e01d9d31 BS |
1227 | { \ |
1228 | Reg r; \ | |
1229 | \ | |
1230 | r.W(0) = d->W((base << (SHIFT + 1)) + 0); \ | |
1231 | r.W(1) = s->W((base << (SHIFT + 1)) + 0); \ | |
1232 | r.W(2) = d->W((base << (SHIFT + 1)) + 1); \ | |
1233 | r.W(3) = s->W((base << (SHIFT + 1)) + 1); \ | |
1234 | XMM_ONLY( \ | |
1235 | r.W(4) = d->W((base << (SHIFT + 1)) + 2); \ | |
1236 | r.W(5) = s->W((base << (SHIFT + 1)) + 2); \ | |
1237 | r.W(6) = d->W((base << (SHIFT + 1)) + 3); \ | |
1238 | r.W(7) = s->W((base << (SHIFT + 1)) + 3); \ | |
d3eb5eae | 1239 | ) \ |
e01d9d31 BS |
1240 | *d = r; \ |
1241 | } \ | |
1242 | \ | |
d3eb5eae BS |
1243 | void glue(helper_punpck ## base_name ## dq, SUFFIX)(CPUX86State *env,\ |
1244 | Reg *d, Reg *s) \ | |
e01d9d31 BS |
1245 | { \ |
1246 | Reg r; \ | |
1247 | \ | |
1248 | r.L(0) = d->L((base << SHIFT) + 0); \ | |
1249 | r.L(1) = s->L((base << SHIFT) + 0); \ | |
1250 | XMM_ONLY( \ | |
1251 | r.L(2) = d->L((base << SHIFT) + 1); \ | |
1252 | r.L(3) = s->L((base << SHIFT) + 1); \ | |
d3eb5eae | 1253 | ) \ |
e01d9d31 BS |
1254 | *d = r; \ |
1255 | } \ | |
1256 | \ | |
1257 | XMM_ONLY( \ | |
d3eb5eae BS |
1258 | void glue(helper_punpck ## base_name ## qdq, SUFFIX)(CPUX86State \ |
1259 | *env, \ | |
1260 | Reg *d, \ | |
e01d9d31 BS |
1261 | Reg *s) \ |
1262 | { \ | |
1263 | Reg r; \ | |
1264 | \ | |
1265 | r.Q(0) = d->Q(base); \ | |
1266 | r.Q(1) = s->Q(base); \ | |
1267 | *d = r; \ | |
1268 | } \ | |
1269 | ) | |
664e0f19 FB |
1270 | |
1271 | UNPCK_OP(l, 0) | |
1272 | UNPCK_OP(h, 1) | |
1273 | ||
a35f3ec7 AJ |
1274 | /* 3DNow! float ops */ |
1275 | #if SHIFT == 0 | |
d3eb5eae | 1276 | void helper_pi2fd(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1277 | { |
a35f3ec7 AJ |
1278 | d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status); |
1279 | d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status); | |
1280 | } | |
1281 | ||
d3eb5eae | 1282 | void helper_pi2fw(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1283 | { |
a35f3ec7 AJ |
1284 | d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status); |
1285 | d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status); | |
1286 | } | |
1287 | ||
d3eb5eae | 1288 | void helper_pf2id(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1289 | { |
a35f3ec7 AJ |
1290 | d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status); |
1291 | d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status); | |
1292 | } | |
1293 | ||
d3eb5eae | 1294 | void helper_pf2iw(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1295 | { |
e01d9d31 BS |
1296 | d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0), |
1297 | &env->mmx_status)); | |
1298 | d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1), | |
1299 | &env->mmx_status)); | |
a35f3ec7 AJ |
1300 | } |
1301 | ||
d3eb5eae | 1302 | void helper_pfacc(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1303 | { |
a35f3ec7 | 1304 | MMXReg r; |
e01d9d31 | 1305 | |
a35f3ec7 AJ |
1306 | r.MMX_S(0) = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); |
1307 | r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); | |
1308 | *d = r; | |
1309 | } | |
1310 | ||
d3eb5eae | 1311 | void helper_pfadd(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1312 | { |
a35f3ec7 AJ |
1313 | d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); |
1314 | d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); | |
1315 | } | |
1316 | ||
d3eb5eae | 1317 | void helper_pfcmpeq(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1318 | { |
e01d9d31 BS |
1319 | d->MMX_L(0) = float32_eq_quiet(d->MMX_S(0), s->MMX_S(0), |
1320 | &env->mmx_status) ? -1 : 0; | |
1321 | d->MMX_L(1) = float32_eq_quiet(d->MMX_S(1), s->MMX_S(1), | |
1322 | &env->mmx_status) ? -1 : 0; | |
a35f3ec7 AJ |
1323 | } |
1324 | ||
d3eb5eae | 1325 | void helper_pfcmpge(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1326 | { |
e01d9d31 BS |
1327 | d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0), |
1328 | &env->mmx_status) ? -1 : 0; | |
1329 | d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1), | |
1330 | &env->mmx_status) ? -1 : 0; | |
a35f3ec7 AJ |
1331 | } |
1332 | ||
d3eb5eae | 1333 | void helper_pfcmpgt(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1334 | { |
e01d9d31 BS |
1335 | d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0), |
1336 | &env->mmx_status) ? -1 : 0; | |
1337 | d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1), | |
1338 | &env->mmx_status) ? -1 : 0; | |
a35f3ec7 AJ |
1339 | } |
1340 | ||
d3eb5eae | 1341 | void helper_pfmax(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1342 | { |
e01d9d31 | 1343 | if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status)) { |
a35f3ec7 | 1344 | d->MMX_S(0) = s->MMX_S(0); |
e01d9d31 BS |
1345 | } |
1346 | if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status)) { | |
a35f3ec7 | 1347 | d->MMX_S(1) = s->MMX_S(1); |
e01d9d31 | 1348 | } |
a35f3ec7 AJ |
1349 | } |
1350 | ||
d3eb5eae | 1351 | void helper_pfmin(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1352 | { |
e01d9d31 | 1353 | if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status)) { |
a35f3ec7 | 1354 | d->MMX_S(0) = s->MMX_S(0); |
e01d9d31 BS |
1355 | } |
1356 | if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status)) { | |
a35f3ec7 | 1357 | d->MMX_S(1) = s->MMX_S(1); |
e01d9d31 | 1358 | } |
a35f3ec7 AJ |
1359 | } |
1360 | ||
d3eb5eae | 1361 | void helper_pfmul(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1362 | { |
a35f3ec7 AJ |
1363 | d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); |
1364 | d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); | |
1365 | } | |
1366 | ||
d3eb5eae | 1367 | void helper_pfnacc(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1368 | { |
a35f3ec7 | 1369 | MMXReg r; |
e01d9d31 | 1370 | |
a35f3ec7 AJ |
1371 | r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); |
1372 | r.MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); | |
1373 | *d = r; | |
1374 | } | |
1375 | ||
d3eb5eae | 1376 | void helper_pfpnacc(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1377 | { |
a35f3ec7 | 1378 | MMXReg r; |
e01d9d31 | 1379 | |
a35f3ec7 AJ |
1380 | r.MMX_S(0) = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status); |
1381 | r.MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status); | |
1382 | *d = r; | |
1383 | } | |
1384 | ||
d3eb5eae | 1385 | void helper_pfrcp(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1386 | { |
c2ef9a83 | 1387 | d->MMX_S(0) = float32_div(float32_one, s->MMX_S(0), &env->mmx_status); |
a35f3ec7 AJ |
1388 | d->MMX_S(1) = d->MMX_S(0); |
1389 | } | |
1390 | ||
d3eb5eae | 1391 | void helper_pfrsqrt(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1392 | { |
a35f3ec7 | 1393 | d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff; |
c2ef9a83 AJ |
1394 | d->MMX_S(1) = float32_div(float32_one, |
1395 | float32_sqrt(d->MMX_S(1), &env->mmx_status), | |
1396 | &env->mmx_status); | |
a35f3ec7 AJ |
1397 | d->MMX_L(1) |= s->MMX_L(0) & 0x80000000; |
1398 | d->MMX_L(0) = d->MMX_L(1); | |
1399 | } | |
1400 | ||
d3eb5eae | 1401 | void helper_pfsub(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1402 | { |
a35f3ec7 AJ |
1403 | d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status); |
1404 | d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status); | |
1405 | } | |
1406 | ||
d3eb5eae | 1407 | void helper_pfsubr(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1408 | { |
a35f3ec7 AJ |
1409 | d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status); |
1410 | d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status); | |
1411 | } | |
1412 | ||
d3eb5eae | 1413 | void helper_pswapd(CPUX86State *env, MMXReg *d, MMXReg *s) |
a35f3ec7 | 1414 | { |
a35f3ec7 | 1415 | MMXReg r; |
e01d9d31 | 1416 | |
a35f3ec7 AJ |
1417 | r.MMX_L(0) = s->MMX_L(1); |
1418 | r.MMX_L(1) = s->MMX_L(0); | |
1419 | *d = r; | |
1420 | } | |
1421 | #endif | |
1422 | ||
4242b1bd | 1423 | /* SSSE3 op helpers */ |
d3eb5eae | 1424 | void glue(helper_pshufb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd AZ |
1425 | { |
1426 | int i; | |
1427 | Reg r; | |
1428 | ||
e01d9d31 | 1429 | for (i = 0; i < (8 << SHIFT); i++) { |
4242b1bd | 1430 | r.B(i) = (s->B(i) & 0x80) ? 0 : (d->B(s->B(i) & ((8 << SHIFT) - 1))); |
e01d9d31 | 1431 | } |
4242b1bd AZ |
1432 | |
1433 | *d = r; | |
1434 | } | |
1435 | ||
d3eb5eae | 1436 | void glue(helper_phaddw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd | 1437 | { |
2dfbea1a JG |
1438 | |
1439 | Reg r; | |
1440 | ||
1441 | r.W(0) = (int16_t)d->W(0) + (int16_t)d->W(1); | |
1442 | r.W(1) = (int16_t)d->W(2) + (int16_t)d->W(3); | |
1443 | XMM_ONLY(r.W(2) = (int16_t)d->W(4) + (int16_t)d->W(5)); | |
1444 | XMM_ONLY(r.W(3) = (int16_t)d->W(6) + (int16_t)d->W(7)); | |
1445 | r.W((2 << SHIFT) + 0) = (int16_t)s->W(0) + (int16_t)s->W(1); | |
1446 | r.W((2 << SHIFT) + 1) = (int16_t)s->W(2) + (int16_t)s->W(3); | |
1447 | XMM_ONLY(r.W(6) = (int16_t)s->W(4) + (int16_t)s->W(5)); | |
1448 | XMM_ONLY(r.W(7) = (int16_t)s->W(6) + (int16_t)s->W(7)); | |
1449 | ||
1450 | *d = r; | |
4242b1bd AZ |
1451 | } |
1452 | ||
d3eb5eae | 1453 | void glue(helper_phaddd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd | 1454 | { |
2dfbea1a JG |
1455 | Reg r; |
1456 | ||
1457 | r.L(0) = (int32_t)d->L(0) + (int32_t)d->L(1); | |
1458 | XMM_ONLY(r.L(1) = (int32_t)d->L(2) + (int32_t)d->L(3)); | |
1459 | r.L((1 << SHIFT) + 0) = (int32_t)s->L(0) + (int32_t)s->L(1); | |
1460 | XMM_ONLY(r.L(3) = (int32_t)s->L(2) + (int32_t)s->L(3)); | |
1461 | ||
1462 | *d = r; | |
4242b1bd AZ |
1463 | } |
1464 | ||
d3eb5eae | 1465 | void glue(helper_phaddsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd | 1466 | { |
2dfbea1a JG |
1467 | Reg r; |
1468 | ||
1469 | r.W(0) = satsw((int16_t)d->W(0) + (int16_t)d->W(1)); | |
1470 | r.W(1) = satsw((int16_t)d->W(2) + (int16_t)d->W(3)); | |
1471 | XMM_ONLY(r.W(2) = satsw((int16_t)d->W(4) + (int16_t)d->W(5))); | |
1472 | XMM_ONLY(r.W(3) = satsw((int16_t)d->W(6) + (int16_t)d->W(7))); | |
1473 | r.W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) + (int16_t)s->W(1)); | |
1474 | r.W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) + (int16_t)s->W(3)); | |
1475 | XMM_ONLY(r.W(6) = satsw((int16_t)s->W(4) + (int16_t)s->W(5))); | |
1476 | XMM_ONLY(r.W(7) = satsw((int16_t)s->W(6) + (int16_t)s->W(7))); | |
1477 | ||
1478 | *d = r; | |
4242b1bd AZ |
1479 | } |
1480 | ||
d3eb5eae | 1481 | void glue(helper_pmaddubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd | 1482 | { |
e01d9d31 BS |
1483 | d->W(0) = satsw((int8_t)s->B(0) * (uint8_t)d->B(0) + |
1484 | (int8_t)s->B(1) * (uint8_t)d->B(1)); | |
1485 | d->W(1) = satsw((int8_t)s->B(2) * (uint8_t)d->B(2) + | |
1486 | (int8_t)s->B(3) * (uint8_t)d->B(3)); | |
1487 | d->W(2) = satsw((int8_t)s->B(4) * (uint8_t)d->B(4) + | |
1488 | (int8_t)s->B(5) * (uint8_t)d->B(5)); | |
1489 | d->W(3) = satsw((int8_t)s->B(6) * (uint8_t)d->B(6) + | |
1490 | (int8_t)s->B(7) * (uint8_t)d->B(7)); | |
4242b1bd | 1491 | #if SHIFT == 1 |
e01d9d31 BS |
1492 | d->W(4) = satsw((int8_t)s->B(8) * (uint8_t)d->B(8) + |
1493 | (int8_t)s->B(9) * (uint8_t)d->B(9)); | |
4242b1bd AZ |
1494 | d->W(5) = satsw((int8_t)s->B(10) * (uint8_t)d->B(10) + |
1495 | (int8_t)s->B(11) * (uint8_t)d->B(11)); | |
1496 | d->W(6) = satsw((int8_t)s->B(12) * (uint8_t)d->B(12) + | |
1497 | (int8_t)s->B(13) * (uint8_t)d->B(13)); | |
1498 | d->W(7) = satsw((int8_t)s->B(14) * (uint8_t)d->B(14) + | |
1499 | (int8_t)s->B(15) * (uint8_t)d->B(15)); | |
1500 | #endif | |
1501 | } | |
1502 | ||
d3eb5eae | 1503 | void glue(helper_phsubw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd AZ |
1504 | { |
1505 | d->W(0) = (int16_t)d->W(0) - (int16_t)d->W(1); | |
1506 | d->W(1) = (int16_t)d->W(2) - (int16_t)d->W(3); | |
1507 | XMM_ONLY(d->W(2) = (int16_t)d->W(4) - (int16_t)d->W(5)); | |
1508 | XMM_ONLY(d->W(3) = (int16_t)d->W(6) - (int16_t)d->W(7)); | |
1509 | d->W((2 << SHIFT) + 0) = (int16_t)s->W(0) - (int16_t)s->W(1); | |
1510 | d->W((2 << SHIFT) + 1) = (int16_t)s->W(2) - (int16_t)s->W(3); | |
1511 | XMM_ONLY(d->W(6) = (int16_t)s->W(4) - (int16_t)s->W(5)); | |
1512 | XMM_ONLY(d->W(7) = (int16_t)s->W(6) - (int16_t)s->W(7)); | |
1513 | } | |
1514 | ||
d3eb5eae | 1515 | void glue(helper_phsubd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd AZ |
1516 | { |
1517 | d->L(0) = (int32_t)d->L(0) - (int32_t)d->L(1); | |
1518 | XMM_ONLY(d->L(1) = (int32_t)d->L(2) - (int32_t)d->L(3)); | |
1519 | d->L((1 << SHIFT) + 0) = (int32_t)s->L(0) - (int32_t)s->L(1); | |
1520 | XMM_ONLY(d->L(3) = (int32_t)s->L(2) - (int32_t)s->L(3)); | |
1521 | } | |
1522 | ||
d3eb5eae | 1523 | void glue(helper_phsubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
4242b1bd AZ |
1524 | { |
1525 | d->W(0) = satsw((int16_t)d->W(0) - (int16_t)d->W(1)); | |
1526 | d->W(1) = satsw((int16_t)d->W(2) - (int16_t)d->W(3)); | |
1527 | XMM_ONLY(d->W(2) = satsw((int16_t)d->W(4) - (int16_t)d->W(5))); | |
1528 | XMM_ONLY(d->W(3) = satsw((int16_t)d->W(6) - (int16_t)d->W(7))); | |
1529 | d->W((2 << SHIFT) + 0) = satsw((int16_t)s->W(0) - (int16_t)s->W(1)); | |
1530 | d->W((2 << SHIFT) + 1) = satsw((int16_t)s->W(2) - (int16_t)s->W(3)); | |
1531 | XMM_ONLY(d->W(6) = satsw((int16_t)s->W(4) - (int16_t)s->W(5))); | |
1532 | XMM_ONLY(d->W(7) = satsw((int16_t)s->W(6) - (int16_t)s->W(7))); | |
1533 | } | |
1534 | ||
e01d9d31 BS |
1535 | #define FABSB(_, x) (x > INT8_MAX ? -(int8_t)x : x) |
1536 | #define FABSW(_, x) (x > INT16_MAX ? -(int16_t)x : x) | |
1537 | #define FABSL(_, x) (x > INT32_MAX ? -(int32_t)x : x) | |
4242b1bd AZ |
1538 | SSE_HELPER_B(helper_pabsb, FABSB) |
1539 | SSE_HELPER_W(helper_pabsw, FABSW) | |
1540 | SSE_HELPER_L(helper_pabsd, FABSL) | |
1541 | ||
e01d9d31 | 1542 | #define FMULHRSW(d, s) (((int16_t) d * (int16_t)s + 0x4000) >> 15) |
4242b1bd AZ |
1543 | SSE_HELPER_W(helper_pmulhrsw, FMULHRSW) |
1544 | ||
e01d9d31 BS |
1545 | #define FSIGNB(d, s) (s <= INT8_MAX ? s ? d : 0 : -(int8_t)d) |
1546 | #define FSIGNW(d, s) (s <= INT16_MAX ? s ? d : 0 : -(int16_t)d) | |
1547 | #define FSIGNL(d, s) (s <= INT32_MAX ? s ? d : 0 : -(int32_t)d) | |
4242b1bd AZ |
1548 | SSE_HELPER_B(helper_psignb, FSIGNB) |
1549 | SSE_HELPER_W(helper_psignw, FSIGNW) | |
1550 | SSE_HELPER_L(helper_psignd, FSIGNL) | |
1551 | ||
d3eb5eae BS |
1552 | void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
1553 | int32_t shift) | |
4242b1bd AZ |
1554 | { |
1555 | Reg r; | |
1556 | ||
1557 | /* XXX could be checked during translation */ | |
1558 | if (shift >= (16 << SHIFT)) { | |
1559 | r.Q(0) = 0; | |
1560 | XMM_ONLY(r.Q(1) = 0); | |
1561 | } else { | |
1562 | shift <<= 3; | |
1563 | #define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0) | |
1564 | #if SHIFT == 0 | |
e01d9d31 BS |
1565 | r.Q(0) = SHR(s->Q(0), shift - 0) | |
1566 | SHR(d->Q(0), shift - 64); | |
4242b1bd | 1567 | #else |
e01d9d31 BS |
1568 | r.Q(0) = SHR(s->Q(0), shift - 0) | |
1569 | SHR(s->Q(1), shift - 64) | | |
1570 | SHR(d->Q(0), shift - 128) | | |
1571 | SHR(d->Q(1), shift - 192); | |
1572 | r.Q(1) = SHR(s->Q(0), shift + 64) | | |
1573 | SHR(s->Q(1), shift - 0) | | |
1574 | SHR(d->Q(0), shift - 64) | | |
1575 | SHR(d->Q(1), shift - 128); | |
4242b1bd AZ |
1576 | #endif |
1577 | #undef SHR | |
1578 | } | |
1579 | ||
1580 | *d = r; | |
1581 | } | |
1582 | ||
e01d9d31 | 1583 | #define XMM0 (env->xmm_regs[0]) |
222a3336 AZ |
1584 | |
1585 | #if SHIFT == 1 | |
e01d9d31 | 1586 | #define SSE_HELPER_V(name, elem, num, F) \ |
d3eb5eae | 1587 | void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ |
e01d9d31 BS |
1588 | { \ |
1589 | d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0)); \ | |
1590 | d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1)); \ | |
1591 | if (num > 2) { \ | |
1592 | d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2)); \ | |
1593 | d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3)); \ | |
1594 | if (num > 4) { \ | |
1595 | d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4)); \ | |
1596 | d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5)); \ | |
1597 | d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6)); \ | |
1598 | d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7)); \ | |
1599 | if (num > 8) { \ | |
1600 | d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8)); \ | |
1601 | d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9)); \ | |
1602 | d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10)); \ | |
1603 | d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11)); \ | |
1604 | d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12)); \ | |
1605 | d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13)); \ | |
1606 | d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14)); \ | |
1607 | d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15)); \ | |
1608 | } \ | |
1609 | } \ | |
1610 | } \ | |
1611 | } | |
1612 | ||
1613 | #define SSE_HELPER_I(name, elem, num, F) \ | |
d3eb5eae | 1614 | void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t imm) \ |
e01d9d31 BS |
1615 | { \ |
1616 | d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1)); \ | |
1617 | d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1)); \ | |
1618 | if (num > 2) { \ | |
1619 | d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1)); \ | |
1620 | d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1)); \ | |
1621 | if (num > 4) { \ | |
1622 | d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1)); \ | |
1623 | d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1)); \ | |
1624 | d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1)); \ | |
1625 | d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1)); \ | |
1626 | if (num > 8) { \ | |
1627 | d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1)); \ | |
1628 | d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1)); \ | |
1629 | d->elem(10) = F(d->elem(10), s->elem(10), \ | |
1630 | ((imm >> 10) & 1)); \ | |
1631 | d->elem(11) = F(d->elem(11), s->elem(11), \ | |
1632 | ((imm >> 11) & 1)); \ | |
1633 | d->elem(12) = F(d->elem(12), s->elem(12), \ | |
1634 | ((imm >> 12) & 1)); \ | |
1635 | d->elem(13) = F(d->elem(13), s->elem(13), \ | |
1636 | ((imm >> 13) & 1)); \ | |
1637 | d->elem(14) = F(d->elem(14), s->elem(14), \ | |
1638 | ((imm >> 14) & 1)); \ | |
1639 | d->elem(15) = F(d->elem(15), s->elem(15), \ | |
1640 | ((imm >> 15) & 1)); \ | |
1641 | } \ | |
1642 | } \ | |
1643 | } \ | |
1644 | } | |
222a3336 AZ |
1645 | |
1646 | /* SSE4.1 op helpers */ | |
e01d9d31 BS |
1647 | #define FBLENDVB(d, s, m) ((m & 0x80) ? s : d) |
1648 | #define FBLENDVPS(d, s, m) ((m & 0x80000000) ? s : d) | |
1649 | #define FBLENDVPD(d, s, m) ((m & 0x8000000000000000LL) ? s : d) | |
222a3336 AZ |
1650 | SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB) |
1651 | SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS) | |
1652 | SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD) | |
1653 | ||
d3eb5eae | 1654 | void glue(helper_ptest, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
222a3336 AZ |
1655 | { |
1656 | uint64_t zf = (s->Q(0) & d->Q(0)) | (s->Q(1) & d->Q(1)); | |
1657 | uint64_t cf = (s->Q(0) & ~d->Q(0)) | (s->Q(1) & ~d->Q(1)); | |
1658 | ||
1659 | CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C); | |
1660 | } | |
1661 | ||
e01d9d31 | 1662 | #define SSE_HELPER_F(name, elem, num, F) \ |
d3eb5eae | 1663 | void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \ |
e01d9d31 | 1664 | { \ |
e01d9d31 | 1665 | if (num > 2) { \ |
e01d9d31 | 1666 | if (num > 4) { \ |
e01d9d31 | 1667 | d->elem(7) = F(7); \ |
c6a56c8e JM |
1668 | d->elem(6) = F(6); \ |
1669 | d->elem(5) = F(5); \ | |
1670 | d->elem(4) = F(4); \ | |
e01d9d31 | 1671 | } \ |
c6a56c8e JM |
1672 | d->elem(3) = F(3); \ |
1673 | d->elem(2) = F(2); \ | |
e01d9d31 | 1674 | } \ |
c6a56c8e JM |
1675 | d->elem(1) = F(1); \ |
1676 | d->elem(0) = F(0); \ | |
e01d9d31 | 1677 | } |
222a3336 AZ |
1678 | |
1679 | SSE_HELPER_F(helper_pmovsxbw, W, 8, (int8_t) s->B) | |
1680 | SSE_HELPER_F(helper_pmovsxbd, L, 4, (int8_t) s->B) | |
1681 | SSE_HELPER_F(helper_pmovsxbq, Q, 2, (int8_t) s->B) | |
1682 | SSE_HELPER_F(helper_pmovsxwd, L, 4, (int16_t) s->W) | |
1683 | SSE_HELPER_F(helper_pmovsxwq, Q, 2, (int16_t) s->W) | |
1684 | SSE_HELPER_F(helper_pmovsxdq, Q, 2, (int32_t) s->L) | |
1685 | SSE_HELPER_F(helper_pmovzxbw, W, 8, s->B) | |
1686 | SSE_HELPER_F(helper_pmovzxbd, L, 4, s->B) | |
1687 | SSE_HELPER_F(helper_pmovzxbq, Q, 2, s->B) | |
1688 | SSE_HELPER_F(helper_pmovzxwd, L, 4, s->W) | |
1689 | SSE_HELPER_F(helper_pmovzxwq, Q, 2, s->W) | |
1690 | SSE_HELPER_F(helper_pmovzxdq, Q, 2, s->L) | |
1691 | ||
d3eb5eae | 1692 | void glue(helper_pmuldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
222a3336 | 1693 | { |
e01d9d31 BS |
1694 | d->Q(0) = (int64_t)(int32_t) d->L(0) * (int32_t) s->L(0); |
1695 | d->Q(1) = (int64_t)(int32_t) d->L(2) * (int32_t) s->L(2); | |
222a3336 AZ |
1696 | } |
1697 | ||
e01d9d31 | 1698 | #define FCMPEQQ(d, s) (d == s ? -1 : 0) |
222a3336 AZ |
1699 | SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ) |
1700 | ||
d3eb5eae | 1701 | void glue(helper_packusdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
222a3336 | 1702 | { |
80e19606 JM |
1703 | Reg r; |
1704 | ||
1705 | r.W(0) = satuw((int32_t) d->L(0)); | |
1706 | r.W(1) = satuw((int32_t) d->L(1)); | |
1707 | r.W(2) = satuw((int32_t) d->L(2)); | |
1708 | r.W(3) = satuw((int32_t) d->L(3)); | |
1709 | r.W(4) = satuw((int32_t) s->L(0)); | |
1710 | r.W(5) = satuw((int32_t) s->L(1)); | |
1711 | r.W(6) = satuw((int32_t) s->L(2)); | |
1712 | r.W(7) = satuw((int32_t) s->L(3)); | |
1713 | *d = r; | |
222a3336 AZ |
1714 | } |
1715 | ||
e01d9d31 BS |
1716 | #define FMINSB(d, s) MIN((int8_t)d, (int8_t)s) |
1717 | #define FMINSD(d, s) MIN((int32_t)d, (int32_t)s) | |
1718 | #define FMAXSB(d, s) MAX((int8_t)d, (int8_t)s) | |
1719 | #define FMAXSD(d, s) MAX((int32_t)d, (int32_t)s) | |
222a3336 AZ |
1720 | SSE_HELPER_B(helper_pminsb, FMINSB) |
1721 | SSE_HELPER_L(helper_pminsd, FMINSD) | |
1722 | SSE_HELPER_W(helper_pminuw, MIN) | |
1723 | SSE_HELPER_L(helper_pminud, MIN) | |
1724 | SSE_HELPER_B(helper_pmaxsb, FMAXSB) | |
1725 | SSE_HELPER_L(helper_pmaxsd, FMAXSD) | |
1726 | SSE_HELPER_W(helper_pmaxuw, MAX) | |
1727 | SSE_HELPER_L(helper_pmaxud, MAX) | |
1728 | ||
e01d9d31 | 1729 | #define FMULLD(d, s) ((int32_t)d * (int32_t)s) |
222a3336 AZ |
1730 | SSE_HELPER_L(helper_pmulld, FMULLD) |
1731 | ||
d3eb5eae | 1732 | void glue(helper_phminposuw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
222a3336 AZ |
1733 | { |
1734 | int idx = 0; | |
1735 | ||
e01d9d31 | 1736 | if (s->W(1) < s->W(idx)) { |
222a3336 | 1737 | idx = 1; |
e01d9d31 BS |
1738 | } |
1739 | if (s->W(2) < s->W(idx)) { | |
222a3336 | 1740 | idx = 2; |
e01d9d31 BS |
1741 | } |
1742 | if (s->W(3) < s->W(idx)) { | |
222a3336 | 1743 | idx = 3; |
e01d9d31 BS |
1744 | } |
1745 | if (s->W(4) < s->W(idx)) { | |
222a3336 | 1746 | idx = 4; |
e01d9d31 BS |
1747 | } |
1748 | if (s->W(5) < s->W(idx)) { | |
222a3336 | 1749 | idx = 5; |
e01d9d31 BS |
1750 | } |
1751 | if (s->W(6) < s->W(idx)) { | |
222a3336 | 1752 | idx = 6; |
e01d9d31 BS |
1753 | } |
1754 | if (s->W(7) < s->W(idx)) { | |
222a3336 | 1755 | idx = 7; |
e01d9d31 | 1756 | } |
222a3336 | 1757 | |
222a3336 | 1758 | d->W(0) = s->W(idx); |
aa406fea JM |
1759 | d->W(1) = idx; |
1760 | d->L(1) = 0; | |
1761 | d->Q(1) = 0; | |
222a3336 AZ |
1762 | } |
1763 | ||
d3eb5eae BS |
1764 | void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
1765 | uint32_t mode) | |
222a3336 AZ |
1766 | { |
1767 | signed char prev_rounding_mode; | |
1768 | ||
1769 | prev_rounding_mode = env->sse_status.float_rounding_mode; | |
e01d9d31 | 1770 | if (!(mode & (1 << 2))) { |
222a3336 AZ |
1771 | switch (mode & 3) { |
1772 | case 0: | |
1773 | set_float_rounding_mode(float_round_nearest_even, &env->sse_status); | |
1774 | break; | |
1775 | case 1: | |
1776 | set_float_rounding_mode(float_round_down, &env->sse_status); | |
1777 | break; | |
1778 | case 2: | |
1779 | set_float_rounding_mode(float_round_up, &env->sse_status); | |
1780 | break; | |
1781 | case 3: | |
1782 | set_float_rounding_mode(float_round_to_zero, &env->sse_status); | |
1783 | break; | |
1784 | } | |
e01d9d31 | 1785 | } |
222a3336 | 1786 | |
19cbd87c EH |
1787 | d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status); |
1788 | d->ZMM_S(1) = float32_round_to_int(s->ZMM_S(1), &env->sse_status); | |
1789 | d->ZMM_S(2) = float32_round_to_int(s->ZMM_S(2), &env->sse_status); | |
1790 | d->ZMM_S(3) = float32_round_to_int(s->ZMM_S(3), &env->sse_status); | |
222a3336 AZ |
1791 | |
1792 | #if 0 /* TODO */ | |
e01d9d31 BS |
1793 | if (mode & (1 << 3)) { |
1794 | set_float_exception_flags(get_float_exception_flags(&env->sse_status) & | |
1795 | ~float_flag_inexact, | |
1796 | &env->sse_status); | |
1797 | } | |
222a3336 AZ |
1798 | #endif |
1799 | env->sse_status.float_rounding_mode = prev_rounding_mode; | |
1800 | } | |
1801 | ||
d3eb5eae BS |
1802 | void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
1803 | uint32_t mode) | |
222a3336 AZ |
1804 | { |
1805 | signed char prev_rounding_mode; | |
1806 | ||
1807 | prev_rounding_mode = env->sse_status.float_rounding_mode; | |
e01d9d31 | 1808 | if (!(mode & (1 << 2))) { |
222a3336 AZ |
1809 | switch (mode & 3) { |
1810 | case 0: | |
1811 | set_float_rounding_mode(float_round_nearest_even, &env->sse_status); | |
1812 | break; | |
1813 | case 1: | |
1814 | set_float_rounding_mode(float_round_down, &env->sse_status); | |
1815 | break; | |
1816 | case 2: | |
1817 | set_float_rounding_mode(float_round_up, &env->sse_status); | |
1818 | break; | |
1819 | case 3: | |
1820 | set_float_rounding_mode(float_round_to_zero, &env->sse_status); | |
1821 | break; | |
1822 | } | |
e01d9d31 | 1823 | } |
222a3336 | 1824 | |
19cbd87c EH |
1825 | d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status); |
1826 | d->ZMM_D(1) = float64_round_to_int(s->ZMM_D(1), &env->sse_status); | |
222a3336 AZ |
1827 | |
1828 | #if 0 /* TODO */ | |
e01d9d31 BS |
1829 | if (mode & (1 << 3)) { |
1830 | set_float_exception_flags(get_float_exception_flags(&env->sse_status) & | |
1831 | ~float_flag_inexact, | |
1832 | &env->sse_status); | |
1833 | } | |
222a3336 AZ |
1834 | #endif |
1835 | env->sse_status.float_rounding_mode = prev_rounding_mode; | |
1836 | } | |
1837 | ||
d3eb5eae BS |
1838 | void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
1839 | uint32_t mode) | |
222a3336 AZ |
1840 | { |
1841 | signed char prev_rounding_mode; | |
1842 | ||
1843 | prev_rounding_mode = env->sse_status.float_rounding_mode; | |
e01d9d31 | 1844 | if (!(mode & (1 << 2))) { |
222a3336 AZ |
1845 | switch (mode & 3) { |
1846 | case 0: | |
1847 | set_float_rounding_mode(float_round_nearest_even, &env->sse_status); | |
1848 | break; | |
1849 | case 1: | |
1850 | set_float_rounding_mode(float_round_down, &env->sse_status); | |
1851 | break; | |
1852 | case 2: | |
1853 | set_float_rounding_mode(float_round_up, &env->sse_status); | |
1854 | break; | |
1855 | case 3: | |
1856 | set_float_rounding_mode(float_round_to_zero, &env->sse_status); | |
1857 | break; | |
1858 | } | |
e01d9d31 | 1859 | } |
222a3336 | 1860 | |
19cbd87c | 1861 | d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status); |
222a3336 AZ |
1862 | |
1863 | #if 0 /* TODO */ | |
e01d9d31 BS |
1864 | if (mode & (1 << 3)) { |
1865 | set_float_exception_flags(get_float_exception_flags(&env->sse_status) & | |
1866 | ~float_flag_inexact, | |
1867 | &env->sse_status); | |
1868 | } | |
222a3336 AZ |
1869 | #endif |
1870 | env->sse_status.float_rounding_mode = prev_rounding_mode; | |
1871 | } | |
1872 | ||
d3eb5eae BS |
1873 | void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
1874 | uint32_t mode) | |
222a3336 AZ |
1875 | { |
1876 | signed char prev_rounding_mode; | |
1877 | ||
1878 | prev_rounding_mode = env->sse_status.float_rounding_mode; | |
e01d9d31 | 1879 | if (!(mode & (1 << 2))) { |
222a3336 AZ |
1880 | switch (mode & 3) { |
1881 | case 0: | |
1882 | set_float_rounding_mode(float_round_nearest_even, &env->sse_status); | |
1883 | break; | |
1884 | case 1: | |
1885 | set_float_rounding_mode(float_round_down, &env->sse_status); | |
1886 | break; | |
1887 | case 2: | |
1888 | set_float_rounding_mode(float_round_up, &env->sse_status); | |
1889 | break; | |
1890 | case 3: | |
1891 | set_float_rounding_mode(float_round_to_zero, &env->sse_status); | |
1892 | break; | |
1893 | } | |
e01d9d31 | 1894 | } |
222a3336 | 1895 | |
19cbd87c | 1896 | d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status); |
222a3336 AZ |
1897 | |
1898 | #if 0 /* TODO */ | |
e01d9d31 BS |
1899 | if (mode & (1 << 3)) { |
1900 | set_float_exception_flags(get_float_exception_flags(&env->sse_status) & | |
1901 | ~float_flag_inexact, | |
1902 | &env->sse_status); | |
1903 | } | |
222a3336 AZ |
1904 | #endif |
1905 | env->sse_status.float_rounding_mode = prev_rounding_mode; | |
1906 | } | |
1907 | ||
e01d9d31 | 1908 | #define FBLENDP(d, s, m) (m ? s : d) |
222a3336 AZ |
1909 | SSE_HELPER_I(helper_blendps, L, 4, FBLENDP) |
1910 | SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP) | |
1911 | SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP) | |
1912 | ||
d3eb5eae | 1913 | void glue(helper_dpps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask) |
222a3336 | 1914 | { |
170d5b4b | 1915 | float32 iresult = float32_zero; |
222a3336 | 1916 | |
e01d9d31 | 1917 | if (mask & (1 << 4)) { |
222a3336 | 1918 | iresult = float32_add(iresult, |
19cbd87c | 1919 | float32_mul(d->ZMM_S(0), s->ZMM_S(0), |
e01d9d31 BS |
1920 | &env->sse_status), |
1921 | &env->sse_status); | |
1922 | } | |
1923 | if (mask & (1 << 5)) { | |
222a3336 | 1924 | iresult = float32_add(iresult, |
19cbd87c | 1925 | float32_mul(d->ZMM_S(1), s->ZMM_S(1), |
e01d9d31 BS |
1926 | &env->sse_status), |
1927 | &env->sse_status); | |
1928 | } | |
1929 | if (mask & (1 << 6)) { | |
222a3336 | 1930 | iresult = float32_add(iresult, |
19cbd87c | 1931 | float32_mul(d->ZMM_S(2), s->ZMM_S(2), |
e01d9d31 BS |
1932 | &env->sse_status), |
1933 | &env->sse_status); | |
1934 | } | |
1935 | if (mask & (1 << 7)) { | |
222a3336 | 1936 | iresult = float32_add(iresult, |
19cbd87c | 1937 | float32_mul(d->ZMM_S(3), s->ZMM_S(3), |
e01d9d31 BS |
1938 | &env->sse_status), |
1939 | &env->sse_status); | |
1940 | } | |
19cbd87c EH |
1941 | d->ZMM_S(0) = (mask & (1 << 0)) ? iresult : float32_zero; |
1942 | d->ZMM_S(1) = (mask & (1 << 1)) ? iresult : float32_zero; | |
1943 | d->ZMM_S(2) = (mask & (1 << 2)) ? iresult : float32_zero; | |
1944 | d->ZMM_S(3) = (mask & (1 << 3)) ? iresult : float32_zero; | |
222a3336 AZ |
1945 | } |
1946 | ||
d3eb5eae | 1947 | void glue(helper_dppd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask) |
222a3336 | 1948 | { |
170d5b4b | 1949 | float64 iresult = float64_zero; |
222a3336 | 1950 | |
e01d9d31 | 1951 | if (mask & (1 << 4)) { |
222a3336 | 1952 | iresult = float64_add(iresult, |
19cbd87c | 1953 | float64_mul(d->ZMM_D(0), s->ZMM_D(0), |
e01d9d31 BS |
1954 | &env->sse_status), |
1955 | &env->sse_status); | |
1956 | } | |
1957 | if (mask & (1 << 5)) { | |
222a3336 | 1958 | iresult = float64_add(iresult, |
19cbd87c | 1959 | float64_mul(d->ZMM_D(1), s->ZMM_D(1), |
e01d9d31 BS |
1960 | &env->sse_status), |
1961 | &env->sse_status); | |
1962 | } | |
19cbd87c EH |
1963 | d->ZMM_D(0) = (mask & (1 << 0)) ? iresult : float64_zero; |
1964 | d->ZMM_D(1) = (mask & (1 << 1)) ? iresult : float64_zero; | |
222a3336 AZ |
1965 | } |
1966 | ||
d3eb5eae BS |
1967 | void glue(helper_mpsadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
1968 | uint32_t offset) | |
222a3336 AZ |
1969 | { |
1970 | int s0 = (offset & 3) << 2; | |
1971 | int d0 = (offset & 4) << 0; | |
1972 | int i; | |
1973 | Reg r; | |
1974 | ||
1975 | for (i = 0; i < 8; i++, d0++) { | |
1976 | r.W(i) = 0; | |
1977 | r.W(i) += abs1(d->B(d0 + 0) - s->B(s0 + 0)); | |
1978 | r.W(i) += abs1(d->B(d0 + 1) - s->B(s0 + 1)); | |
1979 | r.W(i) += abs1(d->B(d0 + 2) - s->B(s0 + 2)); | |
1980 | r.W(i) += abs1(d->B(d0 + 3) - s->B(s0 + 3)); | |
1981 | } | |
1982 | ||
1983 | *d = r; | |
1984 | } | |
1985 | ||
1986 | /* SSE4.2 op helpers */ | |
da5156cd | 1987 | #define FCMPGTQ(d, s) ((int64_t)d > (int64_t)s ? -1 : 0) |
222a3336 AZ |
1988 | SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ) |
1989 | ||
d3eb5eae | 1990 | static inline int pcmp_elen(CPUX86State *env, int reg, uint32_t ctrl) |
222a3336 AZ |
1991 | { |
1992 | int val; | |
1993 | ||
1994 | /* Presence of REX.W is indicated by a bit higher than 7 set */ | |
e01d9d31 BS |
1995 | if (ctrl >> 8) { |
1996 | val = abs1((int64_t)env->regs[reg]); | |
1997 | } else { | |
1998 | val = abs1((int32_t)env->regs[reg]); | |
1999 | } | |
222a3336 AZ |
2000 | |
2001 | if (ctrl & 1) { | |
e01d9d31 | 2002 | if (val > 8) { |
222a3336 | 2003 | return 8; |
e01d9d31 BS |
2004 | } |
2005 | } else { | |
2006 | if (val > 16) { | |
222a3336 | 2007 | return 16; |
e01d9d31 BS |
2008 | } |
2009 | } | |
222a3336 AZ |
2010 | return val; |
2011 | } | |
2012 | ||
2013 | static inline int pcmp_ilen(Reg *r, uint8_t ctrl) | |
2014 | { | |
2015 | int val = 0; | |
2016 | ||
2017 | if (ctrl & 1) { | |
e01d9d31 | 2018 | while (val < 8 && r->W(val)) { |
222a3336 | 2019 | val++; |
e01d9d31 BS |
2020 | } |
2021 | } else { | |
2022 | while (val < 16 && r->B(val)) { | |
222a3336 | 2023 | val++; |
e01d9d31 BS |
2024 | } |
2025 | } | |
222a3336 AZ |
2026 | |
2027 | return val; | |
2028 | } | |
2029 | ||
2030 | static inline int pcmp_val(Reg *r, uint8_t ctrl, int i) | |
2031 | { | |
2032 | switch ((ctrl >> 0) & 3) { | |
2033 | case 0: | |
2034 | return r->B(i); | |
2035 | case 1: | |
2036 | return r->W(i); | |
2037 | case 2: | |
e01d9d31 | 2038 | return (int8_t)r->B(i); |
222a3336 AZ |
2039 | case 3: |
2040 | default: | |
e01d9d31 | 2041 | return (int16_t)r->W(i); |
222a3336 AZ |
2042 | } |
2043 | } | |
2044 | ||
d3eb5eae | 2045 | static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s, |
e01d9d31 | 2046 | int8_t ctrl, int valids, int validd) |
222a3336 AZ |
2047 | { |
2048 | unsigned int res = 0; | |
2049 | int v; | |
2050 | int j, i; | |
2051 | int upper = (ctrl & 1) ? 7 : 15; | |
2052 | ||
2053 | valids--; | |
2054 | validd--; | |
2055 | ||
2056 | CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0); | |
2057 | ||
2058 | switch ((ctrl >> 2) & 3) { | |
2059 | case 0: | |
2060 | for (j = valids; j >= 0; j--) { | |
2061 | res <<= 1; | |
2062 | v = pcmp_val(s, ctrl, j); | |
e01d9d31 | 2063 | for (i = validd; i >= 0; i--) { |
222a3336 | 2064 | res |= (v == pcmp_val(d, ctrl, i)); |
e01d9d31 | 2065 | } |
222a3336 AZ |
2066 | } |
2067 | break; | |
2068 | case 1: | |
2069 | for (j = valids; j >= 0; j--) { | |
2070 | res <<= 1; | |
2071 | v = pcmp_val(s, ctrl, j); | |
e01d9d31 | 2072 | for (i = ((validd - 1) | 1); i >= 0; i -= 2) { |
649ad05e AJ |
2073 | res |= (pcmp_val(d, ctrl, i - 0) >= v && |
2074 | pcmp_val(d, ctrl, i - 1) <= v); | |
e01d9d31 | 2075 | } |
222a3336 AZ |
2076 | } |
2077 | break; | |
2078 | case 2: | |
b27a6cac | 2079 | res = (1 << (upper - MAX(valids, validd))) - 1; |
222a3336 AZ |
2080 | res <<= MAX(valids, validd) - MIN(valids, validd); |
2081 | for (i = MIN(valids, validd); i >= 0; i--) { | |
2082 | res <<= 1; | |
2083 | v = pcmp_val(s, ctrl, i); | |
2084 | res |= (v == pcmp_val(d, ctrl, i)); | |
2085 | } | |
2086 | break; | |
2087 | case 3: | |
ae35eea7 JM |
2088 | if (validd == -1) { |
2089 | res = (2 << upper) - 1; | |
2090 | break; | |
2091 | } | |
bc921b27 | 2092 | for (j = valids == upper ? valids : valids - validd; j >= 0; j--) { |
222a3336 | 2093 | res <<= 1; |
75c9527e | 2094 | v = 1; |
bc921b27 | 2095 | for (i = MIN(valids - j, validd); i >= 0; i--) { |
75c9527e | 2096 | v &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i)); |
e01d9d31 | 2097 | } |
75c9527e | 2098 | res |= v; |
222a3336 AZ |
2099 | } |
2100 | break; | |
2101 | } | |
2102 | ||
2103 | switch ((ctrl >> 4) & 3) { | |
2104 | case 1: | |
2105 | res ^= (2 << upper) - 1; | |
2106 | break; | |
2107 | case 3: | |
e4eba27e | 2108 | res ^= (1 << (valids + 1)) - 1; |
222a3336 AZ |
2109 | break; |
2110 | } | |
2111 | ||
e01d9d31 BS |
2112 | if (res) { |
2113 | CC_SRC |= CC_C; | |
2114 | } | |
2115 | if (res & 1) { | |
2116 | CC_SRC |= CC_O; | |
2117 | } | |
222a3336 AZ |
2118 | |
2119 | return res; | |
2120 | } | |
2121 | ||
d3eb5eae BS |
2122 | void glue(helper_pcmpestri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
2123 | uint32_t ctrl) | |
222a3336 | 2124 | { |
d3eb5eae BS |
2125 | unsigned int res = pcmpxstrx(env, d, s, ctrl, |
2126 | pcmp_elen(env, R_EDX, ctrl), | |
2127 | pcmp_elen(env, R_EAX, ctrl)); | |
222a3336 | 2128 | |
e01d9d31 | 2129 | if (res) { |
c334a388 | 2130 | env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res); |
e01d9d31 | 2131 | } else { |
222a3336 | 2132 | env->regs[R_ECX] = 16 >> (ctrl & (1 << 0)); |
e01d9d31 | 2133 | } |
222a3336 AZ |
2134 | } |
2135 | ||
d3eb5eae BS |
2136 | void glue(helper_pcmpestrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
2137 | uint32_t ctrl) | |
222a3336 AZ |
2138 | { |
2139 | int i; | |
d3eb5eae BS |
2140 | unsigned int res = pcmpxstrx(env, d, s, ctrl, |
2141 | pcmp_elen(env, R_EDX, ctrl), | |
2142 | pcmp_elen(env, R_EAX, ctrl)); | |
222a3336 AZ |
2143 | |
2144 | if ((ctrl >> 6) & 1) { | |
e01d9d31 | 2145 | if (ctrl & 1) { |
bc426899 | 2146 | for (i = 0; i < 8; i++, res >>= 1) { |
2b8d7e9d | 2147 | env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0; |
bc426899 | 2148 | } |
e01d9d31 | 2149 | } else { |
bc426899 | 2150 | for (i = 0; i < 16; i++, res >>= 1) { |
2b8d7e9d | 2151 | env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0; |
bc426899 | 2152 | } |
e01d9d31 | 2153 | } |
222a3336 | 2154 | } else { |
2b8d7e9d AJ |
2155 | env->xmm_regs[0].Q(1) = 0; |
2156 | env->xmm_regs[0].Q(0) = res; | |
222a3336 AZ |
2157 | } |
2158 | } | |
2159 | ||
d3eb5eae BS |
2160 | void glue(helper_pcmpistri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
2161 | uint32_t ctrl) | |
222a3336 | 2162 | { |
d3eb5eae | 2163 | unsigned int res = pcmpxstrx(env, d, s, ctrl, |
e01d9d31 BS |
2164 | pcmp_ilen(s, ctrl), |
2165 | pcmp_ilen(d, ctrl)); | |
222a3336 | 2166 | |
e01d9d31 | 2167 | if (res) { |
c334a388 | 2168 | env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res); |
e01d9d31 | 2169 | } else { |
222a3336 | 2170 | env->regs[R_ECX] = 16 >> (ctrl & (1 << 0)); |
e01d9d31 | 2171 | } |
222a3336 AZ |
2172 | } |
2173 | ||
d3eb5eae BS |
2174 | void glue(helper_pcmpistrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
2175 | uint32_t ctrl) | |
222a3336 AZ |
2176 | { |
2177 | int i; | |
d3eb5eae | 2178 | unsigned int res = pcmpxstrx(env, d, s, ctrl, |
e01d9d31 BS |
2179 | pcmp_ilen(s, ctrl), |
2180 | pcmp_ilen(d, ctrl)); | |
222a3336 AZ |
2181 | |
2182 | if ((ctrl >> 6) & 1) { | |
e01d9d31 | 2183 | if (ctrl & 1) { |
bc426899 | 2184 | for (i = 0; i < 8; i++, res >>= 1) { |
2b8d7e9d | 2185 | env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0; |
bc426899 | 2186 | } |
e01d9d31 | 2187 | } else { |
bc426899 | 2188 | for (i = 0; i < 16; i++, res >>= 1) { |
2b8d7e9d | 2189 | env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0; |
bc426899 | 2190 | } |
e01d9d31 | 2191 | } |
222a3336 | 2192 | } else { |
2b8d7e9d AJ |
2193 | env->xmm_regs[0].Q(1) = 0; |
2194 | env->xmm_regs[0].Q(0) = res; | |
222a3336 AZ |
2195 | } |
2196 | } | |
2197 | ||
2198 | #define CRCPOLY 0x1edc6f41 | |
2199 | #define CRCPOLY_BITREV 0x82f63b78 | |
2200 | target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len) | |
2201 | { | |
2202 | target_ulong crc = (msg & ((target_ulong) -1 >> | |
e01d9d31 | 2203 | (TARGET_LONG_BITS - len))) ^ crc1; |
222a3336 | 2204 | |
e01d9d31 | 2205 | while (len--) { |
222a3336 | 2206 | crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0); |
e01d9d31 | 2207 | } |
222a3336 AZ |
2208 | |
2209 | return crc; | |
2210 | } | |
2211 | ||
e71827bc AJ |
2212 | void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, |
2213 | uint32_t ctrl) | |
2214 | { | |
2215 | uint64_t ah, al, b, resh, resl; | |
2216 | ||
2217 | ah = 0; | |
2218 | al = d->Q((ctrl & 1) != 0); | |
2219 | b = s->Q((ctrl & 16) != 0); | |
2220 | resh = resl = 0; | |
2221 | ||
2222 | while (b) { | |
2223 | if (b & 1) { | |
2224 | resl ^= al; | |
2225 | resh ^= ah; | |
2226 | } | |
2227 | ah = (ah << 1) | (al >> 63); | |
2228 | al <<= 1; | |
2229 | b >>= 1; | |
2230 | } | |
2231 | ||
2232 | d->Q(0) = resl; | |
2233 | d->Q(1) = resh; | |
2234 | } | |
d640045a | 2235 | |
d640045a AJ |
2236 | void glue(helper_aesdec, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) |
2237 | { | |
2238 | int i; | |
2239 | Reg st = *d; | |
2240 | Reg rk = *s; | |
2241 | ||
2242 | for (i = 0 ; i < 4 ; i++) { | |
04af534d TM |
2243 | d->L(i) = rk.L(i) ^ bswap32(AES_Td0[st.B(AES_ishifts[4*i+0])] ^ |
2244 | AES_Td1[st.B(AES_ishifts[4*i+1])] ^ | |
2245 | AES_Td2[st.B(AES_ishifts[4*i+2])] ^ | |
2246 | AES_Td3[st.B(AES_ishifts[4*i+3])]); | |
d640045a AJ |
2247 | } |
2248 | } | |
2249 | ||
2250 | void glue(helper_aesdeclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) | |
2251 | { | |
2252 | int i; | |
2253 | Reg st = *d; | |
2254 | Reg rk = *s; | |
2255 | ||
2256 | for (i = 0; i < 16; i++) { | |
9551ea69 | 2257 | d->B(i) = rk.B(i) ^ (AES_isbox[st.B(AES_ishifts[i])]); |
d640045a AJ |
2258 | } |
2259 | } | |
2260 | ||
2261 | void glue(helper_aesenc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) | |
2262 | { | |
2263 | int i; | |
2264 | Reg st = *d; | |
2265 | Reg rk = *s; | |
2266 | ||
2267 | for (i = 0 ; i < 4 ; i++) { | |
04af534d TM |
2268 | d->L(i) = rk.L(i) ^ bswap32(AES_Te0[st.B(AES_shifts[4*i+0])] ^ |
2269 | AES_Te1[st.B(AES_shifts[4*i+1])] ^ | |
2270 | AES_Te2[st.B(AES_shifts[4*i+2])] ^ | |
2271 | AES_Te3[st.B(AES_shifts[4*i+3])]); | |
d640045a AJ |
2272 | } |
2273 | } | |
2274 | ||
2275 | void glue(helper_aesenclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) | |
2276 | { | |
2277 | int i; | |
2278 | Reg st = *d; | |
2279 | Reg rk = *s; | |
2280 | ||
2281 | for (i = 0; i < 16; i++) { | |
9551ea69 | 2282 | d->B(i) = rk.B(i) ^ (AES_sbox[st.B(AES_shifts[i])]); |
d640045a AJ |
2283 | } |
2284 | ||
2285 | } | |
2286 | ||
2287 | void glue(helper_aesimc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) | |
2288 | { | |
2289 | int i; | |
2290 | Reg tmp = *s; | |
2291 | ||
2292 | for (i = 0 ; i < 4 ; i++) { | |
9551ea69 AJ |
2293 | d->L(i) = bswap32(AES_imc[tmp.B(4*i+0)][0] ^ |
2294 | AES_imc[tmp.B(4*i+1)][1] ^ | |
2295 | AES_imc[tmp.B(4*i+2)][2] ^ | |
2296 | AES_imc[tmp.B(4*i+3)][3]); | |
d640045a AJ |
2297 | } |
2298 | } | |
2299 | ||
2300 | void glue(helper_aeskeygenassist, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, | |
2301 | uint32_t ctrl) | |
2302 | { | |
2303 | int i; | |
2304 | Reg tmp = *s; | |
2305 | ||
2306 | for (i = 0 ; i < 4 ; i++) { | |
9551ea69 AJ |
2307 | d->B(i) = AES_sbox[tmp.B(i + 4)]; |
2308 | d->B(i + 8) = AES_sbox[tmp.B(i + 12)]; | |
d640045a AJ |
2309 | } |
2310 | d->L(1) = (d->L(0) << 24 | d->L(0) >> 8) ^ ctrl; | |
2311 | d->L(3) = (d->L(2) << 24 | d->L(2) >> 8) ^ ctrl; | |
2312 | } | |
222a3336 AZ |
2313 | #endif |
2314 | ||
664e0f19 FB |
2315 | #undef SHIFT |
2316 | #undef XMM_ONLY | |
2317 | #undef Reg | |
2318 | #undef B | |
2319 | #undef W | |
2320 | #undef L | |
2321 | #undef Q | |
2322 | #undef SUFFIX |