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e616bdfd SG |
1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* | |
3 | * Copyright (c) 2021 Loongson Technology Corporation Limited | |
4 | */ | |
5 | ||
6 | static void maybe_nanbox_load(TCGv freg, MemOp mop) | |
7 | { | |
8 | if ((mop & MO_SIZE) == MO_32) { | |
9 | gen_nanbox_s(freg, freg); | |
10 | } | |
11 | } | |
12 | ||
13 | static bool gen_fload_i(DisasContext *ctx, arg_fr_i *a, MemOp mop) | |
14 | { | |
15 | TCGv addr = gpr_src(ctx, a->rj, EXT_NONE); | |
4854bbbe | 16 | TCGv dest = get_fpr(ctx, a->fd); |
e616bdfd | 17 | |
2419978c RW |
18 | CHECK_FPE; |
19 | ||
c5af6628 | 20 | addr = make_address_i(ctx, addr, a->imm); |
e616bdfd | 21 | |
4854bbbe SG |
22 | tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop); |
23 | maybe_nanbox_load(dest, mop); | |
24 | set_fpr(a->fd, dest); | |
e616bdfd | 25 | |
e616bdfd SG |
26 | return true; |
27 | } | |
28 | ||
29 | static bool gen_fstore_i(DisasContext *ctx, arg_fr_i *a, MemOp mop) | |
30 | { | |
31 | TCGv addr = gpr_src(ctx, a->rj, EXT_NONE); | |
4854bbbe | 32 | TCGv src = get_fpr(ctx, a->fd); |
e616bdfd | 33 | |
2419978c RW |
34 | CHECK_FPE; |
35 | ||
c5af6628 | 36 | addr = make_address_i(ctx, addr, a->imm); |
e616bdfd | 37 | |
4854bbbe SG |
38 | tcg_gen_qemu_st_tl(src, addr, ctx->mem_idx, mop); |
39 | ||
e616bdfd SG |
40 | return true; |
41 | } | |
42 | ||
43 | static bool gen_floadx(DisasContext *ctx, arg_frr *a, MemOp mop) | |
44 | { | |
45 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); | |
46 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); | |
4854bbbe | 47 | TCGv dest = get_fpr(ctx, a->fd); |
2419978c | 48 | TCGv addr; |
e616bdfd | 49 | |
2419978c RW |
50 | CHECK_FPE; |
51 | ||
34423c01 | 52 | addr = make_address_x(ctx, src1, src2); |
4854bbbe SG |
53 | tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop); |
54 | maybe_nanbox_load(dest, mop); | |
55 | set_fpr(a->fd, dest); | |
e616bdfd SG |
56 | |
57 | return true; | |
58 | } | |
59 | ||
60 | static bool gen_fstorex(DisasContext *ctx, arg_frr *a, MemOp mop) | |
61 | { | |
62 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); | |
63 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); | |
4854bbbe | 64 | TCGv src3 = get_fpr(ctx, a->fd); |
2419978c RW |
65 | TCGv addr; |
66 | ||
67 | CHECK_FPE; | |
e616bdfd | 68 | |
34423c01 | 69 | addr = make_address_x(ctx, src1, src2); |
4854bbbe | 70 | tcg_gen_qemu_st_tl(src3, addr, ctx->mem_idx, mop); |
e616bdfd SG |
71 | |
72 | return true; | |
73 | } | |
74 | ||
75 | static bool gen_fload_gt(DisasContext *ctx, arg_frr *a, MemOp mop) | |
76 | { | |
77 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); | |
78 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); | |
4854bbbe | 79 | TCGv dest = get_fpr(ctx, a->fd); |
2419978c | 80 | TCGv addr; |
e616bdfd | 81 | |
2419978c RW |
82 | CHECK_FPE; |
83 | ||
ad75a51e | 84 | gen_helper_asrtgt_d(tcg_env, src1, src2); |
34423c01 | 85 | addr = make_address_x(ctx, src1, src2); |
4854bbbe SG |
86 | tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop); |
87 | maybe_nanbox_load(dest, mop); | |
88 | set_fpr(a->fd, dest); | |
e616bdfd SG |
89 | |
90 | return true; | |
91 | } | |
92 | ||
93 | static bool gen_fstore_gt(DisasContext *ctx, arg_frr *a, MemOp mop) | |
94 | { | |
95 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); | |
96 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); | |
4854bbbe | 97 | TCGv src3 = get_fpr(ctx, a->fd); |
2419978c RW |
98 | TCGv addr; |
99 | ||
100 | CHECK_FPE; | |
e616bdfd | 101 | |
ad75a51e | 102 | gen_helper_asrtgt_d(tcg_env, src1, src2); |
34423c01 | 103 | addr = make_address_x(ctx, src1, src2); |
4854bbbe | 104 | tcg_gen_qemu_st_tl(src3, addr, ctx->mem_idx, mop); |
e616bdfd SG |
105 | |
106 | return true; | |
107 | } | |
108 | ||
109 | static bool gen_fload_le(DisasContext *ctx, arg_frr *a, MemOp mop) | |
110 | { | |
111 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); | |
112 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); | |
4854bbbe | 113 | TCGv dest = get_fpr(ctx, a->fd); |
2419978c | 114 | TCGv addr; |
e616bdfd | 115 | |
2419978c RW |
116 | CHECK_FPE; |
117 | ||
ad75a51e | 118 | gen_helper_asrtle_d(tcg_env, src1, src2); |
34423c01 | 119 | addr = make_address_x(ctx, src1, src2); |
4854bbbe SG |
120 | tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop); |
121 | maybe_nanbox_load(dest, mop); | |
122 | set_fpr(a->fd, dest); | |
e616bdfd SG |
123 | |
124 | return true; | |
125 | } | |
126 | ||
127 | static bool gen_fstore_le(DisasContext *ctx, arg_frr *a, MemOp mop) | |
128 | { | |
129 | TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); | |
130 | TCGv src2 = gpr_src(ctx, a->rk, EXT_NONE); | |
4854bbbe | 131 | TCGv src3 = get_fpr(ctx, a->fd); |
2419978c RW |
132 | TCGv addr; |
133 | ||
134 | CHECK_FPE; | |
e616bdfd | 135 | |
ad75a51e | 136 | gen_helper_asrtle_d(tcg_env, src1, src2); |
34423c01 | 137 | addr = make_address_x(ctx, src1, src2); |
4854bbbe | 138 | tcg_gen_qemu_st_tl(src3, addr, ctx->mem_idx, mop); |
e616bdfd SG |
139 | |
140 | return true; | |
141 | } | |
142 | ||
95e2ca24 SG |
143 | TRANS(fld_s, FP_SP, gen_fload_i, MO_TEUL) |
144 | TRANS(fst_s, FP_SP, gen_fstore_i, MO_TEUL) | |
145 | TRANS(fld_d, FP_DP, gen_fload_i, MO_TEUQ) | |
146 | TRANS(fst_d, FP_DP, gen_fstore_i, MO_TEUQ) | |
147 | TRANS(fldx_s, FP_SP, gen_floadx, MO_TEUL) | |
148 | TRANS(fldx_d, FP_DP, gen_floadx, MO_TEUQ) | |
149 | TRANS(fstx_s, FP_SP, gen_fstorex, MO_TEUL) | |
150 | TRANS(fstx_d, FP_DP, gen_fstorex, MO_TEUQ) | |
151 | TRANS(fldgt_s, FP_SP, gen_fload_gt, MO_TEUL) | |
152 | TRANS(fldgt_d, FP_DP, gen_fload_gt, MO_TEUQ) | |
153 | TRANS(fldle_s, FP_SP, gen_fload_le, MO_TEUL) | |
154 | TRANS(fldle_d, FP_DP, gen_fload_le, MO_TEUQ) | |
155 | TRANS(fstgt_s, FP_SP, gen_fstore_gt, MO_TEUL) | |
156 | TRANS(fstgt_d, FP_DP, gen_fstore_gt, MO_TEUQ) | |
157 | TRANS(fstle_s, FP_SP, gen_fstore_le, MO_TEUL) | |
158 | TRANS(fstle_d, FP_DP, gen_fstore_le, MO_TEUQ) |