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target/loongarch: Add MMU support for LoongArch CPU.
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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * QEMU LoongArch CPU -- internal functions and types
4 *
5 * Copyright (c) 2021 Loongson Technology Corporation Limited
6 */
7
8#ifndef LOONGARCH_INTERNALS_H
9#define LOONGARCH_INTERNALS_H
10
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11#define FCMP_LT 0b0001 /* fp0 < fp1 */
12#define FCMP_EQ 0b0010 /* fp0 = fp1 */
13#define FCMP_UN 0b0100 /* unordered */
14#define FCMP_GT 0b1000 /* fp0 > fp1 */
15
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16#define TARGET_PHYS_MASK MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS)
17#define TARGET_VIRT_MASK MAKE_64BIT_MASK(0, TARGET_VIRT_ADDR_SPACE_BITS)
18
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19void loongarch_translate_init(void);
20
21void loongarch_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
22
23void G_NORETURN do_raise_exception(CPULoongArchState *env,
24 uint32_t exception,
25 uintptr_t pc);
26
27const char *loongarch_exception_name(int32_t exception);
28
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29void restore_fp_status(CPULoongArchState *env);
30
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31extern const VMStateDescription vmstate_loongarch_cpu;
32
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33bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
34 MMUAccessType access_type, int mmu_idx,
35 bool probe, uintptr_t retaddr);
36
37hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
38
228021f0 39#endif