]>
Commit | Line | Data |
---|---|---|
228021f0 SG |
1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* | |
3 | * QEMU LoongArch CPU -- internal functions and types | |
4 | * | |
5 | * Copyright (c) 2021 Loongson Technology Corporation Limited | |
6 | */ | |
7 | ||
8 | #ifndef LOONGARCH_INTERNALS_H | |
9 | #define LOONGARCH_INTERNALS_H | |
10 | ||
9b741076 SG |
11 | #define FCMP_LT 0b0001 /* fp0 < fp1 */ |
12 | #define FCMP_EQ 0b0010 /* fp0 = fp1 */ | |
13 | #define FCMP_UN 0b0100 /* unordered */ | |
14 | #define FCMP_GT 0b1000 /* fp0 > fp1 */ | |
15 | ||
7e1c521e XY |
16 | #define TARGET_PHYS_MASK MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS) |
17 | #define TARGET_VIRT_MASK MAKE_64BIT_MASK(0, TARGET_VIRT_ADDR_SPACE_BITS) | |
18 | ||
228021f0 SG |
19 | void loongarch_translate_init(void); |
20 | ||
21 | void loongarch_cpu_dump_state(CPUState *cpu, FILE *f, int flags); | |
22 | ||
23 | void G_NORETURN do_raise_exception(CPULoongArchState *env, | |
24 | uint32_t exception, | |
25 | uintptr_t pc); | |
26 | ||
27 | const char *loongarch_exception_name(int32_t exception); | |
28 | ||
f8447436 | 29 | #ifdef CONFIG_TCG |
aca67472 | 30 | int ieee_ex_to_loongarch(int xcpt); |
d578ca6c | 31 | void restore_fp_status(CPULoongArchState *env); |
f8447436 | 32 | #endif |
d578ca6c | 33 | |
0093b9a5 | 34 | #ifndef CONFIG_USER_ONLY |
27edd504 SG |
35 | enum { |
36 | TLBRET_MATCH = 0, | |
37 | TLBRET_BADADDR = 1, | |
38 | TLBRET_NOMATCH = 2, | |
39 | TLBRET_INVALID = 3, | |
40 | TLBRET_DIRTY = 4, | |
41 | TLBRET_RI = 5, | |
42 | TLBRET_XI = 6, | |
43 | TLBRET_PE = 7, | |
44 | }; | |
45 | ||
67ebd42a XY |
46 | extern const VMStateDescription vmstate_loongarch_cpu; |
47 | ||
f757a2cd XY |
48 | void loongarch_cpu_set_irq(void *opaque, int irq, int level); |
49 | ||
dd615fa4 XY |
50 | void loongarch_constant_timer_cb(void *opaque); |
51 | uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu); | |
52 | uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu); | |
53 | void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu, | |
54 | uint64_t value); | |
27edd504 SG |
55 | bool loongarch_tlb_search(CPULoongArchState *env, target_ulong vaddr, |
56 | int *index); | |
57 | int get_physical_address(CPULoongArchState *env, hwaddr *physical, | |
58 | int *prot, target_ulong address, | |
59 | MMUAccessType access_type, int mmu_idx); | |
60 | hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); | |
61 | ||
f8447436 | 62 | #ifdef CONFIG_TCG |
7e1c521e XY |
63 | bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size, |
64 | MMUAccessType access_type, int mmu_idx, | |
65 | bool probe, uintptr_t retaddr); | |
f8447436 | 66 | #endif |
0093b9a5 | 67 | #endif /* !CONFIG_USER_ONLY */ |
7e1c521e | 68 | |
2f149c75 SG |
69 | uint64_t read_fcc(CPULoongArchState *env); |
70 | void write_fcc(CPULoongArchState *env, uint64_t val); | |
71 | ||
ca61e750 XY |
72 | int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n); |
73 | int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n); | |
74 | void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs); | |
75 | ||
228021f0 | 76 | #endif |