]> git.proxmox.com Git - mirror_qemu.git/blame - target/loongarch/meson.build
target/loongarch: Add LoongArch interrupt and exception handle
[mirror_qemu.git] / target / loongarch / meson.build
CommitLineData
14f2b0b7
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1gen = decodetree.process('insns.decode')
2
3loongarch_ss = ss.source_set()
4loongarch_ss.add(files(
5 'cpu.c',
6 'disas.c',
7))
8loongarch_tcg_ss = ss.source_set()
9loongarch_tcg_ss.add(gen)
10loongarch_tcg_ss.add(files(
11 'fpu_helper.c',
12 'op_helper.c',
13 'translate.c',
14))
15loongarch_tcg_ss.add(zlib)
16
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17loongarch_softmmu_ss = ss.source_set()
18loongarch_softmmu_ss.add(files(
19 'machine.c',
7e1c521e 20 'tlb_helper.c',
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21))
22
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23loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
24
25target_arch += {'loongarch': loongarch_ss}
67ebd42a 26target_softmmu_arch += {'loongarch': loongarch_softmmu_ss}