[mirror_qemu.git] / target / m68k / cpu.c

/*
 * QEMU Motorola 68k CPU
 *
 * Copyright (c) 2012 SUSE LINUX Products GmbH
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see
 * <http://www.gnu.org/licenses/lgpl-2.1.html>
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
#include "migration/vmstate.h"
#include "exec/exec-all.h"


static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
{
    M68kCPU *cpu = M68K_CPU(cs);

    cpu->env.pc = value;
}

static bool m68k_cpu_has_work(CPUState *cs)
{
    return cs->interrupt_request & CPU_INTERRUPT_HARD;
}

static void m68k_set_feature(CPUM68KState *env, int feature)
{
    env->features |= (1u << feature);
}

/* CPUClass::reset() */
static void m68k_cpu_reset(CPUState *s)
{
    M68kCPU *cpu = M68K_CPU(s);
    M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
    CPUM68KState *env = &cpu->env;
    floatx80 nan = floatx80_default_nan(NULL);
    int i;

    mcc->parent_reset(s);

    memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
#if !defined(CONFIG_USER_ONLY)
    env->sr = 0x2700;
#endif
    m68k_switch_sp(env);
    for (i = 0; i < 8; i++) {
        env->fregs[i].d = nan;
    }
    cpu_m68k_set_fpcr(env, 0);
    env->fpsr = 0;

    cpu_m68k_set_ccr(env, 0);
    /* TODO: We should set PC from the interrupt vector.  */
    env->pc = 0;
}

static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
{
    M68kCPU *cpu = M68K_CPU(s);
    CPUM68KState *env = &cpu->env;
    info->print_insn = print_insn_m68k;
    if (m68k_feature(env, M68K_FEATURE_M68000)) {
        info->mach = bfd_mach_m68040;
    }
}

/* CPU models */

static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
{
    ObjectClass *oc;
    char *typename;

    typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
    oc = object_class_by_name(typename);
    g_free(typename);
    if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
                       object_class_is_abstract(oc))) {
        return NULL;
    }
    return oc;
}

static void m5206_cpu_initfn(Object *obj)
{
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
}

static void m68000_cpu_initfn(Object *obj)
{
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    m68k_set_feature(env, M68K_FEATURE_M68000);
    m68k_set_feature(env, M68K_FEATURE_USP);
    m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
}

static void m68020_cpu_initfn(Object *obj)
{
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    m68k_set_feature(env, M68K_FEATURE_M68000);
    m68k_set_feature(env, M68K_FEATURE_USP);
    m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
    m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
    m68k_set_feature(env, M68K_FEATURE_BRAL);
    m68k_set_feature(env, M68K_FEATURE_BCCL);
    m68k_set_feature(env, M68K_FEATURE_BITFIELD);
    m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
    m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
    m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
    m68k_set_feature(env, M68K_FEATURE_FPU);
    m68k_set_feature(env, M68K_FEATURE_CAS);
    m68k_set_feature(env, M68K_FEATURE_BKPT);
    m68k_set_feature(env, M68K_FEATURE_RTD);
}
#define m68030_cpu_initfn m68020_cpu_initfn
#define m68040_cpu_initfn m68020_cpu_initfn

static void m68060_cpu_initfn(Object *obj)
{
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    m68k_set_feature(env, M68K_FEATURE_M68000);
    m68k_set_feature(env, M68K_FEATURE_USP);
    m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
    m68k_set_feature(env, M68K_FEATURE_BRAL);
    m68k_set_feature(env, M68K_FEATURE_BCCL);
    m68k_set_feature(env, M68K_FEATURE_BITFIELD);
    m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
    m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
    m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
    m68k_set_feature(env, M68K_FEATURE_FPU);
    m68k_set_feature(env, M68K_FEATURE_CAS);
    m68k_set_feature(env, M68K_FEATURE_BKPT);
    m68k_set_feature(env, M68K_FEATURE_RTD);
}

static void m5208_cpu_initfn(Object *obj)
{
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
    m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
    m68k_set_feature(env, M68K_FEATURE_BRAL);
    m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
    m68k_set_feature(env, M68K_FEATURE_USP);
}

static void cfv4e_cpu_initfn(Object *obj)
{
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
    m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
    m68k_set_feature(env, M68K_FEATURE_BRAL);
    m68k_set_feature(env, M68K_FEATURE_CF_FPU);
    m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
    m68k_set_feature(env, M68K_FEATURE_USP);
}

static void any_cpu_initfn(Object *obj)
{
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
    m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
    m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
    m68k_set_feature(env, M68K_FEATURE_BRAL);
    m68k_set_feature(env, M68K_FEATURE_CF_FPU);
    /* MAC and EMAC are mututally exclusive, so pick EMAC.
       It's mostly backwards compatible.  */
    m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
    m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
    m68k_set_feature(env, M68K_FEATURE_USP);
    m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
    m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
}

static void m68k_cpu_realizefn(DeviceState *dev, Error **errp)
{
    CPUState *cs = CPU(dev);
    M68kCPU *cpu = M68K_CPU(dev);
    M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
    Error *local_err = NULL;

    register_m68k_insns(&cpu->env);

    cpu_exec_realizefn(cs, &local_err);
    if (local_err != NULL) {
        error_propagate(errp, local_err);
        return;
    }

    m68k_cpu_init_gdb(cpu);

    cpu_reset(cs);
    qemu_init_vcpu(cs);

    mcc->parent_realize(dev, errp);
}

static void m68k_cpu_initfn(Object *obj)
{
    CPUState *cs = CPU(obj);
    M68kCPU *cpu = M68K_CPU(obj);
    CPUM68KState *env = &cpu->env;

    cs->env_ptr = env;
}

static const VMStateDescription vmstate_m68k_cpu = {
    .name = "cpu",
    .unmigratable = 1,
};

static void m68k_cpu_class_init(ObjectClass *c, void *data)
{
    M68kCPUClass *mcc = M68K_CPU_CLASS(c);
    CPUClass *cc = CPU_CLASS(c);
    DeviceClass *dc = DEVICE_CLASS(c);

    mcc->parent_realize = dc->realize;
    dc->realize = m68k_cpu_realizefn;

    mcc->parent_reset = cc->reset;
    cc->reset = m68k_cpu_reset;

    cc->class_by_name = m68k_cpu_class_by_name;
    cc->has_work = m68k_cpu_has_work;
    cc->do_interrupt = m68k_cpu_do_interrupt;
    cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
    cc->dump_state = m68k_cpu_dump_state;
    cc->set_pc = m68k_cpu_set_pc;
    cc->gdb_read_register = m68k_cpu_gdb_read_register;
    cc->gdb_write_register = m68k_cpu_gdb_write_register;
#ifdef CONFIG_USER_ONLY
    cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault;
#else
    cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
#endif
    cc->disas_set_info = m68k_cpu_disas_set_info;
    cc->tcg_initialize = m68k_tcg_init;

    cc->gdb_num_core_regs = 18;
    cc->gdb_core_xml_file = "cf-core.xml";

    dc->vmsd = &vmstate_m68k_cpu;
}

#define DEFINE_M68K_CPU_TYPE(cpu_model, initfn) \
    {                                           \
        .name = M68K_CPU_TYPE_NAME(cpu_model),  \
        .instance_init = initfn,                \
        .parent = TYPE_M68K_CPU,                \
    }

static const TypeInfo m68k_cpus_type_infos[] = {
    { /* base class should be registered first */
        .name = TYPE_M68K_CPU,
        .parent = TYPE_CPU,
        .instance_size = sizeof(M68kCPU),
        .instance_init = m68k_cpu_initfn,
        .abstract = true,
        .class_size = sizeof(M68kCPUClass),
        .class_init = m68k_cpu_class_init,
    },
    DEFINE_M68K_CPU_TYPE("m68000", m68000_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("m68020", m68020_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("m68030", m68030_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("m68040", m68040_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("m68060", m68060_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("m5206", m5206_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("m5208", m5208_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("cfv4e", cfv4e_cpu_initfn),
    DEFINE_M68K_CPU_TYPE("any", any_cpu_initfn),
};

DEFINE_TYPES(m68k_cpus_type_infos)
Commit	Line	Data
b9e7a234 AF	1	/*
	2	* QEMU Motorola 68k CPU
	3	*
	4	* Copyright (c) 2012 SUSE LINUX Products GmbH
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2.1 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
	17	* License along with this library; if not, see
	18	* <http://www.gnu.org/licenses/lgpl-2.1.html>
	19	*/
	20
d8416665	21	#include "qemu/osdep.h"
da34e65c	22	#include "qapi/error.h"
b9e7a234 AF	23	#include "cpu.h"
b9e7a234 AF	24	#include "qemu-common.h"
087fe4f8	25	#include "migration/vmstate.h"
63c91552	26	#include "exec/exec-all.h"
b9e7a234 AF	27
b9e7a234 AF	28
e700604d AF	29	static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
	30	{
	31	M68kCPU *cpu = M68K_CPU(cs);
	32
	33	cpu->env.pc = value;
	34	}
	35
8c2e1b00 AF	36	static bool m68k_cpu_has_work(CPUState *cs)
	37	{
	38	return cs->interrupt_request & CPU_INTERRUPT_HARD;
	39	}
	40
11150915 AF	41	static void m68k_set_feature(CPUM68KState *env, int feature)
	42	{
	43	env->features \|= (1u << feature);
	44	}
	45
b9e7a234 AF	46	/* CPUClass::reset() */
	47	static void m68k_cpu_reset(CPUState *s)
	48	{
	49	M68kCPU *cpu = M68K_CPU(s);
	50	M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
	51	CPUM68KState *env = &cpu->env;
f83311e4	52	floatx80 nan = floatx80_default_nan(NULL);
f4a6ce51	53	int i;
b9e7a234 AF	54
	55	mcc->parent_reset(s);
	56
1f5c00cf	57	memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
11c19868 AF	58	#if !defined(CONFIG_USER_ONLY)
	59	env->sr = 0x2700;
	60	#endif
	61	m68k_switch_sp(env);
f4a6ce51	62	for (i = 0; i < 8; i++) {
f83311e4	63	env->fregs[i].d = nan;
f4a6ce51	64	}
ba624944	65	cpu_m68k_set_fpcr(env, 0);
f4a6ce51 LV	66	env->fpsr = 0;
f4a6ce51 LV	67
620c6cf6	68	cpu_m68k_set_ccr(env, 0);
11c19868 AF	69	/* TODO: We should set PC from the interrupt vector. */
11c19868 AF	70	env->pc = 0;
b9e7a234 AF	71	}
b9e7a234 AF	72
4d558f5d	73	static void m68k_cpu_disas_set_info(CPUState s, disassemble_info info)
4f669905	74	{
4d558f5d LV	75	M68kCPU *cpu = M68K_CPU(s);
4d558f5d LV	76	CPUM68KState *env = &cpu->env;
4f669905	77	info->print_insn = print_insn_m68k;
4d558f5d LV	78	if (m68k_feature(env, M68K_FEATURE_M68000)) {
	79	info->mach = bfd_mach_m68040;
	80	}
4f669905 PC	81	}
4f669905 PC	82
11150915 AF	83	/* CPU models */
11150915 AF	84
bc5b2da3 AF	85	static ObjectClass m68k_cpu_class_by_name(const char cpu_model)
	86	{
	87	ObjectClass *oc;
7a9f812b	88	char *typename;
bc5b2da3	89
f61797bd	90	typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
7a9f812b AF	91	oc = object_class_by_name(typename);
7a9f812b AF	92	g_free(typename);
cae85065 AF	93	if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL \|\|
cae85065 AF	94	object_class_is_abstract(oc))) {
bc5b2da3 AF	95	return NULL;
	96	}
	97	return oc;
	98	}
	99
11150915 AF	100	static void m5206_cpu_initfn(Object *obj)
	101	{
	102	M68kCPU *cpu = M68K_CPU(obj);
	103	CPUM68KState *env = &cpu->env;
	104
	105	m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
	106	}
	107
f076803b LV	108	static void m68000_cpu_initfn(Object *obj)
	109	{
	110	M68kCPU *cpu = M68K_CPU(obj);
	111	CPUM68KState *env = &cpu->env;
	112
	113	m68k_set_feature(env, M68K_FEATURE_M68000);
	114	m68k_set_feature(env, M68K_FEATURE_USP);
	115	m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
	116	}
	117
	118	static void m68020_cpu_initfn(Object *obj)
	119	{
	120	M68kCPU *cpu = M68K_CPU(obj);
	121	CPUM68KState *env = &cpu->env;
	122
	123	m68k_set_feature(env, M68K_FEATURE_M68000);
	124	m68k_set_feature(env, M68K_FEATURE_USP);
	125	m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
	126	m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
	127	m68k_set_feature(env, M68K_FEATURE_BRAL);
	128	m68k_set_feature(env, M68K_FEATURE_BCCL);
	129	m68k_set_feature(env, M68K_FEATURE_BITFIELD);
	130	m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
	131	m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
	132	m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
	133	m68k_set_feature(env, M68K_FEATURE_FPU);
	134	m68k_set_feature(env, M68K_FEATURE_CAS);
	135	m68k_set_feature(env, M68K_FEATURE_BKPT);
18059c9e	136	m68k_set_feature(env, M68K_FEATURE_RTD);
f076803b LV	137	}
	138	#define m68030_cpu_initfn m68020_cpu_initfn
	139	#define m68040_cpu_initfn m68020_cpu_initfn
	140
	141	static void m68060_cpu_initfn(Object *obj)
	142	{
	143	M68kCPU *cpu = M68K_CPU(obj);
	144	CPUM68KState *env = &cpu->env;
	145
	146	m68k_set_feature(env, M68K_FEATURE_M68000);
	147	m68k_set_feature(env, M68K_FEATURE_USP);
	148	m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
	149	m68k_set_feature(env, M68K_FEATURE_BRAL);
	150	m68k_set_feature(env, M68K_FEATURE_BCCL);
	151	m68k_set_feature(env, M68K_FEATURE_BITFIELD);
	152	m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
	153	m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
	154	m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
	155	m68k_set_feature(env, M68K_FEATURE_FPU);
	156	m68k_set_feature(env, M68K_FEATURE_CAS);
	157	m68k_set_feature(env, M68K_FEATURE_BKPT);
18059c9e	158	m68k_set_feature(env, M68K_FEATURE_RTD);
f076803b LV	159	}
f076803b LV	160
11150915 AF	161	static void m5208_cpu_initfn(Object *obj)
	162	{
	163	M68kCPU *cpu = M68K_CPU(obj);
	164	CPUM68KState *env = &cpu->env;
	165
	166	m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
	167	m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
	168	m68k_set_feature(env, M68K_FEATURE_BRAL);
	169	m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
	170	m68k_set_feature(env, M68K_FEATURE_USP);
	171	}
	172
	173	static void cfv4e_cpu_initfn(Object *obj)
	174	{
	175	M68kCPU *cpu = M68K_CPU(obj);
	176	CPUM68KState *env = &cpu->env;
	177
	178	m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
	179	m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
	180	m68k_set_feature(env, M68K_FEATURE_BRAL);
	181	m68k_set_feature(env, M68K_FEATURE_CF_FPU);
	182	m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
	183	m68k_set_feature(env, M68K_FEATURE_USP);
	184	}
	185
	186	static void any_cpu_initfn(Object *obj)
	187	{
	188	M68kCPU *cpu = M68K_CPU(obj);
	189	CPUM68KState *env = &cpu->env;
	190
	191	m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
	192	m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
	193	m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
	194	m68k_set_feature(env, M68K_FEATURE_BRAL);
	195	m68k_set_feature(env, M68K_FEATURE_CF_FPU);
	196	/* MAC and EMAC are mututally exclusive, so pick EMAC.
	197	It's mostly backwards compatible. */
	198	m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
	199	m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
	200	m68k_set_feature(env, M68K_FEATURE_USP);
	201	m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
	202	m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
	203	}
	204
6d1bbc62 AF	205	static void m68k_cpu_realizefn(DeviceState dev, Error *errp)
6d1bbc62 AF	206	{
14a10fc3	207	CPUState *cs = CPU(dev);
6d1bbc62 AF	208	M68kCPU *cpu = M68K_CPU(dev);
6d1bbc62 AF	209	M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev);
ce5b1bbf LV	210	Error *local_err = NULL;
ce5b1bbf LV	211
f47cf4e3 IM	212	register_m68k_insns(&cpu->env);
f47cf4e3 IM	213
ce5b1bbf LV	214	cpu_exec_realizefn(cs, &local_err);
	215	if (local_err != NULL) {
	216	error_propagate(errp, local_err);
	217	return;
	218	}
6d1bbc62 AF	219
	220	m68k_cpu_init_gdb(cpu);
	221
14a10fc3 AF	222	cpu_reset(cs);
14a10fc3 AF	223	qemu_init_vcpu(cs);
6d1bbc62 AF	224
	225	mcc->parent_realize(dev, errp);
	226	}
	227
9b706039 AF	228	static void m68k_cpu_initfn(Object *obj)
9b706039 AF	229	{
c05efcb1	230	CPUState *cs = CPU(obj);
9b706039 AF	231	M68kCPU *cpu = M68K_CPU(obj);
	232	CPUM68KState *env = &cpu->env;
	233
c05efcb1	234	cs->env_ptr = env;
9b706039 AF	235	}
9b706039 AF	236
087fe4f8 AF	237	static const VMStateDescription vmstate_m68k_cpu = {
	238	.name = "cpu",
	239	.unmigratable = 1,
	240	};
	241
b9e7a234 AF	242	static void m68k_cpu_class_init(ObjectClass c, void data)
	243	{
	244	M68kCPUClass *mcc = M68K_CPU_CLASS(c);
	245	CPUClass *cc = CPU_CLASS(c);
087fe4f8	246	DeviceClass *dc = DEVICE_CLASS(c);
b9e7a234	247
6d1bbc62 AF	248	mcc->parent_realize = dc->realize;
	249	dc->realize = m68k_cpu_realizefn;
	250
b9e7a234 AF	251	mcc->parent_reset = cc->reset;
b9e7a234 AF	252	cc->reset = m68k_cpu_reset;
bc5b2da3 AF	253
bc5b2da3 AF	254	cc->class_by_name = m68k_cpu_class_by_name;
8c2e1b00	255	cc->has_work = m68k_cpu_has_work;
97a8ea5a	256	cc->do_interrupt = m68k_cpu_do_interrupt;
ab409bb3	257	cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
878096ee	258	cc->dump_state = m68k_cpu_dump_state;
e700604d	259	cc->set_pc = m68k_cpu_set_pc;
5b50e790 AF	260	cc->gdb_read_register = m68k_cpu_gdb_read_register;
5b50e790 AF	261	cc->gdb_write_register = m68k_cpu_gdb_write_register;
7510454e AF	262	#ifdef CONFIG_USER_ONLY
	263	cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault;
	264	#else
00b941e5 AF	265	cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
00b941e5 AF	266	#endif
4f669905	267	cc->disas_set_info = m68k_cpu_disas_set_info;
55c3ceef	268	cc->tcg_initialize = m68k_tcg_init;
00f3fd63	269
a0e372f0	270	cc->gdb_num_core_regs = 18;
5b24c641	271	cc->gdb_core_xml_file = "cf-core.xml";
4c315c27	272
4f669905	273	dc->vmsd = &vmstate_m68k_cpu;
b9e7a234 AF	274	}
b9e7a234 AF	275
f61797bd IM	276	#define DEFINE_M68K_CPU_TYPE(cpu_model, initfn) \
	277	{ \
	278	.name = M68K_CPU_TYPE_NAME(cpu_model), \
	279	.instance_init = initfn, \
	280	.parent = TYPE_M68K_CPU, \
	281	}
11150915	282
f61797bd IM	283	static const TypeInfo m68k_cpus_type_infos[] = {
	284	{ /* base class should be registered first */
	285	.name = TYPE_M68K_CPU,
	286	.parent = TYPE_CPU,
	287	.instance_size = sizeof(M68kCPU),
	288	.instance_init = m68k_cpu_initfn,
	289	.abstract = true,
	290	.class_size = sizeof(M68kCPUClass),
	291	.class_init = m68k_cpu_class_init,
	292	},
	293	DEFINE_M68K_CPU_TYPE("m68000", m68000_cpu_initfn),
	294	DEFINE_M68K_CPU_TYPE("m68020", m68020_cpu_initfn),
	295	DEFINE_M68K_CPU_TYPE("m68030", m68030_cpu_initfn),
	296	DEFINE_M68K_CPU_TYPE("m68040", m68040_cpu_initfn),
	297	DEFINE_M68K_CPU_TYPE("m68060", m68060_cpu_initfn),
	298	DEFINE_M68K_CPU_TYPE("m5206", m5206_cpu_initfn),
	299	DEFINE_M68K_CPU_TYPE("m5208", m5208_cpu_initfn),
	300	DEFINE_M68K_CPU_TYPE("cfv4e", cfv4e_cpu_initfn),
	301	DEFINE_M68K_CPU_TYPE("any", any_cpu_initfn),
b9e7a234 AF	302	};
b9e7a234 AF	303
f61797bd	304	DEFINE_TYPES(m68k_cpus_type_infos)