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b9e7a234 AF |
1 | /* |
2 | * QEMU Motorola 68k CPU | |
3 | * | |
4 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2.1 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see | |
18 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
19 | */ | |
20 | ||
d8416665 | 21 | #include "qemu/osdep.h" |
da34e65c | 22 | #include "qapi/error.h" |
b9e7a234 | 23 | #include "cpu.h" |
087fe4f8 | 24 | #include "migration/vmstate.h" |
24f91e81 | 25 | #include "fpu/softfloat.h" |
b9e7a234 | 26 | |
e700604d AF |
27 | static void m68k_cpu_set_pc(CPUState *cs, vaddr value) |
28 | { | |
29 | M68kCPU *cpu = M68K_CPU(cs); | |
30 | ||
31 | cpu->env.pc = value; | |
32 | } | |
33 | ||
8c2e1b00 AF |
34 | static bool m68k_cpu_has_work(CPUState *cs) |
35 | { | |
36 | return cs->interrupt_request & CPU_INTERRUPT_HARD; | |
37 | } | |
38 | ||
11150915 AF |
39 | static void m68k_set_feature(CPUM68KState *env, int feature) |
40 | { | |
41 | env->features |= (1u << feature); | |
42 | } | |
43 | ||
4ecce5fb LMP |
44 | static void m68k_unset_feature(CPUM68KState *env, int feature) |
45 | { | |
46 | env->features &= (-1u - (1u << feature)); | |
47 | } | |
48 | ||
781c67ca | 49 | static void m68k_cpu_reset(DeviceState *dev) |
b9e7a234 | 50 | { |
781c67ca | 51 | CPUState *s = CPU(dev); |
b9e7a234 AF |
52 | M68kCPU *cpu = M68K_CPU(s); |
53 | M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); | |
54 | CPUM68KState *env = &cpu->env; | |
f83311e4 | 55 | floatx80 nan = floatx80_default_nan(NULL); |
f4a6ce51 | 56 | int i; |
b9e7a234 | 57 | |
781c67ca | 58 | mcc->parent_reset(dev); |
b9e7a234 | 59 | |
1f5c00cf | 60 | memset(env, 0, offsetof(CPUM68KState, end_reset_fields)); |
6e22b28e LV |
61 | #ifdef CONFIG_SOFTMMU |
62 | cpu_m68k_set_sr(env, SR_S | SR_I); | |
63 | #else | |
64 | cpu_m68k_set_sr(env, 0); | |
11c19868 | 65 | #endif |
f4a6ce51 | 66 | for (i = 0; i < 8; i++) { |
f83311e4 | 67 | env->fregs[i].d = nan; |
f4a6ce51 | 68 | } |
ba624944 | 69 | cpu_m68k_set_fpcr(env, 0); |
f4a6ce51 LV |
70 | env->fpsr = 0; |
71 | ||
11c19868 AF |
72 | /* TODO: We should set PC from the interrupt vector. */ |
73 | env->pc = 0; | |
b9e7a234 AF |
74 | } |
75 | ||
4d558f5d | 76 | static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info) |
4f669905 PC |
77 | { |
78 | info->print_insn = print_insn_m68k; | |
12629fcf | 79 | info->mach = 0; |
4f669905 PC |
80 | } |
81 | ||
11150915 AF |
82 | /* CPU models */ |
83 | ||
bc5b2da3 AF |
84 | static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model) |
85 | { | |
86 | ObjectClass *oc; | |
7a9f812b | 87 | char *typename; |
bc5b2da3 | 88 | |
f61797bd | 89 | typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model); |
7a9f812b AF |
90 | oc = object_class_by_name(typename); |
91 | g_free(typename); | |
cae85065 AF |
92 | if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL || |
93 | object_class_is_abstract(oc))) { | |
bc5b2da3 AF |
94 | return NULL; |
95 | } | |
96 | return oc; | |
97 | } | |
98 | ||
11150915 AF |
99 | static void m5206_cpu_initfn(Object *obj) |
100 | { | |
101 | M68kCPU *cpu = M68K_CPU(obj); | |
102 | CPUM68KState *env = &cpu->env; | |
103 | ||
104 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
105 | } | |
106 | ||
ee2fc6c6 | 107 | /* Base feature set, including isns. for m68k family */ |
f076803b LV |
108 | static void m68000_cpu_initfn(Object *obj) |
109 | { | |
110 | M68kCPU *cpu = M68K_CPU(obj); | |
111 | CPUM68KState *env = &cpu->env; | |
112 | ||
113 | m68k_set_feature(env, M68K_FEATURE_M68000); | |
114 | m68k_set_feature(env, M68K_FEATURE_USP); | |
115 | m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); | |
1226e212 | 116 | m68k_set_feature(env, M68K_FEATURE_MOVEP); |
f076803b LV |
117 | } |
118 | ||
4ecce5fb LMP |
119 | /* |
120 | * Adds BKPT, MOVE-from-SR *now priv instr, and MOVEC, MOVES, RTD | |
121 | */ | |
122 | static void m68010_cpu_initfn(Object *obj) | |
f076803b | 123 | { |
4ecce5fb LMP |
124 | M68kCPU *cpu = M68K_CPU(obj); |
125 | CPUM68KState *env = &cpu->env; | |
126 | ||
127 | m68000_cpu_initfn(obj); | |
128 | m68k_set_feature(env, M68K_FEATURE_M68010); | |
18059c9e | 129 | m68k_set_feature(env, M68K_FEATURE_RTD); |
4ecce5fb | 130 | m68k_set_feature(env, M68K_FEATURE_BKPT); |
8df0e6ae | 131 | m68k_set_feature(env, M68K_FEATURE_MOVEC); |
f076803b | 132 | } |
18b6102e | 133 | |
ee2fc6c6 LMP |
134 | /* |
135 | * Adds BFCHG, BFCLR, BFEXTS, BFEXTU, BFFFO, BFINS, BFSET, BFTST, CAS, CAS2, | |
136 | * CHK2, CMP2, DIVSL, DIVUL, EXTB, PACK, TRAPcc, UNPK. | |
137 | * | |
138 | * 68020/30 only: | |
139 | * CALLM, cpBcc, cpDBcc, cpGEN, cpRESTORE, cpSAVE, cpScc, cpTRAPcc | |
140 | */ | |
18b6102e LV |
141 | static void m68020_cpu_initfn(Object *obj) |
142 | { | |
143 | M68kCPU *cpu = M68K_CPU(obj); | |
144 | CPUM68KState *env = &cpu->env; | |
145 | ||
4ecce5fb LMP |
146 | m68010_cpu_initfn(obj); |
147 | m68k_unset_feature(env, M68K_FEATURE_M68010); | |
18b6102e | 148 | m68k_set_feature(env, M68K_FEATURE_M68020); |
4ecce5fb LMP |
149 | m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV); |
150 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
151 | m68k_set_feature(env, M68K_FEATURE_BCCL); | |
152 | m68k_set_feature(env, M68K_FEATURE_BITFIELD); | |
153 | m68k_set_feature(env, M68K_FEATURE_EXT_FULL); | |
154 | m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX); | |
155 | m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV); | |
156 | m68k_set_feature(env, M68K_FEATURE_FPU); | |
157 | m68k_set_feature(env, M68K_FEATURE_CAS); | |
158 | m68k_set_feature(env, M68K_FEATURE_CHK2); | |
7525a9b9 | 159 | m68k_set_feature(env, M68K_FEATURE_MSP); |
a9431a03 | 160 | m68k_set_feature(env, M68K_FEATURE_UNALIGNED_DATA); |
18b6102e LV |
161 | } |
162 | ||
ee2fc6c6 LMP |
163 | /* |
164 | * Adds: PFLUSH (*5) | |
165 | * 68030 Only: PFLUSHA (*5), PLOAD (*5), PMOVE | |
166 | * 68030/40 Only: PTEST | |
167 | * | |
168 | * NOTES: | |
169 | * 5. Not valid on MC68EC030 | |
170 | */ | |
18b6102e LV |
171 | static void m68030_cpu_initfn(Object *obj) |
172 | { | |
173 | M68kCPU *cpu = M68K_CPU(obj); | |
174 | CPUM68KState *env = &cpu->env; | |
175 | ||
4ecce5fb LMP |
176 | m68020_cpu_initfn(obj); |
177 | m68k_unset_feature(env, M68K_FEATURE_M68020); | |
18b6102e LV |
178 | m68k_set_feature(env, M68K_FEATURE_M68030); |
179 | } | |
9d4f0429 | 180 | |
ee2fc6c6 LMP |
181 | /* |
182 | * Adds: CINV, CPUSH | |
183 | * Adds all with Note *2: FABS, FSABS, FDABS, FADD, FSADD, FDADD, FBcc, FCMP, | |
184 | * FDBcc, FDIV, FSDIV, FDDIV, FMOVE, FSMOVE, FDMOVE, | |
185 | * FMOVEM, FMUL, FSMUL, FDMUL, FNEG, FSNEG, FDNEG, FNOP, | |
186 | * FRESTORE, FSAVE, FScc, FSQRT, FSSQRT, FDSQRT, FSUB, | |
187 | * FSSUB, FDSUB, FTRAPcc, FTST | |
188 | * | |
189 | * Adds with Notes *2, and *3: FACOS, FASIN, FATAN, FATANH, FCOS, FCOSH, FETOX, | |
190 | * FETOXM, FGETEXP, FGETMAN, FINT, FINTRZ, FLOG10, | |
191 | * FLOG2, FLOGN, FLOGNP1, FMOD, FMOVECR, FREM, | |
192 | * FSCALE, FSGLDIV, FSGLMUL, FSIN, FSINCOS, FSINH, | |
193 | * FTAN, FTANH, FTENTOX, FTWOTOX | |
194 | * NOTES: | |
195 | * 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060. | |
196 | * 3. These are software-supported instructions on the MC68040 and MC68060. | |
197 | */ | |
9d4f0429 LV |
198 | static void m68040_cpu_initfn(Object *obj) |
199 | { | |
200 | M68kCPU *cpu = M68K_CPU(obj); | |
201 | CPUM68KState *env = &cpu->env; | |
202 | ||
4ecce5fb LMP |
203 | m68030_cpu_initfn(obj); |
204 | m68k_unset_feature(env, M68K_FEATURE_M68030); | |
9d4f0429 LV |
205 | m68k_set_feature(env, M68K_FEATURE_M68040); |
206 | } | |
f076803b | 207 | |
ee2fc6c6 LMP |
208 | /* |
209 | * Adds: PLPA | |
210 | * Adds all with Note *2: CAS, CAS2, MULS, MULU, CHK2, CMP2, DIVS, DIVU | |
211 | * All Fxxxx instructions are as per m68040 with exception to; FMOVEM NOTE3 | |
212 | * | |
213 | * Does NOT implement MOVEP | |
214 | * | |
215 | * NOTES: | |
216 | * 2. Not applicable to the MC68EC040, MC68LC040, MC68EC060, and MC68LC060. | |
217 | * 3. These are software-supported instructions on the MC68040 and MC68060. | |
218 | */ | |
f076803b LV |
219 | static void m68060_cpu_initfn(Object *obj) |
220 | { | |
221 | M68kCPU *cpu = M68K_CPU(obj); | |
222 | CPUM68KState *env = &cpu->env; | |
223 | ||
4ecce5fb LMP |
224 | m68040_cpu_initfn(obj); |
225 | m68k_unset_feature(env, M68K_FEATURE_M68040); | |
18b6102e | 226 | m68k_set_feature(env, M68K_FEATURE_M68060); |
4ecce5fb LMP |
227 | m68k_unset_feature(env, M68K_FEATURE_MOVEP); |
228 | ||
229 | /* Implemented as a software feature */ | |
230 | m68k_unset_feature(env, M68K_FEATURE_QUAD_MULDIV); | |
f076803b LV |
231 | } |
232 | ||
11150915 AF |
233 | static void m5208_cpu_initfn(Object *obj) |
234 | { | |
235 | M68kCPU *cpu = M68K_CPU(obj); | |
236 | CPUM68KState *env = &cpu->env; | |
237 | ||
238 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
239 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); | |
240 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
241 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
242 | m68k_set_feature(env, M68K_FEATURE_USP); | |
243 | } | |
244 | ||
245 | static void cfv4e_cpu_initfn(Object *obj) | |
246 | { | |
247 | M68kCPU *cpu = M68K_CPU(obj); | |
248 | CPUM68KState *env = &cpu->env; | |
249 | ||
250 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
251 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
252 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
253 | m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
254 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); | |
255 | m68k_set_feature(env, M68K_FEATURE_USP); | |
256 | } | |
257 | ||
258 | static void any_cpu_initfn(Object *obj) | |
259 | { | |
260 | M68kCPU *cpu = M68K_CPU(obj); | |
261 | CPUM68KState *env = &cpu->env; | |
262 | ||
263 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); | |
264 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); | |
265 | m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); | |
266 | m68k_set_feature(env, M68K_FEATURE_BRAL); | |
267 | m68k_set_feature(env, M68K_FEATURE_CF_FPU); | |
808d77bc LMP |
268 | /* |
269 | * MAC and EMAC are mututally exclusive, so pick EMAC. | |
270 | * It's mostly backwards compatible. | |
271 | */ | |
11150915 AF |
272 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC); |
273 | m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B); | |
274 | m68k_set_feature(env, M68K_FEATURE_USP); | |
275 | m68k_set_feature(env, M68K_FEATURE_EXT_FULL); | |
276 | m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); | |
277 | } | |
278 | ||
6d1bbc62 AF |
279 | static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) |
280 | { | |
14a10fc3 | 281 | CPUState *cs = CPU(dev); |
6d1bbc62 AF |
282 | M68kCPU *cpu = M68K_CPU(dev); |
283 | M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev); | |
ce5b1bbf LV |
284 | Error *local_err = NULL; |
285 | ||
f47cf4e3 IM |
286 | register_m68k_insns(&cpu->env); |
287 | ||
ce5b1bbf LV |
288 | cpu_exec_realizefn(cs, &local_err); |
289 | if (local_err != NULL) { | |
290 | error_propagate(errp, local_err); | |
291 | return; | |
292 | } | |
6d1bbc62 AF |
293 | |
294 | m68k_cpu_init_gdb(cpu); | |
295 | ||
14a10fc3 AF |
296 | cpu_reset(cs); |
297 | qemu_init_vcpu(cs); | |
6d1bbc62 AF |
298 | |
299 | mcc->parent_realize(dev, errp); | |
300 | } | |
301 | ||
9b706039 AF |
302 | static void m68k_cpu_initfn(Object *obj) |
303 | { | |
304 | M68kCPU *cpu = M68K_CPU(obj); | |
9b706039 | 305 | |
7506ed90 | 306 | cpu_set_cpustate_pointers(cpu); |
9b706039 AF |
307 | } |
308 | ||
d21f73c6 LV |
309 | #if defined(CONFIG_SOFTMMU) |
310 | static bool fpu_needed(void *opaque) | |
311 | { | |
312 | M68kCPU *s = opaque; | |
313 | ||
314 | return m68k_feature(&s->env, M68K_FEATURE_CF_FPU) || | |
315 | m68k_feature(&s->env, M68K_FEATURE_FPU); | |
316 | } | |
317 | ||
318 | typedef struct m68k_FPReg_tmp { | |
319 | FPReg *parent; | |
320 | uint64_t tmp_mant; | |
321 | uint16_t tmp_exp; | |
322 | } m68k_FPReg_tmp; | |
323 | ||
324 | static void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f) | |
325 | { | |
326 | CPU_LDoubleU temp; | |
327 | ||
328 | temp.d = f; | |
329 | *pmant = temp.l.lower; | |
330 | *pexp = temp.l.upper; | |
331 | } | |
332 | ||
333 | static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper) | |
334 | { | |
335 | CPU_LDoubleU temp; | |
336 | ||
337 | temp.l.upper = upper; | |
338 | temp.l.lower = mant; | |
339 | return temp.d; | |
340 | } | |
341 | ||
342 | static int freg_pre_save(void *opaque) | |
343 | { | |
344 | m68k_FPReg_tmp *tmp = opaque; | |
345 | ||
346 | cpu_get_fp80(&tmp->tmp_mant, &tmp->tmp_exp, tmp->parent->d); | |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
351 | static int freg_post_load(void *opaque, int version) | |
352 | { | |
353 | m68k_FPReg_tmp *tmp = opaque; | |
354 | ||
355 | tmp->parent->d = cpu_set_fp80(tmp->tmp_mant, tmp->tmp_exp); | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
360 | static const VMStateDescription vmstate_freg_tmp = { | |
361 | .name = "freg_tmp", | |
362 | .post_load = freg_post_load, | |
363 | .pre_save = freg_pre_save, | |
364 | .fields = (VMStateField[]) { | |
365 | VMSTATE_UINT64(tmp_mant, m68k_FPReg_tmp), | |
366 | VMSTATE_UINT16(tmp_exp, m68k_FPReg_tmp), | |
367 | VMSTATE_END_OF_LIST() | |
368 | } | |
369 | }; | |
370 | ||
371 | static const VMStateDescription vmstate_freg = { | |
372 | .name = "freg", | |
373 | .fields = (VMStateField[]) { | |
374 | VMSTATE_WITH_TMP(FPReg, m68k_FPReg_tmp, vmstate_freg_tmp), | |
375 | VMSTATE_END_OF_LIST() | |
376 | } | |
377 | }; | |
378 | ||
379 | static int fpu_post_load(void *opaque, int version) | |
380 | { | |
381 | M68kCPU *s = opaque; | |
382 | ||
383 | cpu_m68k_restore_fp_status(&s->env); | |
384 | ||
385 | return 0; | |
386 | } | |
387 | ||
388 | const VMStateDescription vmmstate_fpu = { | |
389 | .name = "cpu/fpu", | |
390 | .version_id = 1, | |
391 | .minimum_version_id = 1, | |
392 | .needed = fpu_needed, | |
393 | .post_load = fpu_post_load, | |
394 | .fields = (VMStateField[]) { | |
395 | VMSTATE_UINT32(env.fpcr, M68kCPU), | |
396 | VMSTATE_UINT32(env.fpsr, M68kCPU), | |
397 | VMSTATE_STRUCT_ARRAY(env.fregs, M68kCPU, 8, 0, vmstate_freg, FPReg), | |
398 | VMSTATE_STRUCT(env.fp_result, M68kCPU, 0, vmstate_freg, FPReg), | |
399 | VMSTATE_END_OF_LIST() | |
400 | } | |
401 | }; | |
402 | ||
403 | static bool cf_spregs_needed(void *opaque) | |
404 | { | |
405 | M68kCPU *s = opaque; | |
406 | ||
407 | return m68k_feature(&s->env, M68K_FEATURE_CF_ISA_A); | |
408 | } | |
409 | ||
410 | const VMStateDescription vmstate_cf_spregs = { | |
411 | .name = "cpu/cf_spregs", | |
412 | .version_id = 1, | |
413 | .minimum_version_id = 1, | |
414 | .needed = cf_spregs_needed, | |
415 | .fields = (VMStateField[]) { | |
416 | VMSTATE_UINT64_ARRAY(env.macc, M68kCPU, 4), | |
417 | VMSTATE_UINT32(env.macsr, M68kCPU), | |
418 | VMSTATE_UINT32(env.mac_mask, M68kCPU), | |
419 | VMSTATE_UINT32(env.rambar0, M68kCPU), | |
420 | VMSTATE_UINT32(env.mbar, M68kCPU), | |
421 | VMSTATE_END_OF_LIST() | |
422 | } | |
423 | }; | |
424 | ||
425 | static bool cpu_68040_mmu_needed(void *opaque) | |
426 | { | |
427 | M68kCPU *s = opaque; | |
428 | ||
429 | return m68k_feature(&s->env, M68K_FEATURE_M68040); | |
430 | } | |
431 | ||
432 | const VMStateDescription vmstate_68040_mmu = { | |
433 | .name = "cpu/68040_mmu", | |
434 | .version_id = 1, | |
435 | .minimum_version_id = 1, | |
436 | .needed = cpu_68040_mmu_needed, | |
437 | .fields = (VMStateField[]) { | |
438 | VMSTATE_UINT32(env.mmu.ar, M68kCPU), | |
439 | VMSTATE_UINT32(env.mmu.ssw, M68kCPU), | |
440 | VMSTATE_UINT16(env.mmu.tcr, M68kCPU), | |
441 | VMSTATE_UINT32(env.mmu.urp, M68kCPU), | |
442 | VMSTATE_UINT32(env.mmu.srp, M68kCPU), | |
443 | VMSTATE_BOOL(env.mmu.fault, M68kCPU), | |
444 | VMSTATE_UINT32_ARRAY(env.mmu.ttr, M68kCPU, 4), | |
445 | VMSTATE_UINT32(env.mmu.mmusr, M68kCPU), | |
446 | VMSTATE_END_OF_LIST() | |
447 | } | |
448 | }; | |
449 | ||
450 | static bool cpu_68040_spregs_needed(void *opaque) | |
451 | { | |
452 | M68kCPU *s = opaque; | |
453 | ||
454 | return m68k_feature(&s->env, M68K_FEATURE_M68040); | |
455 | } | |
456 | ||
457 | const VMStateDescription vmstate_68040_spregs = { | |
458 | .name = "cpu/68040_spregs", | |
459 | .version_id = 1, | |
460 | .minimum_version_id = 1, | |
461 | .needed = cpu_68040_spregs_needed, | |
462 | .fields = (VMStateField[]) { | |
463 | VMSTATE_UINT32(env.vbr, M68kCPU), | |
464 | VMSTATE_UINT32(env.cacr, M68kCPU), | |
465 | VMSTATE_UINT32(env.sfc, M68kCPU), | |
466 | VMSTATE_UINT32(env.dfc, M68kCPU), | |
467 | VMSTATE_END_OF_LIST() | |
468 | } | |
469 | }; | |
470 | ||
087fe4f8 AF |
471 | static const VMStateDescription vmstate_m68k_cpu = { |
472 | .name = "cpu", | |
d21f73c6 LV |
473 | .version_id = 1, |
474 | .minimum_version_id = 1, | |
475 | .fields = (VMStateField[]) { | |
476 | VMSTATE_UINT32_ARRAY(env.dregs, M68kCPU, 8), | |
477 | VMSTATE_UINT32_ARRAY(env.aregs, M68kCPU, 8), | |
478 | VMSTATE_UINT32(env.pc, M68kCPU), | |
479 | VMSTATE_UINT32(env.sr, M68kCPU), | |
480 | VMSTATE_INT32(env.current_sp, M68kCPU), | |
481 | VMSTATE_UINT32_ARRAY(env.sp, M68kCPU, 3), | |
482 | VMSTATE_UINT32(env.cc_op, M68kCPU), | |
483 | VMSTATE_UINT32(env.cc_x, M68kCPU), | |
484 | VMSTATE_UINT32(env.cc_n, M68kCPU), | |
485 | VMSTATE_UINT32(env.cc_v, M68kCPU), | |
486 | VMSTATE_UINT32(env.cc_c, M68kCPU), | |
487 | VMSTATE_UINT32(env.cc_z, M68kCPU), | |
488 | VMSTATE_INT32(env.pending_vector, M68kCPU), | |
489 | VMSTATE_INT32(env.pending_level, M68kCPU), | |
490 | VMSTATE_END_OF_LIST() | |
491 | }, | |
492 | .subsections = (const VMStateDescription * []) { | |
493 | &vmmstate_fpu, | |
494 | &vmstate_cf_spregs, | |
495 | &vmstate_68040_mmu, | |
496 | &vmstate_68040_spregs, | |
497 | NULL | |
498 | }, | |
087fe4f8 | 499 | }; |
d21f73c6 | 500 | #endif |
087fe4f8 | 501 | |
8b80bd28 PMD |
502 | #ifndef CONFIG_USER_ONLY |
503 | #include "hw/core/sysemu-cpu-ops.h" | |
504 | ||
505 | static const struct SysemuCPUOps m68k_sysemu_ops = { | |
08928c6d | 506 | .get_phys_page_debug = m68k_cpu_get_phys_page_debug, |
8b80bd28 PMD |
507 | }; |
508 | #endif | |
509 | ||
78271684 CF |
510 | #include "hw/core/tcg-cpu-ops.h" |
511 | ||
11906557 | 512 | static const struct TCGCPUOps m68k_tcg_ops = { |
78271684 | 513 | .initialize = m68k_tcg_init, |
78271684 CF |
514 | |
515 | #ifndef CONFIG_USER_ONLY | |
028772c4 | 516 | .tlb_fill = m68k_cpu_tlb_fill, |
d5db810c | 517 | .cpu_exec_interrupt = m68k_cpu_exec_interrupt, |
78271684 CF |
518 | .do_interrupt = m68k_cpu_do_interrupt, |
519 | .do_transaction_failed = m68k_cpu_transaction_failed, | |
520 | #endif /* !CONFIG_USER_ONLY */ | |
521 | }; | |
522 | ||
b9e7a234 AF |
523 | static void m68k_cpu_class_init(ObjectClass *c, void *data) |
524 | { | |
525 | M68kCPUClass *mcc = M68K_CPU_CLASS(c); | |
526 | CPUClass *cc = CPU_CLASS(c); | |
087fe4f8 | 527 | DeviceClass *dc = DEVICE_CLASS(c); |
b9e7a234 | 528 | |
bf853881 PMD |
529 | device_class_set_parent_realize(dc, m68k_cpu_realizefn, |
530 | &mcc->parent_realize); | |
781c67ca | 531 | device_class_set_parent_reset(dc, m68k_cpu_reset, &mcc->parent_reset); |
bc5b2da3 AF |
532 | |
533 | cc->class_by_name = m68k_cpu_class_by_name; | |
8c2e1b00 | 534 | cc->has_work = m68k_cpu_has_work; |
878096ee | 535 | cc->dump_state = m68k_cpu_dump_state; |
e700604d | 536 | cc->set_pc = m68k_cpu_set_pc; |
5b50e790 AF |
537 | cc->gdb_read_register = m68k_cpu_gdb_read_register; |
538 | cc->gdb_write_register = m68k_cpu_gdb_write_register; | |
88b2fef6 | 539 | #if defined(CONFIG_SOFTMMU) |
d21f73c6 | 540 | dc->vmsd = &vmstate_m68k_cpu; |
8b80bd28 | 541 | cc->sysemu_ops = &m68k_sysemu_ops; |
00b941e5 | 542 | #endif |
4f669905 | 543 | cc->disas_set_info = m68k_cpu_disas_set_info; |
00f3fd63 | 544 | |
a0e372f0 | 545 | cc->gdb_num_core_regs = 18; |
78271684 | 546 | cc->tcg_ops = &m68k_tcg_ops; |
b9e7a234 AF |
547 | } |
548 | ||
a976ed3f KF |
549 | static void m68k_cpu_class_init_cf_core(ObjectClass *c, void *data) |
550 | { | |
551 | CPUClass *cc = CPU_CLASS(c); | |
552 | ||
553 | cc->gdb_core_xml_file = "cf-core.xml"; | |
554 | } | |
555 | ||
556 | #define DEFINE_M68K_CPU_TYPE_CF(model) \ | |
557 | { \ | |
558 | .name = M68K_CPU_TYPE_NAME(#model), \ | |
559 | .instance_init = model##_cpu_initfn, \ | |
560 | .parent = TYPE_M68K_CPU, \ | |
561 | .class_init = m68k_cpu_class_init_cf_core \ | |
562 | } | |
563 | ||
564 | static void m68k_cpu_class_init_m68k_core(ObjectClass *c, void *data) | |
565 | { | |
566 | CPUClass *cc = CPU_CLASS(c); | |
567 | ||
568 | cc->gdb_core_xml_file = "m68k-core.xml"; | |
569 | } | |
570 | ||
571 | #define DEFINE_M68K_CPU_TYPE_M68K(model) \ | |
572 | { \ | |
573 | .name = M68K_CPU_TYPE_NAME(#model), \ | |
574 | .instance_init = model##_cpu_initfn, \ | |
575 | .parent = TYPE_M68K_CPU, \ | |
576 | .class_init = m68k_cpu_class_init_m68k_core \ | |
f61797bd | 577 | } |
11150915 | 578 | |
f61797bd IM |
579 | static const TypeInfo m68k_cpus_type_infos[] = { |
580 | { /* base class should be registered first */ | |
581 | .name = TYPE_M68K_CPU, | |
582 | .parent = TYPE_CPU, | |
583 | .instance_size = sizeof(M68kCPU), | |
584 | .instance_init = m68k_cpu_initfn, | |
585 | .abstract = true, | |
586 | .class_size = sizeof(M68kCPUClass), | |
587 | .class_init = m68k_cpu_class_init, | |
588 | }, | |
a976ed3f | 589 | DEFINE_M68K_CPU_TYPE_M68K(m68000), |
4ecce5fb | 590 | DEFINE_M68K_CPU_TYPE_M68K(m68010), |
a976ed3f KF |
591 | DEFINE_M68K_CPU_TYPE_M68K(m68020), |
592 | DEFINE_M68K_CPU_TYPE_M68K(m68030), | |
593 | DEFINE_M68K_CPU_TYPE_M68K(m68040), | |
594 | DEFINE_M68K_CPU_TYPE_M68K(m68060), | |
595 | DEFINE_M68K_CPU_TYPE_CF(m5206), | |
596 | DEFINE_M68K_CPU_TYPE_CF(m5208), | |
597 | DEFINE_M68K_CPU_TYPE_CF(cfv4e), | |
598 | DEFINE_M68K_CPU_TYPE_CF(any), | |
b9e7a234 AF |
599 | }; |
600 | ||
f61797bd | 601 | DEFINE_TYPES(m68k_cpus_type_infos) |