]> git.proxmox.com Git - mirror_qemu.git/blame - target/meson.build
target/arm: Fix SCR RES1 handling
[mirror_qemu.git] / target / meson.build
CommitLineData
abff1abf
PB
1subdir('alpha')
2subdir('arm')
3subdir('avr')
4subdir('cris')
5subdir('hppa')
6subdir('i386')
7subdir('lm32')
8subdir('m68k')
9subdir('microblaze')
10subdir('mips')
11subdir('moxie')
12subdir('nios2')
13subdir('openrisc')
14subdir('ppc')
15subdir('riscv')
16subdir('rx')
d3b18480 17subdir('s390x')
abff1abf
PB
18subdir('sh4')
19subdir('sparc')
20subdir('tilegx')
21subdir('tricore')
22subdir('unicore32')
23subdir('xtensa')