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target/ppc: Implement Vector Extract Double to VSR using GPR index insns
[mirror_qemu.git] / target / ppc / int_helper.c
CommitLineData
64654ded
BS		 1/*
2 * PowerPC integer and vector emulation helpers for QEMU.
3 *
4 * Copyright (c) 2003-2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
6bd039cd 9 * version 2.1 of the License, or (at your option) any later version.
64654ded
BS		 10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
db725815 19
0d75590d 20#include "qemu/osdep.h"
64654ded 21#include "cpu.h"
3e00884f 22#include "internal.h"
1de7afc9 23#include "qemu/host-utils.h"
db725815 24#include "qemu/main-loop.h"
8a05fd9a 25#include "qemu/log.h"
2ef6175a 26#include "exec/helper-proto.h"
6f2945cd 27#include "crypto/aes.h"
24f91e81 28#include "fpu/softfloat.h"
3f74b632
RH		 29#include "qapi/error.h"
30#include "qemu/guest-random.h"
64654ded
BS		 31
32#include "helper_regs.h"
33/*****************************************************************************/
34/* Fixed point operations helpers */
64654ded 35
f32899de
ND		 36static inline void helper_update_ov_legacy(CPUPPCState *env, int ov)
37{
38 if (unlikely(ov)) {
39 env->so = env->ov = 1;
40 } else {
41 env->ov = 0;
42 }
43}
44
6a4fda33
TM		 45target_ulong helper_divweu(CPUPPCState *env, target_ulong ra, target_ulong rb,
46 uint32_t oe)
47{
48 uint64_t rt = 0;
49 int overflow = 0;
50
51 uint64_t dividend = (uint64_t)ra << 32;
52 uint64_t divisor = (uint32_t)rb;
53
54 if (unlikely(divisor == 0)) {
55 overflow = 1;
56 } else {
57 rt = dividend / divisor;
58 overflow = rt > UINT32_MAX;
59 }
60
61 if (unlikely(overflow)) {
62 rt = 0; /* Undefined */
63 }
64
65 if (oe) {
f32899de 66 helper_update_ov_legacy(env, overflow);
6a4fda33
TM		 67 }
68
69 return (target_ulong)rt;
70}
71
a98eb9e9
TM		 72target_ulong helper_divwe(CPUPPCState *env, target_ulong ra, target_ulong rb,
73 uint32_t oe)
74{
75 int64_t rt = 0;
76 int overflow = 0;
77
78 int64_t dividend = (int64_t)ra << 32;
79 int64_t divisor = (int64_t)((int32_t)rb);
80
81 if (unlikely((divisor == 0) ||
82 ((divisor == -1ull) && (dividend == INT64_MIN)))) {
83 overflow = 1;
84 } else {
85 rt = dividend / divisor;
86 overflow = rt != (int32_t)rt;
87 }
88
89 if (unlikely(overflow)) {
90 rt = 0; /* Undefined */
91 }
92
93 if (oe) {
f32899de 94 helper_update_ov_legacy(env, overflow);
a98eb9e9
TM		 95 }
96
97 return (target_ulong)rt;
98}
99
98d1eb27
TM		 100#if defined(TARGET_PPC64)
101
102uint64_t helper_divdeu(CPUPPCState *env, uint64_t ra, uint64_t rb, uint32_t oe)
103{
104 uint64_t rt = 0;
105 int overflow = 0;
106
9276a31c
LP		 107 if (unlikely(rb == 0 || ra >= rb)) {
108 overflow = 1;
98d1eb27 109 rt = 0; /* Undefined */
9276a31c
LP		 110 } else {
111 divu128(&rt, &ra, rb);
98d1eb27
TM		 112 }
113
114 if (oe) {
f32899de 115 helper_update_ov_legacy(env, overflow);
98d1eb27
TM		 116 }
117
118 return rt;
119}
120
e44259b6
TM		 121uint64_t helper_divde(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32_t oe)
122{
40f3e79a 123 uint64_t rt = 0;
e44259b6
TM		 124 int64_t ra = (int64_t)rau;
125 int64_t rb = (int64_t)rbu;
9276a31c 126 int overflow = 0;
e44259b6 127
9276a31c
LP		 128 if (unlikely(rb == 0 || uabs64(ra) >= uabs64(rb))) {
129 overflow = 1;
e44259b6 130 rt = 0; /* Undefined */
9276a31c
LP		 131 } else {
132 divs128(&rt, &ra, rb);
e44259b6
TM		 133 }
134
135 if (oe) {
f32899de 136 helper_update_ov_legacy(env, overflow);
e44259b6
TM		 137 }
138
139 return rt;
140}
141
98d1eb27
TM		 142#endif
143
144
64654ded 145#if defined(TARGET_PPC64)
082ce330
ND		 146/* if x = 0xab, returns 0xababababababababa */
147#define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff))
148
b6cb41b2
DG		 149/*
150 * subtract 1 from each byte, and with inverse, check if MSB is set at each
082ce330
ND		 151 * byte.
152 * i.e. ((0x00 - 0x01) & ~(0x00)) & 0x80
153 * (0xFF & 0xFF) & 0x80 = 0x80 (zero found)
154 */
155#define haszero(v) (((v) - pattern(0x01)) & ~(v) & pattern(0x80))
156
157/* When you XOR the pattern and there is a match, that byte will be zero */
158#define hasvalue(x, n) (haszero((x) ^ pattern(n)))
159
160uint32_t helper_cmpeqb(target_ulong ra, target_ulong rb)
161{
efa73196 162 return hasvalue(rb, ra) ? CRF_GT : 0;
082ce330
ND		 163}
164
165#undef pattern
166#undef haszero
167#undef hasvalue
168
b6cb41b2 169/*
3f74b632 170 * Return a random number.
fec5c62a 171 */
3f74b632 172uint64_t helper_darn32(void)
fec5c62a 173{
3f74b632
RH		 174 Error *err = NULL;
175 uint32_t ret;
176
177 if (qemu_guest_getrandom(&ret, sizeof(ret), &err) < 0) {
178 qemu_log_mask(LOG_UNIMP, "darn: Crypto failure: %s",
179 error_get_pretty(err));
180 error_free(err);
181 return -1;
182 }
fec5c62a 183
3f74b632 184 return ret;
fec5c62a
RB		 185}
186
3f74b632
RH		 187uint64_t helper_darn64(void)
188{
189 Error *err = NULL;
190 uint64_t ret;
191
192 if (qemu_guest_getrandom(&ret, sizeof(ret), &err) < 0) {
193 qemu_log_mask(LOG_UNIMP, "darn: Crypto failure: %s",
194 error_get_pretty(err));
195 error_free(err);
196 return -1;
197 }
64654ded 198
3f74b632
RH		 199 return ret;
200}
86ba37ed
TM		 201
202uint64_t helper_bpermd(uint64_t rs, uint64_t rb)
203{
204 int i;
205 uint64_t ra = 0;
206
207 for (i = 0; i < 8; i++) {
b6cb41b2 208 int index = (rs >> (i * 8)) & 0xFF;
86ba37ed 209 if (index < 64) {
a6a444a8 210 if (rb & PPC_BIT(index)) {
86ba37ed
TM		 211 ra |= 1 << i;
212 }
213 }
214 }
215 return ra;
216}
217
218#endif
219
fcfda20f
AJ		 220target_ulong helper_cmpb(target_ulong rs, target_ulong rb)
221{
222 target_ulong mask = 0xff;
223 target_ulong ra = 0;
224 int i;
225
226 for (i = 0; i < sizeof(target_ulong); i++) {
227 if ((rs & mask) == (rb & mask)) {
228 ra |= mask;
229 }
230 mask <<= 8;
231 }
232 return ra;
233}
234
64654ded 235/* shift right arithmetic helper */
d15f74fb
BS		 236target_ulong helper_sraw(CPUPPCState *env, target_ulong value,
237 target_ulong shift)
64654ded
BS		 238{
239 int32_t ret;
240
241 if (likely(!(shift & 0x20))) {
242 if (likely((uint32_t)shift != 0)) {
243 shift &= 0x1f;
244 ret = (int32_t)value >> shift;
245 if (likely(ret >= 0 || (value & ((1 << shift) - 1)) == 0)) {
af1c259f 246 env->ca32 = env->ca = 0;
64654ded 247 } else {
af1c259f 248 env->ca32 = env->ca = 1;
64654ded
BS		 249 }
250 } else {
251 ret = (int32_t)value;
af1c259f 252 env->ca32 = env->ca = 0;
64654ded
BS		 253 }
254 } else {
255 ret = (int32_t)value >> 31;
af1c259f 256 env->ca32 = env->ca = (ret != 0);
64654ded
BS		 257 }
258 return (target_long)ret;
259}
260
261#if defined(TARGET_PPC64)
d15f74fb
BS		 262target_ulong helper_srad(CPUPPCState *env, target_ulong value,
263 target_ulong shift)
64654ded
BS		 264{
265 int64_t ret;
266
267 if (likely(!(shift & 0x40))) {
268 if (likely((uint64_t)shift != 0)) {
269 shift &= 0x3f;
270 ret = (int64_t)value >> shift;
4bc02e23 271 if (likely(ret >= 0 || (value & ((1ULL << shift) - 1)) == 0)) {
af1c259f 272 env->ca32 = env->ca = 0;
64654ded 273 } else {
af1c259f 274 env->ca32 = env->ca = 1;
64654ded
BS		 275 }
276 } else {
277 ret = (int64_t)value;
af1c259f 278 env->ca32 = env->ca = 0;
64654ded
BS		 279 }
280 } else {
281 ret = (int64_t)value >> 63;
af1c259f 282 env->ca32 = env->ca = (ret != 0);
64654ded
BS		 283 }
284 return ret;
285}
286#endif
287
288#if defined(TARGET_PPC64)
289target_ulong helper_popcntb(target_ulong val)
290{
79770002 291 /* Note that we don't fold past bytes */
64654ded
BS		 292 val = (val & 0x5555555555555555ULL) + ((val >> 1) &
293 0x5555555555555555ULL);
294 val = (val & 0x3333333333333333ULL) + ((val >> 2) &
295 0x3333333333333333ULL);
296 val = (val & 0x0f0f0f0f0f0f0f0fULL) + ((val >> 4) &
297 0x0f0f0f0f0f0f0f0fULL);
298 return val;
299}
300
301target_ulong helper_popcntw(target_ulong val)
302{
79770002 303 /* Note that we don't fold past words. */
64654ded
BS		 304 val = (val & 0x5555555555555555ULL) + ((val >> 1) &
305 0x5555555555555555ULL);
306 val = (val & 0x3333333333333333ULL) + ((val >> 2) &
307 0x3333333333333333ULL);
308 val = (val & 0x0f0f0f0f0f0f0f0fULL) + ((val >> 4) &
309 0x0f0f0f0f0f0f0f0fULL);
310 val = (val & 0x00ff00ff00ff00ffULL) + ((val >> 8) &
311 0x00ff00ff00ff00ffULL);
312 val = (val & 0x0000ffff0000ffffULL) + ((val >> 16) &
313 0x0000ffff0000ffffULL);
314 return val;
315}
64654ded
BS		 316#else
317target_ulong helper_popcntb(target_ulong val)
318{
79770002 319 /* Note that we don't fold past bytes */
64654ded
BS		 320 val = (val & 0x55555555) + ((val >> 1) & 0x55555555);
321 val = (val & 0x33333333) + ((val >> 2) & 0x33333333);
322 val = (val & 0x0f0f0f0f) + ((val >> 4) & 0x0f0f0f0f);
323 return val;
324}
64654ded
BS		 325#endif
326
6e0bbc40 327uint64_t helper_CFUGED(uint64_t src, uint64_t mask)
89ccd7dc
MF		 328{
329 /*
330 * Instead of processing the mask bit-by-bit from the most significant to
331 * the least significant bit, as described in PowerISA, we'll handle it in
332 * blocks of 'n' zeros/ones from LSB to MSB. To avoid the decision to use
333 * ctz or cto, we negate the mask at the end of the loop.
334 */
335 target_ulong m, left = 0, right = 0;
336 unsigned int n, i = 64;
337 bool bit = false; /* tracks if we are processing zeros or ones */
338
339 if (mask == 0 || mask == -1) {
340 return src;
341 }
342
343 /* Processes the mask in blocks, from LSB to MSB */
344 while (i) {
345 /* Find how many bits we should take */
346 n = ctz64(mask);
347 if (n > i) {
348 n = i;
349 }
350
351 /*
352 * Extracts 'n' trailing bits of src and put them on the leading 'n'
353 * bits of 'right' or 'left', pushing down the previously extracted
354 * values.
355 */
356 m = (1ll << n) - 1;
357 if (bit) {
358 right = ror64(right | (src & m), n);
359 } else {
360 left = ror64(left | (src & m), n);
361 }
362
363 /*
364 * Discards the processed bits from 'src' and 'mask'. Note that we are
365 * removing 'n' trailing zeros from 'mask', but the logical shift will
366 * add 'n' leading zeros back, so the population count of 'mask' is kept
367 * the same.
368 */
369 src >>= n;
370 mask >>= n;
371 i -= n;
372 bit = !bit;
373 mask = ~mask;
374 }
375
376 /*
377 * At the end, right was ror'ed ctpop(mask) times. To put it back in place,
378 * we'll shift it more 64-ctpop(mask) times.
379 */
380 if (bit) {
381 n = ctpop64(mask);
382 } else {
383 n = 64 - ctpop64(mask);
384 }
385
386 return left | (right >> n);
387}
388
21ba6e58
MF		 389uint64_t helper_PDEPD(uint64_t src, uint64_t mask)
390{
391 int i, o;
392 uint64_t result = 0;
393
394 if (mask == -1) {
395 return src;
396 }
397
398 for (i = 0; mask != 0; i++) {
399 o = ctz64(mask);
400 mask &= mask - 1;
401 result |= ((src >> i) & 1) << o;
402 }
403
404 return result;
405}
8bdb7606
MF		 406
407uint64_t helper_PEXTD(uint64_t src, uint64_t mask)
408{
409 int i, o;
410 uint64_t result = 0;
411
412 if (mask == -1) {
413 return src;
414 }
415
416 for (o = 0; mask != 0; o++) {
417 i = ctz64(mask);
418 mask &= mask - 1;
419 result |= ((src >> i) & 1) << o;
420 }
421
422 return result;
423}
21ba6e58 424
64654ded
BS		 425/*****************************************************************************/
426/* PowerPC 601 specific instructions (POWER bridge) */
d15f74fb 427target_ulong helper_div(CPUPPCState *env, target_ulong arg1, target_ulong arg2)
64654ded
BS		 428{
429 uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ];
430
431 if (((int32_t)tmp == INT32_MIN && (int32_t)arg2 == (int32_t)-1) ||
432 (int32_t)arg2 == 0) {
433 env->spr[SPR_MQ] = 0;
434 return INT32_MIN;
435 } else {
436 env->spr[SPR_MQ] = tmp % arg2;
437 return tmp / (int32_t)arg2;
438 }
439}
440
d15f74fb
BS		 441target_ulong helper_divo(CPUPPCState *env, target_ulong arg1,
442 target_ulong arg2)
64654ded
BS		 443{
444 uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ];
445
446 if (((int32_t)tmp == INT32_MIN && (int32_t)arg2 == (int32_t)-1) ||
447 (int32_t)arg2 == 0) {
da91a00f 448 env->so = env->ov = 1;
64654ded
BS		 449 env->spr[SPR_MQ] = 0;
450 return INT32_MIN;
451 } else {
452 env->spr[SPR_MQ] = tmp % arg2;
453 tmp /= (int32_t)arg2;
454 if ((int32_t)tmp != tmp) {
da91a00f 455 env->so = env->ov = 1;
64654ded 456 } else {
da91a00f 457 env->ov = 0;
64654ded
BS		 458 }
459 return tmp;
460 }
461}
462
d15f74fb
BS		 463target_ulong helper_divs(CPUPPCState *env, target_ulong arg1,
464 target_ulong arg2)
64654ded
BS		 465{
466 if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) ||
467 (int32_t)arg2 == 0) {
468 env->spr[SPR_MQ] = 0;
469 return INT32_MIN;
470 } else {
471 env->spr[SPR_MQ] = (int32_t)arg1 % (int32_t)arg2;
472 return (int32_t)arg1 / (int32_t)arg2;
473 }
474}
475
d15f74fb
BS		 476target_ulong helper_divso(CPUPPCState *env, target_ulong arg1,
477 target_ulong arg2)
64654ded
BS		 478{
479 if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) ||
480 (int32_t)arg2 == 0) {
da91a00f 481 env->so = env->ov = 1;
64654ded
BS		 482 env->spr[SPR_MQ] = 0;
483 return INT32_MIN;
484 } else {
da91a00f 485 env->ov = 0;
64654ded
BS		 486 env->spr[SPR_MQ] = (int32_t)arg1 % (int32_t)arg2;
487 return (int32_t)arg1 / (int32_t)arg2;
488 }
489}
490
491/*****************************************************************************/
492/* 602 specific instructions */
493/* mfrom is the most crazy instruction ever seen, imho ! */
494/* Real implementation uses a ROM table. Do the same */
b6cb41b2
DG		 495/*
496 * Extremely decomposed:
64654ded
BS		 497 * -arg / 256
498 * return 256 * log10(10 + 1.0) + 0.5
499 */
500#if !defined(CONFIG_USER_ONLY)
501target_ulong helper_602_mfrom(target_ulong arg)
502{
503 if (likely(arg < 602)) {
139c1837 504#include "mfrom_table.c.inc"
64654ded
BS		 505 return mfrom_ROM_table[arg];
506 } else {
507 return 0;
508 }
509}
510#endif
511
512/*****************************************************************************/
513/* Altivec extension helpers */
64654ded
BS		 514#if defined(HOST_WORDS_BIGENDIAN)
515#define VECTOR_FOR_INORDER_I(index, element) \
516 for (index = 0; index < ARRAY_SIZE(r->element); index++)
517#else
518#define VECTOR_FOR_INORDER_I(index, element) \
b6cb41b2 519 for (index = ARRAY_SIZE(r->element) - 1; index >= 0; index--)
64654ded
BS		 520#endif
521
64654ded
BS		 522/* Saturating arithmetic helpers. */
523#define SATCVT(from, to, from_type, to_type, min, max) \
524 static inline to_type cvt##from##to(from_type x, int *sat) \
525 { \
526 to_type r; \
527 \
528 if (x < (from_type)min) { \
529 r = min; \
530 *sat = 1; \
531 } else if (x > (from_type)max) { \
532 r = max; \
533 *sat = 1; \
534 } else { \
535 r = x; \
536 } \
537 return r; \
538 }
539#define SATCVTU(from, to, from_type, to_type, min, max) \
540 static inline to_type cvt##from##to(from_type x, int *sat) \
541 { \
542 to_type r; \
543 \
544 if (x > (from_type)max) { \
545 r = max; \
546 *sat = 1; \
547 } else { \
548 r = x; \
549 } \
550 return r; \
551 }
552SATCVT(sh, sb, int16_t, int8_t, INT8_MIN, INT8_MAX)
553SATCVT(sw, sh, int32_t, int16_t, INT16_MIN, INT16_MAX)
554SATCVT(sd, sw, int64_t, int32_t, INT32_MIN, INT32_MAX)
555
556SATCVTU(uh, ub, uint16_t, uint8_t, 0, UINT8_MAX)
557SATCVTU(uw, uh, uint32_t, uint16_t, 0, UINT16_MAX)
558SATCVTU(ud, uw, uint64_t, uint32_t, 0, UINT32_MAX)
559SATCVT(sh, ub, int16_t, uint8_t, 0, UINT8_MAX)
560SATCVT(sw, uh, int32_t, uint16_t, 0, UINT16_MAX)
561SATCVT(sd, uw, int64_t, uint32_t, 0, UINT32_MAX)
562#undef SATCVT
563#undef SATCVTU
564
dedfaac7 565void helper_mtvscr(CPUPPCState *env, uint32_t vscr)
64654ded 566{
c19940db 567 ppc_store_vscr(env, vscr);
64654ded
BS		 568}
569
cc2b90d7
RH		 570uint32_t helper_mfvscr(CPUPPCState *env)
571{
c19940db 572 return ppc_get_vscr(env);
cc2b90d7
RH		 573}
574
6175f5a0
RH		 575static inline void set_vscr_sat(CPUPPCState *env)
576{
9b5b74da
RH		 577 /* The choice of non-zero value is arbitrary. */
578 env->vscr_sat.u32[0] = 1;
6175f5a0
RH		 579}
580
64654ded
BS		 581void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
582{
583 int i;
584
585 for (i = 0; i < ARRAY_SIZE(r->u32); i++) {
586 r->u32[i] = ~a->u32[i] < b->u32[i];
587 }
588}
589
5c69452c
AK		 590/* vprtybw */
591void helper_vprtybw(ppc_avr_t *r, ppc_avr_t *b)
592{
593 int i;
594 for (i = 0; i < ARRAY_SIZE(r->u32); i++) {
595 uint64_t res = b->u32[i] ^ (b->u32[i] >> 16);
596 res ^= res >> 8;
597 r->u32[i] = res & 1;
598 }
599}
600
601/* vprtybd */
602void helper_vprtybd(ppc_avr_t *r, ppc_avr_t *b)
603{
604 int i;
605 for (i = 0; i < ARRAY_SIZE(r->u64); i++) {
606 uint64_t res = b->u64[i] ^ (b->u64[i] >> 32);
607 res ^= res >> 16;
608 res ^= res >> 8;
609 r->u64[i] = res & 1;
610 }
611}
612
613/* vprtybq */
614void helper_vprtybq(ppc_avr_t *r, ppc_avr_t *b)
615{
616 uint64_t res = b->u64[0] ^ b->u64[1];
617 res ^= res >> 32;
618 res ^= res >> 16;
619 res ^= res >> 8;
3c385a93
MCA		 620 r->VsrD(1) = res & 1;
621 r->VsrD(0) = 0;
5c69452c
AK		 622}
623
64654ded 624#define VARITHFP(suffix, func) \
d15f74fb
BS		 625 void helper_v##suffix(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
626 ppc_avr_t *b) \
64654ded
BS		 627 { \
628 int i; \
629 \
05ee3e8a
MCA		 630 for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \
631 r->f32[i] = func(a->f32[i], b->f32[i], &env->vec_status); \
64654ded
BS		 632 } \
633 }
634VARITHFP(addfp, float32_add)
635VARITHFP(subfp, float32_sub)
db1babb8
AJ		 636VARITHFP(minfp, float32_min)
637VARITHFP(maxfp, float32_max)
64654ded
BS		 638#undef VARITHFP
639
2f93c23f
AJ		 640#define VARITHFPFMA(suffix, type) \
641 void helper_v##suffix(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, \
642 ppc_avr_t *b, ppc_avr_t *c) \
643 { \
644 int i; \
05ee3e8a
MCA		 645 for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \
646 r->f32[i] = float32_muladd(a->f32[i], c->f32[i], b->f32[i], \
647 type, &env->vec_status); \
2f93c23f
AJ		 648 } \
649 }
650VARITHFPFMA(maddfp, 0);
651VARITHFPFMA(nmsubfp, float_muladd_negate_result | float_muladd_negate_c);
652#undef VARITHFPFMA
653
64654ded
BS		 654#define VARITHSAT_CASE(type, op, cvt, element) \
655 { \
656 type result = (type)a->element[i] op (type)b->element[i]; \
657 r->element[i] = cvt(result, &sat); \
658 }
659
660#define VARITHSAT_DO(name, op, optype, cvt, element) \
fb11ae7d
RH		 661 void helper_v##name(ppc_avr_t *r, ppc_avr_t *vscr_sat, \
662 ppc_avr_t *a, ppc_avr_t *b, uint32_t desc) \
64654ded
BS		 663 { \
664 int sat = 0; \
665 int i; \
666 \
667 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
fb11ae7d 668 VARITHSAT_CASE(optype, op, cvt, element); \
64654ded
BS		 669 } \
670 if (sat) { \
fb11ae7d 671 vscr_sat->u32[0] = 1; \
64654ded
BS		 672 } \
673 }
674#define VARITHSAT_SIGNED(suffix, element, optype, cvt) \
675 VARITHSAT_DO(adds##suffix##s, +, optype, cvt, element) \
676 VARITHSAT_DO(subs##suffix##s, -, optype, cvt, element)
677#define VARITHSAT_UNSIGNED(suffix, element, optype, cvt) \
678 VARITHSAT_DO(addu##suffix##s, +, optype, cvt, element) \
679 VARITHSAT_DO(subu##suffix##s, -, optype, cvt, element)
680VARITHSAT_SIGNED(b, s8, int16_t, cvtshsb)
681VARITHSAT_SIGNED(h, s16, int32_t, cvtswsh)
682VARITHSAT_SIGNED(w, s32, int64_t, cvtsdsw)
683VARITHSAT_UNSIGNED(b, u8, uint16_t, cvtshub)
684VARITHSAT_UNSIGNED(h, u16, uint32_t, cvtswuh)
685VARITHSAT_UNSIGNED(w, u32, uint64_t, cvtsduw)
686#undef VARITHSAT_CASE
687#undef VARITHSAT_DO
688#undef VARITHSAT_SIGNED
689#undef VARITHSAT_UNSIGNED
690
691#define VAVG_DO(name, element, etype) \
692 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
693 { \
694 int i; \
695 \
696 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
697 etype x = (etype)a->element[i] + (etype)b->element[i] + 1; \
698 r->element[i] = x >> 1; \
699 } \
700 }
701
702#define VAVG(type, signed_element, signed_type, unsigned_element, \
703 unsigned_type) \
704 VAVG_DO(avgs##type, signed_element, signed_type) \
705 VAVG_DO(avgu##type, unsigned_element, unsigned_type)
706VAVG(b, s8, int16_t, u8, uint16_t)
707VAVG(h, s16, int32_t, u16, uint32_t)
708VAVG(w, s32, int64_t, u32, uint64_t)
709#undef VAVG_DO
710#undef VAVG
711
37707059
SD		 712#define VABSDU_DO(name, element) \
713void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
714{ \
715 int i; \
716 \
717 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
718 r->element[i] = (a->element[i] > b->element[i]) ? \
719 (a->element[i] - b->element[i]) : \
720 (b->element[i] - a->element[i]); \
721 } \
722}
723
b6cb41b2
DG		 724/*
725 * VABSDU - Vector absolute difference unsigned
37707059
SD		 726 * name - instruction mnemonic suffix (b: byte, h: halfword, w: word)
727 * element - element type to access from vector
728 */
729#define VABSDU(type, element) \
730 VABSDU_DO(absdu##type, element)
731VABSDU(b, u8)
732VABSDU(h, u16)
733VABSDU(w, u32)
734#undef VABSDU_DO
735#undef VABSDU
736
64654ded 737#define VCF(suffix, cvt, element) \
d15f74fb
BS		 738 void helper_vcf##suffix(CPUPPCState *env, ppc_avr_t *r, \
739 ppc_avr_t *b, uint32_t uim) \
64654ded
BS		 740 { \
741 int i; \
742 \
05ee3e8a 743 for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \
64654ded 744 float32 t = cvt(b->element[i], &env->vec_status); \
05ee3e8a 745 r->f32[i] = float32_scalbn(t, -uim, &env->vec_status); \
64654ded
BS		 746 } \
747 }
748VCF(ux, uint32_to_float32, u32)
749VCF(sx, int32_to_float32, s32)
750#undef VCF
751
752#define VCMP_DO(suffix, compare, element, record) \
d15f74fb
BS		 753 void helper_vcmp##suffix(CPUPPCState *env, ppc_avr_t *r, \
754 ppc_avr_t *a, ppc_avr_t *b) \
64654ded 755 { \
6f3dab41
TM		 756 uint64_t ones = (uint64_t)-1; \
757 uint64_t all = ones; \
758 uint64_t none = 0; \
64654ded
BS		 759 int i; \
760 \
761 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
6f3dab41 762 uint64_t result = (a->element[i] compare b->element[i] ? \
64654ded
BS		 763 ones : 0x0); \
764 switch (sizeof(a->element[0])) { \
6f3dab41
TM		 765 case 8: \
766 r->u64[i] = result; \
767 break; \
64654ded
BS		 768 case 4: \
769 r->u32[i] = result; \
770 break; \
771 case 2: \
772 r->u16[i] = result; \
773 break; \
774 case 1: \
775 r->u8[i] = result; \
776 break; \
777 } \
778 all &= result; \
779 none |= result; \
780 } \
781 if (record) { \
782 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
783 } \
784 }
785#define VCMP(suffix, compare, element) \
786 VCMP_DO(suffix, compare, element, 0) \
787 VCMP_DO(suffix##_dot, compare, element, 1)
788VCMP(equb, ==, u8)
789VCMP(equh, ==, u16)
790VCMP(equw, ==, u32)
6f3dab41 791VCMP(equd, ==, u64)
64654ded
BS		 792VCMP(gtub, >, u8)
793VCMP(gtuh, >, u16)
794VCMP(gtuw, >, u32)
6f3dab41 795VCMP(gtud, >, u64)
64654ded
BS		 796VCMP(gtsb, >, s8)
797VCMP(gtsh, >, s16)
798VCMP(gtsw, >, s32)
6f3dab41 799VCMP(gtsd, >, s64)
64654ded
BS		 800#undef VCMP_DO
801#undef VCMP
802
0fa59364
RS		 803#define VCMPNE_DO(suffix, element, etype, cmpzero, record) \
804void helper_vcmpne##suffix(CPUPPCState *env, ppc_avr_t *r, \
f7cc8466
SB		 805 ppc_avr_t *a, ppc_avr_t *b) \
806{ \
807 etype ones = (etype)-1; \
808 etype all = ones; \
0fa59364 809 etype result, none = 0; \
f7cc8466
SB		 810 int i; \
811 \
812 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
0fa59364
RS		 813 if (cmpzero) { \
814 result = ((a->element[i] == 0) \
f7cc8466
SB		 815 || (b->element[i] == 0) \
816 || (a->element[i] != b->element[i]) ? \
817 ones : 0x0); \
0fa59364
RS		 818 } else { \
819 result = (a->element[i] != b->element[i]) ? ones : 0x0; \
820 } \
f7cc8466
SB		 821 r->element[i] = result; \
822 all &= result; \
823 none |= result; \
824 } \
825 if (record) { \
826 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
827 } \
828}
829
b6cb41b2
DG		 830/*
831 * VCMPNEZ - Vector compare not equal to zero
f7cc8466
SB		 832 * suffix - instruction mnemonic suffix (b: byte, h: halfword, w: word)
833 * element - element type to access from vector
834 */
0fa59364
RS		 835#define VCMPNE(suffix, element, etype, cmpzero) \
836 VCMPNE_DO(suffix, element, etype, cmpzero, 0) \
837 VCMPNE_DO(suffix##_dot, element, etype, cmpzero, 1)
838VCMPNE(zb, u8, uint8_t, 1)
839VCMPNE(zh, u16, uint16_t, 1)
840VCMPNE(zw, u32, uint32_t, 1)
841VCMPNE(b, u8, uint8_t, 0)
842VCMPNE(h, u16, uint16_t, 0)
843VCMPNE(w, u32, uint32_t, 0)
844#undef VCMPNE_DO
845#undef VCMPNE
f7cc8466 846
64654ded 847#define VCMPFP_DO(suffix, compare, order, record) \
d15f74fb
BS		 848 void helper_vcmp##suffix(CPUPPCState *env, ppc_avr_t *r, \
849 ppc_avr_t *a, ppc_avr_t *b) \
64654ded
BS		 850 { \
851 uint32_t ones = (uint32_t)-1; \
852 uint32_t all = ones; \
853 uint32_t none = 0; \
854 int i; \
855 \
05ee3e8a 856 for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \
64654ded 857 uint32_t result; \
71bfd65c
RH		 858 FloatRelation rel = \
859 float32_compare_quiet(a->f32[i], b->f32[i], \
860 &env->vec_status); \
64654ded
BS		 861 if (rel == float_relation_unordered) { \
862 result = 0; \
863 } else if (rel compare order) { \
864 result = ones; \
865 } else { \
866 result = 0; \
867 } \
868 r->u32[i] = result; \
869 all &= result; \
870 none |= result; \
871 } \
872 if (record) { \
873 env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \
874 } \
875 }
876#define VCMPFP(suffix, compare, order) \
877 VCMPFP_DO(suffix, compare, order, 0) \
878 VCMPFP_DO(suffix##_dot, compare, order, 1)
879VCMPFP(eqfp, ==, float_relation_equal)
880VCMPFP(gefp, !=, float_relation_less)
881VCMPFP(gtfp, ==, float_relation_greater)
882#undef VCMPFP_DO
883#undef VCMPFP
884
d15f74fb
BS		 885static inline void vcmpbfp_internal(CPUPPCState *env, ppc_avr_t *r,
886 ppc_avr_t *a, ppc_avr_t *b, int record)
64654ded
BS		 887{
888 int i;
889 int all_in = 0;
890
05ee3e8a 891 for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
71bfd65c
RH		 892 FloatRelation le_rel = float32_compare_quiet(a->f32[i], b->f32[i],
893 &env->vec_status);
64654ded
BS		 894 if (le_rel == float_relation_unordered) {
895 r->u32[i] = 0xc0000000;
4007b8de 896 all_in = 1;
64654ded 897 } else {
05ee3e8a 898 float32 bneg = float32_chs(b->f32[i]);
71bfd65c
RH		 899 FloatRelation ge_rel = float32_compare_quiet(a->f32[i], bneg,
900 &env->vec_status);
64654ded
BS		 901 int le = le_rel != float_relation_greater;
902 int ge = ge_rel != float_relation_less;
903
904 r->u32[i] = ((!le) << 31) | ((!ge) << 30);
905 all_in |= (!le | !ge);
906 }
907 }
908 if (record) {
909 env->crf[6] = (all_in == 0) << 1;
910 }
911}
912
d15f74fb 913void helper_vcmpbfp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
64654ded 914{
d15f74fb 915 vcmpbfp_internal(env, r, a, b, 0);
64654ded
BS		 916}
917
d15f74fb
BS		 918void helper_vcmpbfp_dot(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
919 ppc_avr_t *b)
64654ded 920{
d15f74fb 921 vcmpbfp_internal(env, r, a, b, 1);
64654ded
BS		 922}
923
924#define VCT(suffix, satcvt, element) \
d15f74fb
BS		 925 void helper_vct##suffix(CPUPPCState *env, ppc_avr_t *r, \
926 ppc_avr_t *b, uint32_t uim) \
64654ded
BS		 927 { \
928 int i; \
929 int sat = 0; \
930 float_status s = env->vec_status; \
931 \
932 set_float_rounding_mode(float_round_to_zero, &s); \
05ee3e8a
MCA		 933 for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \
934 if (float32_is_any_nan(b->f32[i])) { \
64654ded
BS		 935 r->element[i] = 0; \
936 } else { \
05ee3e8a 937 float64 t = float32_to_float64(b->f32[i], &s); \
64654ded
BS		 938 int64_t j; \
939 \
940 t = float64_scalbn(t, uim, &s); \
941 j = float64_to_int64(t, &s); \
942 r->element[i] = satcvt(j, &sat); \
943 } \
944 } \
945 if (sat) { \
6175f5a0 946 set_vscr_sat(env); \
64654ded
BS		 947 } \
948 }
949VCT(uxs, cvtsduw, u32)
950VCT(sxs, cvtsdsw, s32)
951#undef VCT
952
4879538c
RS		 953target_ulong helper_vclzlsbb(ppc_avr_t *r)
954{
955 target_ulong count = 0;
956 int i;
60594fea
MCA		 957 for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
958 if (r->VsrB(i) & 0x01) {
4879538c
RS		 959 break;
960 }
961 count++;
962 }
963 return count;
964}
965
966target_ulong helper_vctzlsbb(ppc_avr_t *r)
967{
968 target_ulong count = 0;
969 int i;
4879538c 970 for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) {
60594fea 971 if (r->VsrB(i) & 0x01) {
4879538c
RS		 972 break;
973 }
974 count++;
975 }
976 return count;
977}
978
d15f74fb
BS		 979void helper_vmhaddshs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
980 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 981{
982 int sat = 0;
983 int i;
984
985 for (i = 0; i < ARRAY_SIZE(r->s16); i++) {
986 int32_t prod = a->s16[i] * b->s16[i];
987 int32_t t = (int32_t)c->s16[i] + (prod >> 15);
988
989 r->s16[i] = cvtswsh(t, &sat);
990 }
991
992 if (sat) {
6175f5a0 993 set_vscr_sat(env);
64654ded
BS		 994 }
995}
996
d15f74fb
BS		 997void helper_vmhraddshs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
998 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 999{
1000 int sat = 0;
1001 int i;
1002
1003 for (i = 0; i < ARRAY_SIZE(r->s16); i++) {
1004 int32_t prod = a->s16[i] * b->s16[i] + 0x00004000;
1005 int32_t t = (int32_t)c->s16[i] + (prod >> 15);
1006 r->s16[i] = cvtswsh(t, &sat);
1007 }
1008
1009 if (sat) {
6175f5a0 1010 set_vscr_sat(env);
64654ded
BS		 1011 }
1012}
1013
64654ded
BS		 1014void helper_vmladduhm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
1015{
1016 int i;
1017
1018 for (i = 0; i < ARRAY_SIZE(r->s16); i++) {
1019 int32_t prod = a->s16[i] * b->s16[i];
1020 r->s16[i] = (int16_t) (prod + c->s16[i]);
1021 }
1022}
1023
d81c2040
MCA		 1024#define VMRG_DO(name, element, access, ofs) \
1025 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1026 { \
1027 ppc_avr_t result; \
1028 int i, half = ARRAY_SIZE(r->element) / 2; \
1029 \
1030 for (i = 0; i < half; i++) { \
1031 result.access(i * 2 + 0) = a->access(i + ofs); \
1032 result.access(i * 2 + 1) = b->access(i + ofs); \
1033 } \
1034 *r = result; \
1035 }
1036
1037#define VMRG(suffix, element, access) \
1038 VMRG_DO(mrgl##suffix, element, access, half) \
1039 VMRG_DO(mrgh##suffix, element, access, 0)
1040VMRG(b, u8, VsrB)
1041VMRG(h, u16, VsrH)
1042VMRG(w, u32, VsrW)
64654ded
BS		 1043#undef VMRG_DO
1044#undef VMRG
64654ded 1045
d15f74fb
BS		 1046void helper_vmsummbm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
1047 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 1048{
1049 int32_t prod[16];
1050 int i;
1051
1052 for (i = 0; i < ARRAY_SIZE(r->s8); i++) {
1053 prod[i] = (int32_t)a->s8[i] * b->u8[i];
1054 }
1055
1056 VECTOR_FOR_INORDER_I(i, s32) {
1057 r->s32[i] = c->s32[i] + prod[4 * i] + prod[4 * i + 1] +
1058 prod[4 * i + 2] + prod[4 * i + 3];
1059 }
1060}
1061
d15f74fb
BS		 1062void helper_vmsumshm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
1063 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 1064{
1065 int32_t prod[8];
1066 int i;
1067
1068 for (i = 0; i < ARRAY_SIZE(r->s16); i++) {
1069 prod[i] = a->s16[i] * b->s16[i];
1070 }
1071
1072 VECTOR_FOR_INORDER_I(i, s32) {
1073 r->s32[i] = c->s32[i] + prod[2 * i] + prod[2 * i + 1];
1074 }
1075}
1076
d15f74fb
BS		 1077void helper_vmsumshs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
1078 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 1079{
1080 int32_t prod[8];
1081 int i;
1082 int sat = 0;
1083
1084 for (i = 0; i < ARRAY_SIZE(r->s16); i++) {
1085 prod[i] = (int32_t)a->s16[i] * b->s16[i];
1086 }
1087
1088 VECTOR_FOR_INORDER_I(i, s32) {
1089 int64_t t = (int64_t)c->s32[i] + prod[2 * i] + prod[2 * i + 1];
1090
1091 r->u32[i] = cvtsdsw(t, &sat);
1092 }
1093
1094 if (sat) {
6175f5a0 1095 set_vscr_sat(env);
64654ded
BS		 1096 }
1097}
1098
d15f74fb
BS		 1099void helper_vmsumubm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
1100 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 1101{
1102 uint16_t prod[16];
1103 int i;
1104
1105 for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
1106 prod[i] = a->u8[i] * b->u8[i];
1107 }
1108
1109 VECTOR_FOR_INORDER_I(i, u32) {
1110 r->u32[i] = c->u32[i] + prod[4 * i] + prod[4 * i + 1] +
1111 prod[4 * i + 2] + prod[4 * i + 3];
1112 }
1113}
1114
d15f74fb
BS		 1115void helper_vmsumuhm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
1116 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 1117{
1118 uint32_t prod[8];
1119 int i;
1120
1121 for (i = 0; i < ARRAY_SIZE(r->u16); i++) {
1122 prod[i] = a->u16[i] * b->u16[i];
1123 }
1124
1125 VECTOR_FOR_INORDER_I(i, u32) {
1126 r->u32[i] = c->u32[i] + prod[2 * i] + prod[2 * i + 1];
1127 }
1128}
1129
d15f74fb
BS		 1130void helper_vmsumuhs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
1131 ppc_avr_t *b, ppc_avr_t *c)
64654ded
BS		 1132{
1133 uint32_t prod[8];
1134 int i;
1135 int sat = 0;
1136
1137 for (i = 0; i < ARRAY_SIZE(r->u16); i++) {
1138 prod[i] = a->u16[i] * b->u16[i];
1139 }
1140
1141 VECTOR_FOR_INORDER_I(i, s32) {
1142 uint64_t t = (uint64_t)c->u32[i] + prod[2 * i] + prod[2 * i + 1];
1143
1144 r->u32[i] = cvtuduw(t, &sat);
1145 }
1146
1147 if (sat) {
6175f5a0 1148 set_vscr_sat(env);
64654ded
BS		 1149 }
1150}
1151
4fbc89ed 1152#define VMUL_DO_EVN(name, mul_element, mul_access, prod_access, cast) \
64654ded
BS		 1153 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1154 { \
1155 int i; \
1156 \
4fbc89ed
MCA		 1157 for (i = 0; i < ARRAY_SIZE(r->mul_element); i += 2) { \
1158 r->prod_access(i >> 1) = (cast)a->mul_access(i) * \
1159 (cast)b->mul_access(i); \
1160 } \
1161 }
1162
1163#define VMUL_DO_ODD(name, mul_element, mul_access, prod_access, cast) \
1164 void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1165 { \
1166 int i; \
1167 \
1168 for (i = 0; i < ARRAY_SIZE(r->mul_element); i += 2) { \
1169 r->prod_access(i >> 1) = (cast)a->mul_access(i + 1) * \
1170 (cast)b->mul_access(i + 1); \
64654ded
BS		 1171 } \
1172 }
4fbc89ed
MCA		 1173
1174#define VMUL(suffix, mul_element, mul_access, prod_access, cast) \
1175 VMUL_DO_EVN(mule##suffix, mul_element, mul_access, prod_access, cast) \
1176 VMUL_DO_ODD(mulo##suffix, mul_element, mul_access, prod_access, cast)
1177VMUL(sb, s8, VsrSB, VsrSH, int16_t)
1178VMUL(sh, s16, VsrSH, VsrSW, int32_t)
1179VMUL(sw, s32, VsrSW, VsrSD, int64_t)
1180VMUL(ub, u8, VsrB, VsrH, uint16_t)
1181VMUL(uh, u16, VsrH, VsrW, uint32_t)
1182VMUL(uw, u32, VsrW, VsrD, uint64_t)
1183#undef VMUL_DO_EVN
1184#undef VMUL_DO_ODD
64654ded
BS		 1185#undef VMUL
1186
f3e0d864
LP		 1187void helper_vmulhsw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1188{
1189 int i;
1190
1191 for (i = 0; i < 4; i++) {
1192 r->s32[i] = (int32_t)(((int64_t)a->s32[i] * (int64_t)b->s32[i]) >> 32);
1193 }
1194}
1195
1196void helper_vmulhuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1197{
1198 int i;
1199
1200 for (i = 0; i < 4; i++) {
1201 r->u32[i] = (uint32_t)(((uint64_t)a->u32[i] *
1202 (uint64_t)b->u32[i]) >> 32);
1203 }
1204}
1205
c4b8b49d
LP		 1206void helper_vmulhsd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1207{
1208 uint64_t discard;
1209
1210 muls64(&discard, &r->u64[0], a->s64[0], b->s64[0]);
1211 muls64(&discard, &r->u64[1], a->s64[1], b->s64[1]);
1212}
1213
1214void helper_vmulhud(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1215{
1216 uint64_t discard;
1217
1218 mulu64(&discard, &r->u64[0], a->u64[0], b->u64[0]);
1219 mulu64(&discard, &r->u64[1], a->u64[1], b->u64[1]);
1220}
1221
d15f74fb
BS		 1222void helper_vperm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
1223 ppc_avr_t *c)
64654ded
BS		 1224{
1225 ppc_avr_t result;
1226 int i;
1227
60594fea
MCA		 1228 for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
1229 int s = c->VsrB(i) & 0x1f;
64654ded 1230 int index = s & 0xf;
64654ded
BS		 1231
1232 if (s & 0x10) {
60594fea 1233 result.VsrB(i) = b->VsrB(index);
64654ded 1234 } else {
60594fea 1235 result.VsrB(i) = a->VsrB(index);
64654ded
BS		 1236 }
1237 }
1238 *r = result;
1239}
1240
ab045436
RS		 1241void helper_vpermr(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
1242 ppc_avr_t *c)
1243{
1244 ppc_avr_t result;
1245 int i;
1246
60594fea
MCA		 1247 for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
1248 int s = c->VsrB(i) & 0x1f;
ab045436 1249 int index = 15 - (s & 0xf);
ab045436
RS		 1250
1251 if (s & 0x10) {
60594fea 1252 result.VsrB(i) = a->VsrB(index);
ab045436 1253 } else {
60594fea 1254 result.VsrB(i) = b->VsrB(index);
ab045436
RS		 1255 }
1256 }
1257 *r = result;
1258}
1259
4d82038e
TM		 1260#if defined(HOST_WORDS_BIGENDIAN)
1261#define VBPERMQ_INDEX(avr, i) ((avr)->u8[(i)])
01fe9a47 1262#define VBPERMD_INDEX(i) (i)
4d82038e 1263#define VBPERMQ_DW(index) (((index) & 0x40) != 0)
01fe9a47 1264#define EXTRACT_BIT(avr, i, index) (extract64((avr)->u64[i], index, 1))
4d82038e 1265#else
b6cb41b2 1266#define VBPERMQ_INDEX(avr, i) ((avr)->u8[15 - (i)])
01fe9a47 1267#define VBPERMD_INDEX(i) (1 - i)
4d82038e 1268#define VBPERMQ_DW(index) (((index) & 0x40) == 0)
01fe9a47
RS		 1269#define EXTRACT_BIT(avr, i, index) \
1270 (extract64((avr)->u64[1 - i], 63 - index, 1))
4d82038e
TM		 1271#endif
1272
01fe9a47
RS		 1273void helper_vbpermd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1274{
1275 int i, j;
1276 ppc_avr_t result = { .u64 = { 0, 0 } };
1277 VECTOR_FOR_INORDER_I(i, u64) {
1278 for (j = 0; j < 8; j++) {
1279 int index = VBPERMQ_INDEX(b, (i * 8) + j);
1280 if (index < 64 && EXTRACT_BIT(a, i, index)) {
1281 result.u64[VBPERMD_INDEX(i)] |= (0x80 >> j);
1282 }
1283 }
1284 }
1285 *r = result;
1286}
1287
4d82038e
TM		 1288void helper_vbpermq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1289{
1290 int i;
1291 uint64_t perm = 0;
1292
1293 VECTOR_FOR_INORDER_I(i, u8) {
1294 int index = VBPERMQ_INDEX(b, i);
1295
1296 if (index < 128) {
b6cb41b2 1297 uint64_t mask = (1ull << (63 - (index & 0x3F)));
4d82038e
TM		 1298 if (a->u64[VBPERMQ_DW(index)] & mask) {
1299 perm |= (0x8000 >> i);
1300 }
1301 }
1302 }
1303
3c385a93
MCA		 1304 r->VsrD(0) = perm;
1305 r->VsrD(1) = 0;
4d82038e
TM		 1306}
1307
1308#undef VBPERMQ_INDEX
1309#undef VBPERMQ_DW
1310
b8476fc7
TM		 1311#define PMSUM(name, srcfld, trgfld, trgtyp) \
1312void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1313{ \
1314 int i, j; \
b6cb41b2 1315 trgtyp prod[sizeof(ppc_avr_t) / sizeof(a->srcfld[0])]; \
b8476fc7
TM		 1316 \
1317 VECTOR_FOR_INORDER_I(i, srcfld) { \
1318 prod[i] = 0; \
1319 for (j = 0; j < sizeof(a->srcfld[0]) * 8; j++) { \
b6cb41b2 1320 if (a->srcfld[i] & (1ull << j)) { \
b8476fc7
TM		 1321 prod[i] ^= ((trgtyp)b->srcfld[i] << j); \
1322 } \
1323 } \
1324 } \
1325 \
1326 VECTOR_FOR_INORDER_I(i, trgfld) { \
b6cb41b2 1327 r->trgfld[i] = prod[2 * i] ^ prod[2 * i + 1]; \
b8476fc7
TM		 1328 } \
1329}
1330
1331PMSUM(vpmsumb, u8, u16, uint16_t)
1332PMSUM(vpmsumh, u16, u32, uint32_t)
1333PMSUM(vpmsumw, u32, u64, uint64_t)
1334
1335void helper_vpmsumd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1336{
1337
1338#ifdef CONFIG_INT128
1339 int i, j;
1340 __uint128_t prod[2];
1341
1342 VECTOR_FOR_INORDER_I(i, u64) {
1343 prod[i] = 0;
1344 for (j = 0; j < 64; j++) {
b6cb41b2 1345 if (a->u64[i] & (1ull << j)) {
b8476fc7
TM		 1346 prod[i] ^= (((__uint128_t)b->u64[i]) << j);
1347 }
1348 }
1349 }
1350
1351 r->u128 = prod[0] ^ prod[1];
1352
1353#else
1354 int i, j;
1355 ppc_avr_t prod[2];
1356
1357 VECTOR_FOR_INORDER_I(i, u64) {
3c385a93 1358 prod[i].VsrD(1) = prod[i].VsrD(0) = 0;
b8476fc7 1359 for (j = 0; j < 64; j++) {
b6cb41b2 1360 if (a->u64[i] & (1ull << j)) {
b8476fc7
TM		 1361 ppc_avr_t bshift;
1362 if (j == 0) {
3c385a93
MCA		 1363 bshift.VsrD(0) = 0;
1364 bshift.VsrD(1) = b->u64[i];
b8476fc7 1365 } else {
3c385a93
MCA		 1366 bshift.VsrD(0) = b->u64[i] >> (64 - j);
1367 bshift.VsrD(1) = b->u64[i] << j;
b8476fc7 1368 }
3c385a93
MCA		 1369 prod[i].VsrD(1) ^= bshift.VsrD(1);
1370 prod[i].VsrD(0) ^= bshift.VsrD(0);
b8476fc7
TM		 1371 }
1372 }
1373 }
1374
3c385a93
MCA		 1375 r->VsrD(1) = prod[0].VsrD(1) ^ prod[1].VsrD(1);
1376 r->VsrD(0) = prod[0].VsrD(0) ^ prod[1].VsrD(0);
b8476fc7
TM		 1377#endif
1378}
1379
1380
64654ded
BS		 1381#if defined(HOST_WORDS_BIGENDIAN)
1382#define PKBIG 1
1383#else
1384#define PKBIG 0
1385#endif
1386void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1387{
1388 int i, j;
1389 ppc_avr_t result;
1390#if defined(HOST_WORDS_BIGENDIAN)
1391 const ppc_avr_t *x[2] = { a, b };
1392#else
1393 const ppc_avr_t *x[2] = { b, a };
1394#endif
1395
1396 VECTOR_FOR_INORDER_I(i, u64) {
1397 VECTOR_FOR_INORDER_I(j, u32) {
1398 uint32_t e = x[i]->u32[j];
1399
b6cb41b2
DG		 1400 result.u16[4 * i + j] = (((e >> 9) & 0xfc00) |
1401 ((e >> 6) & 0x3e0) |
1402 ((e >> 3) & 0x1f));
64654ded
BS		 1403 }
1404 }
1405 *r = result;
1406}
1407
1408#define VPK(suffix, from, to, cvt, dosat) \
d15f74fb
BS		 1409 void helper_vpk##suffix(CPUPPCState *env, ppc_avr_t *r, \
1410 ppc_avr_t *a, ppc_avr_t *b) \
64654ded
BS		 1411 { \
1412 int i; \
1413 int sat = 0; \
1414 ppc_avr_t result; \
1415 ppc_avr_t *a0 = PKBIG ? a : b; \
1416 ppc_avr_t *a1 = PKBIG ? b : a; \
1417 \
1418 VECTOR_FOR_INORDER_I(i, from) { \
1419 result.to[i] = cvt(a0->from[i], &sat); \
b6cb41b2 1420 result.to[i + ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat);\
64654ded
BS		 1421 } \
1422 *r = result; \
1423 if (dosat && sat) { \
6175f5a0 1424 set_vscr_sat(env); \
64654ded
BS		 1425 } \
1426 }
1427#define I(x, y) (x)
1428VPK(shss, s16, s8, cvtshsb, 1)
1429VPK(shus, s16, u8, cvtshub, 1)
1430VPK(swss, s32, s16, cvtswsh, 1)
1431VPK(swus, s32, u16, cvtswuh, 1)
024215b2
TM		 1432VPK(sdss, s64, s32, cvtsdsw, 1)
1433VPK(sdus, s64, u32, cvtsduw, 1)
64654ded
BS		 1434VPK(uhus, u16, u8, cvtuhub, 1)
1435VPK(uwus, u32, u16, cvtuwuh, 1)
024215b2 1436VPK(udus, u64, u32, cvtuduw, 1)
64654ded
BS		 1437VPK(uhum, u16, u8, I, 0)
1438VPK(uwum, u32, u16, I, 0)
024215b2 1439VPK(udum, u64, u32, I, 0)
64654ded
BS		 1440#undef I
1441#undef VPK
1442#undef PKBIG
1443
d15f74fb 1444void helper_vrefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
64654ded
BS		 1445{
1446 int i;
1447
05ee3e8a
MCA		 1448 for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
1449 r->f32[i] = float32_div(float32_one, b->f32[i], &env->vec_status);
64654ded
BS		 1450 }
1451}
1452
1453#define VRFI(suffix, rounding) \
d15f74fb
BS		 1454 void helper_vrfi##suffix(CPUPPCState *env, ppc_avr_t *r, \
1455 ppc_avr_t *b) \
64654ded
BS		 1456 { \
1457 int i; \
1458 float_status s = env->vec_status; \
1459 \
1460 set_float_rounding_mode(rounding, &s); \
05ee3e8a
MCA		 1461 for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \
1462 r->f32[i] = float32_round_to_int (b->f32[i], &s); \
64654ded
BS		 1463 } \
1464 }
1465VRFI(n, float_round_nearest_even)
1466VRFI(m, float_round_down)
1467VRFI(p, float_round_up)
1468VRFI(z, float_round_to_zero)
1469#undef VRFI
1470
d15f74fb 1471void helper_vrsqrtefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
64654ded
BS		 1472{
1473 int i;
1474
05ee3e8a
MCA		 1475 for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
1476 float32 t = float32_sqrt(b->f32[i], &env->vec_status);
64654ded 1477
05ee3e8a 1478 r->f32[i] = float32_div(float32_one, t, &env->vec_status);
64654ded
BS		 1479 }
1480}
1481
09a245e1 1482#define VRLMI(name, size, element, insert) \
3e00884f
GS		 1483void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
1484{ \
1485 int i; \
1486 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
1487 uint##size##_t src1 = a->element[i]; \
1488 uint##size##_t src2 = b->element[i]; \
1489 uint##size##_t src3 = r->element[i]; \
1490 uint##size##_t begin, end, shift, mask, rot_val; \
1491 \
1492 shift = extract##size(src2, 0, 6); \
1493 end = extract##size(src2, 8, 6); \
1494 begin = extract##size(src2, 16, 6); \
1495 rot_val = rol##size(src1, shift); \
1496 mask = mask_u##size(begin, end); \
09a245e1
BR		 1497 if (insert) { \
1498 r->element[i] = (rot_val & mask) | (src3 & ~mask); \
1499 } else { \
1500 r->element[i] = (rot_val & mask); \
1501 } \
3e00884f
GS		 1502 } \
1503}
1504
09a245e1
BR		 1505VRLMI(vrldmi, 64, u64, 1);
1506VRLMI(vrlwmi, 32, u32, 1);
1507VRLMI(vrldnm, 64, u64, 0);
1508VRLMI(vrlwnm, 32, u32, 0);
3e00884f 1509
d15f74fb
BS		 1510void helper_vsel(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
1511 ppc_avr_t *c)
64654ded
BS		 1512{
1513 r->u64[0] = (a->u64[0] & ~c->u64[0]) | (b->u64[0] & c->u64[0]);
1514 r->u64[1] = (a->u64[1] & ~c->u64[1]) | (b->u64[1] & c->u64[1]);
1515}
1516
d15f74fb 1517void helper_vexptefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
64654ded
BS		 1518{
1519 int i;
1520
05ee3e8a
MCA		 1521 for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
1522 r->f32[i] = float32_exp2(b->f32[i], &env->vec_status);
64654ded
BS		 1523 }
1524}
1525
d15f74fb 1526void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
64654ded
BS		 1527{
1528 int i;
1529
05ee3e8a
MCA		 1530 for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
1531 r->f32[i] = float32_log2(b->f32[i], &env->vec_status);
64654ded
BS		 1532 }
1533}
1534
f297c4c6
MF		 1535#define VEXTU_X_DO(name, size, left) \
1536target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \
1537{ \
1538 int index = (a & 0xf) * 8; \
1539 if (left) { \
1540 index = 128 - index - size; \
1541 } \
1542 return int128_getlo(int128_rshift(b->s128, index)) & \
1543 MAKE_64BIT_MASK(0, size); \
1544}
60caf221
AK		 1545VEXTU_X_DO(vextublx, 8, 1)
1546VEXTU_X_DO(vextuhlx, 16, 1)
1547VEXTU_X_DO(vextuwlx, 32, 1)
1548VEXTU_X_DO(vextubrx, 8, 0)
1549VEXTU_X_DO(vextuhrx, 16, 0)
1550VEXTU_X_DO(vextuwrx, 32, 0)
1551#undef VEXTU_X_DO
1552
5644a175
VAS		 1553void helper_vslv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1554{
1555 int i;
1556 unsigned int shift, bytes, size;
1557
1558 size = ARRAY_SIZE(r->u8);
1559 for (i = 0; i < size; i++) {
63be02fc
AB		 1560 shift = b->VsrB(i) & 0x7; /* extract shift value */
1561 bytes = (a->VsrB(i) << 8) + /* extract adjacent bytes */
1562 (((i + 1) < size) ? a->VsrB(i + 1) : 0);
1563 r->VsrB(i) = (bytes << shift) >> 8; /* shift and store result */
5644a175
VAS		 1564 }
1565}
1566
4004c1db
VAS		 1567void helper_vsrv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1568{
1569 int i;
1570 unsigned int shift, bytes;
1571
b6cb41b2
DG		 1572 /*
1573 * Use reverse order, as destination and source register can be
1574 * same. Its being modified in place saving temporary, reverse
1575 * order will guarantee that computed result is not fed back.
4004c1db
VAS		 1576 */
1577 for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) {
63be02fc
AB		 1578 shift = b->VsrB(i) & 0x7; /* extract shift value */
1579 bytes = ((i ? a->VsrB(i - 1) : 0) << 8) + a->VsrB(i);
4004c1db 1580 /* extract adjacent bytes */
63be02fc 1581 r->VsrB(i) = (bytes >> shift) & 0xFF; /* shift and store result */
4004c1db
VAS		 1582 }
1583}
1584
64654ded
BS		 1585void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift)
1586{
1587 int sh = shift & 0xf;
1588 int i;
1589 ppc_avr_t result;
1590
64654ded
BS		 1591 for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
1592 int index = sh + i;
1593 if (index > 0xf) {
60594fea 1594 result.VsrB(i) = b->VsrB(index - 0x10);
64654ded 1595 } else {
60594fea 1596 result.VsrB(i) = a->VsrB(index);
64654ded
BS		 1597 }
1598 }
64654ded
BS		 1599 *r = result;
1600}
1601
1602void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1603{
3c385a93 1604 int sh = (b->VsrB(0xf) >> 3) & 0xf;
64654ded
BS		 1605
1606#if defined(HOST_WORDS_BIGENDIAN)
1607 memmove(&r->u8[0], &a->u8[sh], 16 - sh);
b6cb41b2 1608 memset(&r->u8[16 - sh], 0, sh);
64654ded
BS		 1609#else
1610 memmove(&r->u8[sh], &a->u8[0], 16 - sh);
1611 memset(&r->u8[0], 0, sh);
1612#endif
1613}
1614
2cc12af3
MF		 1615#if defined(HOST_WORDS_BIGENDIAN)
1616#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->u8[IDX])
1617#else
1618#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->u8[15 - (IDX)] - (SIZE) + 1)
1619#endif
1620
1621#define VINSX(SUFFIX, TYPE) \
1622void glue(glue(helper_VINS, SUFFIX), LX)(CPUPPCState *env, ppc_avr_t *t, \
1623 uint64_t val, target_ulong index) \
1624{ \
1625 const int maxidx = ARRAY_SIZE(t->u8) - sizeof(TYPE); \
1626 target_long idx = index; \
1627 \
1628 if (idx < 0 || idx > maxidx) { \
1629 idx = idx < 0 ? sizeof(TYPE) - idx : idx; \
1630 qemu_log_mask(LOG_GUEST_ERROR, \
1631 "Invalid index for Vector Insert Element after 0x" TARGET_FMT_lx \
1632 ", RA = " TARGET_FMT_ld " > %d\n", env->nip, idx, maxidx); \
1633 } else { \
1634 TYPE src = val; \
1635 memcpy(ELEM_ADDR(t, idx, sizeof(TYPE)), &src, sizeof(TYPE)); \
1636 } \
1637}
1638VINSX(B, uint8_t)
1639VINSX(H, uint16_t)
1640VINSX(W, uint32_t)
1641VINSX(D, uint64_t)
1642#undef ELEM_ADDR
1643#undef VINSX
b5d569a1 1644#if defined(HOST_WORDS_BIGENDIAN)
28110b72
MF		 1645#define VEXTDVLX(NAME, SIZE) \
1646void helper_##NAME(CPUPPCState *env, ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, \
1647 target_ulong index) \
1648{ \
1649 const target_long idx = index; \
1650 ppc_avr_t tmp[2] = { *a, *b }; \
1651 memset(t, 0, sizeof(*t)); \
1652 if (idx >= 0 && idx + SIZE <= sizeof(tmp)) { \
1653 memcpy(&t->u8[ARRAY_SIZE(t->u8) / 2 - SIZE], (void *)tmp + idx, SIZE); \
1654 } else { \
1655 qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for " #NAME " after 0x" \
1656 TARGET_FMT_lx ", RC = " TARGET_FMT_ld " > %d\n", \
1657 env->nip, idx < 0 ? SIZE - idx : idx, 32 - SIZE); \
1658 } \
1659}
1660#else
1661#define VEXTDVLX(NAME, SIZE) \
1662void helper_##NAME(CPUPPCState *env, ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, \
1663 target_ulong index) \
1664{ \
1665 const target_long idx = index; \
1666 ppc_avr_t tmp[2] = { *b, *a }; \
1667 memset(t, 0, sizeof(*t)); \
1668 if (idx >= 0 && idx + SIZE <= sizeof(tmp)) { \
1669 memcpy(&t->u8[ARRAY_SIZE(t->u8) / 2], \
1670 (void *)tmp + sizeof(tmp) - SIZE - idx, SIZE); \
1671 } else { \
1672 qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for " #NAME " after 0x" \
1673 TARGET_FMT_lx ", RC = " TARGET_FMT_ld " > %d\n", \
1674 env->nip, idx < 0 ? SIZE - idx : idx, 32 - SIZE); \
1675 } \
1676}
1677#endif
1678VEXTDVLX(VEXTDUBVLX, 1)
1679VEXTDVLX(VEXTDUHVLX, 2)
1680VEXTDVLX(VEXTDUWVLX, 4)
1681VEXTDVLX(VEXTDDVLX, 8)
1682#undef VEXTDVLX
1683#if defined(HOST_WORDS_BIGENDIAN)
b5d569a1
RS		 1684#define VEXTRACT(suffix, element) \
1685 void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \
1686 { \
1687 uint32_t es = sizeof(r->element[0]); \
1688 memmove(&r->u8[8 - es], &b->u8[index], es); \
1689 memset(&r->u8[8], 0, 8); \
1690 memset(&r->u8[0], 0, 8 - es); \
1691 }
1692#else
1693#define VEXTRACT(suffix, element) \
1694 void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \
1695 { \
1696 uint32_t es = sizeof(r->element[0]); \
1697 uint32_t s = (16 - index) - es; \
1698 memmove(&r->u8[8], &b->u8[s], es); \
1699 memset(&r->u8[0], 0, 8); \
1700 memset(&r->u8[8 + es], 0, 8 - es); \
1701 }
1702#endif
1703VEXTRACT(ub, u8)
1704VEXTRACT(uh, u16)
1705VEXTRACT(uw, u32)
1706VEXTRACT(d, u64)
1707#undef VEXTRACT
64654ded 1708
5ba5335d
MCA		 1709void helper_xxextractuw(CPUPPCState *env, ppc_vsr_t *xt,
1710 ppc_vsr_t *xb, uint32_t index)
8ad901e5 1711{
03b32c09 1712 ppc_vsr_t t = { };
8ad901e5
ND		 1713 size_t es = sizeof(uint32_t);
1714 uint32_t ext_index;
1715 int i;
1716
8ad901e5
ND		 1717 ext_index = index;
1718 for (i = 0; i < es; i++, ext_index++) {
03b32c09 1719 t.VsrB(8 - es + i) = xb->VsrB(ext_index % 16);
8ad901e5 1720 }
8ad901e5 1721
03b32c09 1722 *xt = t;
8ad901e5
ND		 1723}
1724
5ba5335d
MCA		 1725void helper_xxinsertw(CPUPPCState *env, ppc_vsr_t *xt,
1726 ppc_vsr_t *xb, uint32_t index)
3398b742 1727{
03b32c09 1728 ppc_vsr_t t = *xt;
3398b742
ND		 1729 size_t es = sizeof(uint32_t);
1730 int ins_index, i = 0;
1731
3398b742
ND		 1732 ins_index = index;
1733 for (i = 0; i < es && ins_index < 16; i++, ins_index++) {
03b32c09 1734 t.VsrB(ins_index) = xb->VsrB(8 - es + i);
3398b742 1735 }
3398b742 1736
03b32c09 1737 *xt = t;
3398b742
ND		 1738}
1739
634c5835 1740#define VEXT_SIGNED(name, element, cast) \
125a9b23
ND		 1741void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \
1742{ \
1743 int i; \
60594fea 1744 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
634c5835 1745 r->element[i] = (cast)b->element[i]; \
125a9b23
ND		 1746 } \
1747}
634c5835
MCA		 1748VEXT_SIGNED(vextsb2w, s32, int8_t)
1749VEXT_SIGNED(vextsb2d, s64, int8_t)
1750VEXT_SIGNED(vextsh2w, s32, int16_t)
1751VEXT_SIGNED(vextsh2d, s64, int16_t)
1752VEXT_SIGNED(vextsw2d, s64, int32_t)
125a9b23
ND		 1753#undef VEXT_SIGNED
1754
cc8b6e76
ND		 1755#define VNEG(name, element) \
1756void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \
1757{ \
1758 int i; \
60594fea 1759 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
cc8b6e76
ND		 1760 r->element[i] = -b->element[i]; \
1761 } \
1762}
1763VNEG(vnegw, s32)
1764VNEG(vnegd, s64)
1765#undef VNEG
1766
64654ded
BS		 1767void helper_vsro(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1768{
3c385a93 1769 int sh = (b->VsrB(0xf) >> 3) & 0xf;
64654ded
BS		 1770
1771#if defined(HOST_WORDS_BIGENDIAN)
1772 memmove(&r->u8[sh], &a->u8[0], 16 - sh);
1773 memset(&r->u8[0], 0, sh);
1774#else
1775 memmove(&r->u8[0], &a->u8[sh], 16 - sh);
1776 memset(&r->u8[16 - sh], 0, sh);
1777#endif
1778}
1779
1780void helper_vsubcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
1781{
1782 int i;
1783
1784 for (i = 0; i < ARRAY_SIZE(r->u32); i++) {
1785 r->u32[i] = a->u32[i] >= b->u32[i];
1786 }
1787}
1788
d15f74fb 1789void helper_vsumsws(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
64654ded
BS		 1790{
1791 int64_t t;
1792 int i, upper;
1793 ppc_avr_t result;
1794 int sat = 0;
1795
60594fea
MCA		 1796 upper = ARRAY_SIZE(r->s32) - 1;
1797 t = (int64_t)b->VsrSW(upper);
64654ded 1798 for (i = 0; i < ARRAY_SIZE(r->s32); i++) {
60594fea
MCA		 1799 t += a->VsrSW(i);
1800 result.VsrSW(i) = 0;
64654ded 1801 }
60594fea 1802 result.VsrSW(upper) = cvtsdsw(t, &sat);
64654ded
BS		 1803 *r = result;
1804
1805 if (sat) {
6175f5a0 1806 set_vscr_sat(env);
64654ded
BS		 1807 }
1808}
1809
d15f74fb 1810void helper_vsum2sws(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
64654ded
BS		 1811{
1812 int i, j, upper;
1813 ppc_avr_t result;
1814 int sat = 0;
1815
64654ded 1816 upper = 1;
64654ded 1817 for (i = 0; i < ARRAY_SIZE(r->u64); i++) {
60594fea 1818 int64_t t = (int64_t)b->VsrSW(upper + i * 2);
64654ded 1819
7fa0ddc1 1820 result.VsrD(i) = 0;
64654ded 1821 for (j = 0; j < ARRAY_SIZE(r->u64); j++) {
60594fea 1822 t += a->VsrSW(2 * i + j);
64654ded 1823 }
60594fea 1824 result.VsrSW(upper + i * 2) = cvtsdsw(t, &sat);
64654ded
BS		 1825 }
1826
1827 *r = result;
1828 if (sat) {
6175f5a0 1829 set_vscr_sat(env);
64654ded
BS		 1830 }
1831}
1832
d15f74fb 1833void helper_vsum4sbs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
64654ded
BS		 1834{
1835 int i, j;
1836 int sat = 0;
1837
1838 for (i = 0; i < ARRAY_SIZE(r->s32); i++) {
1839 int64_t t = (int64_t)b->s32[i];
1840
1841 for (j = 0; j < ARRAY_SIZE(r->s32); j++) {
1842 t += a->s8[4 * i + j];
1843 }
1844 r->s32[i] = cvtsdsw(t, &sat);
1845 }
1846
1847 if (sat) {
6175f5a0 1848 set_vscr_sat(env);
64654ded
BS		 1849 }
1850}
1851
d15f74fb 1852void helper_vsum4shs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
64654ded
BS		 1853{
1854 int sat = 0;
1855 int i;
1856
1857 for (i = 0; i < ARRAY_SIZE(r->s32); i++) {
1858 int64_t t = (int64_t)b->s32[i];
1859
1860 t += a->s16[2 * i] + a->s16[2 * i + 1];
1861 r->s32[i] = cvtsdsw(t, &sat);
1862 }
1863
1864 if (sat) {
6175f5a0 1865 set_vscr_sat(env);
64654ded
BS		 1866 }
1867}
1868
d15f74fb 1869void helper_vsum4ubs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
64654ded
BS		 1870{
1871 int i, j;
1872 int sat = 0;
1873
1874 for (i = 0; i < ARRAY_SIZE(r->u32); i++) {
1875 uint64_t t = (uint64_t)b->u32[i];
1876
1877 for (j = 0; j < ARRAY_SIZE(r->u32); j++) {
1878 t += a->u8[4 * i + j];
1879 }
1880 r->u32[i] = cvtuduw(t, &sat);
1881 }
1882
1883 if (sat) {
6175f5a0 1884 set_vscr_sat(env);
64654ded
BS		 1885 }
1886}
1887
1888#if defined(HOST_WORDS_BIGENDIAN)
1889#define UPKHI 1
1890#define UPKLO 0
1891#else
1892#define UPKHI 0
1893#define UPKLO 1
1894#endif
1895#define VUPKPX(suffix, hi) \
1896 void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \
1897 { \
1898 int i; \
1899 ppc_avr_t result; \
1900 \
1901 for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \
b6cb41b2 1902 uint16_t e = b->u16[hi ? i : i + 4]; \
64654ded
BS		 1903 uint8_t a = (e >> 15) ? 0xff : 0; \
1904 uint8_t r = (e >> 10) & 0x1f; \
1905 uint8_t g = (e >> 5) & 0x1f; \
1906 uint8_t b = e & 0x1f; \
1907 \
1908 result.u32[i] = (a << 24) | (r << 16) | (g << 8) | b; \
1909 } \
1910 *r = result; \
1911 }
1912VUPKPX(lpx, UPKLO)
1913VUPKPX(hpx, UPKHI)
1914#undef VUPKPX
1915
1916#define VUPK(suffix, unpacked, packee, hi) \
1917 void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \
1918 { \
1919 int i; \
1920 ppc_avr_t result; \
1921 \
1922 if (hi) { \
1923 for (i = 0; i < ARRAY_SIZE(r->unpacked); i++) { \
1924 result.unpacked[i] = b->packee[i]; \
1925 } \
1926 } else { \
1927 for (i = ARRAY_SIZE(r->unpacked); i < ARRAY_SIZE(r->packee); \
1928 i++) { \
1929 result.unpacked[i - ARRAY_SIZE(r->unpacked)] = b->packee[i]; \
1930 } \
1931 } \
1932 *r = result; \
1933 }
1934VUPK(hsb, s16, s8, UPKHI)
1935VUPK(hsh, s32, s16, UPKHI)
4430e076 1936VUPK(hsw, s64, s32, UPKHI)
64654ded
BS		 1937VUPK(lsb, s16, s8, UPKLO)
1938VUPK(lsh, s32, s16, UPKLO)
4430e076 1939VUPK(lsw, s64, s32, UPKLO)
64654ded
BS		 1940#undef VUPK
1941#undef UPKHI
1942#undef UPKLO
1943
f293f04a
TM		 1944#define VGENERIC_DO(name, element) \
1945 void helper_v##name(ppc_avr_t *r, ppc_avr_t *b) \
1946 { \
1947 int i; \
1948 \
60594fea 1949 for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
f293f04a
TM		 1950 r->element[i] = name(b->element[i]); \
1951 } \
1952 }
1953
1954#define clzb(v) ((v) ? clz32((uint32_t)(v) << 24) : 8)
1955#define clzh(v) ((v) ? clz32((uint32_t)(v) << 16) : 16)
f293f04a
TM		 1956
1957VGENERIC_DO(clzb, u8)
1958VGENERIC_DO(clzh, u16)
f293f04a
TM		 1959
1960#undef clzb
1961#undef clzh
f293f04a 1962
a5ad8fbf
RS		 1963#define ctzb(v) ((v) ? ctz32(v) : 8)
1964#define ctzh(v) ((v) ? ctz32(v) : 16)
1965#define ctzw(v) ctz32((v))
1966#define ctzd(v) ctz64((v))
1967
1968VGENERIC_DO(ctzb, u8)
1969VGENERIC_DO(ctzh, u16)
1970VGENERIC_DO(ctzw, u32)
1971VGENERIC_DO(ctzd, u64)
1972
1973#undef ctzb
1974#undef ctzh
1975#undef ctzw
1976#undef ctzd
1977
e13500b3
TM		 1978#define popcntb(v) ctpop8(v)
1979#define popcnth(v) ctpop16(v)
1980#define popcntw(v) ctpop32(v)
1981#define popcntd(v) ctpop64(v)
1982
1983VGENERIC_DO(popcntb, u8)
1984VGENERIC_DO(popcnth, u16)
1985VGENERIC_DO(popcntw, u32)
1986VGENERIC_DO(popcntd, u64)
1987
1988#undef popcntb
1989#undef popcnth
1990#undef popcntw
1991#undef popcntd
f293f04a
TM		 1992
1993#undef VGENERIC_DO
1994
b41da4eb
TM		 1995#if defined(HOST_WORDS_BIGENDIAN)
1996#define QW_ONE { .u64 = { 0, 1 } }
1997#else
1998#define QW_ONE { .u64 = { 1, 0 } }
1999#endif
2000
2001#ifndef CONFIG_INT128
2002
2003static inline void avr_qw_not(ppc_avr_t *t, ppc_avr_t a)
2004{
2005 t->u64[0] = ~a.u64[0];
2006 t->u64[1] = ~a.u64[1];
2007}
2008
2009static int avr_qw_cmpu(ppc_avr_t a, ppc_avr_t b)
2010{
3c385a93 2011 if (a.VsrD(0) < b.VsrD(0)) {
b41da4eb 2012 return -1;
3c385a93 2013 } else if (a.VsrD(0) > b.VsrD(0)) {
b41da4eb 2014 return 1;
3c385a93 2015 } else if (a.VsrD(1) < b.VsrD(1)) {
b41da4eb 2016 return -1;
3c385a93 2017 } else if (a.VsrD(1) > b.VsrD(1)) {
b41da4eb
TM		 2018 return 1;
2019 } else {
2020 return 0;
2021 }
2022}
2023
2024static void avr_qw_add(ppc_avr_t *t, ppc_avr_t a, ppc_avr_t b)
2025{
3c385a93
MCA		 2026 t->VsrD(1) = a.VsrD(1) + b.VsrD(1);
2027 t->VsrD(0) = a.VsrD(0) + b.VsrD(0) +
2028 (~a.VsrD(1) < b.VsrD(1));
b41da4eb
TM		 2029}
2030
2031static int avr_qw_addc(ppc_avr_t *t, ppc_avr_t a, ppc_avr_t b)
2032{
2033 ppc_avr_t not_a;
3c385a93
MCA		 2034 t->VsrD(1) = a.VsrD(1) + b.VsrD(1);
2035 t->VsrD(0) = a.VsrD(0) + b.VsrD(0) +
2036 (~a.VsrD(1) < b.VsrD(1));
b41da4eb
TM		 2037 avr_qw_not(&not_a, a);
2038 return avr_qw_cmpu(not_a, b) < 0;
2039}
2040
2041#endif
2042
2043void helper_vadduqm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2044{
2045#ifdef CONFIG_INT128
2046 r->u128 = a->u128 + b->u128;
2047#else
2048 avr_qw_add(r, *a, *b);
2049#endif
2050}
2051
2052void helper_vaddeuqm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
2053{
2054#ifdef CONFIG_INT128
2055 r->u128 = a->u128 + b->u128 + (c->u128 & 1);
2056#else
2057
3c385a93 2058 if (c->VsrD(1) & 1) {
b41da4eb
TM		 2059 ppc_avr_t tmp;
2060
3c385a93
MCA		 2061 tmp.VsrD(0) = 0;
2062 tmp.VsrD(1) = c->VsrD(1) & 1;
b41da4eb
TM		 2063 avr_qw_add(&tmp, *a, tmp);
2064 avr_qw_add(r, tmp, *b);
2065 } else {
2066 avr_qw_add(r, *a, *b);
2067 }
2068#endif
2069}
2070
2071void helper_vaddcuq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2072{
2073#ifdef CONFIG_INT128
2074 r->u128 = (~a->u128 < b->u128);
2075#else
2076 ppc_avr_t not_a;
2077
2078 avr_qw_not(&not_a, *a);
2079
3c385a93
MCA		 2080 r->VsrD(0) = 0;
2081 r->VsrD(1) = (avr_qw_cmpu(not_a, *b) < 0);
b41da4eb
TM		 2082#endif
2083}
2084
2085void helper_vaddecuq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
2086{
2087#ifdef CONFIG_INT128
2088 int carry_out = (~a->u128 < b->u128);
2089 if (!carry_out && (c->u128 & 1)) {
2090 carry_out = ((a->u128 + b->u128 + 1) == 0) &&
2091 ((a->u128 != 0) || (b->u128 != 0));
2092 }
2093 r->u128 = carry_out;
2094#else
2095
3c385a93 2096 int carry_in = c->VsrD(1) & 1;
b41da4eb
TM		 2097 int carry_out = 0;
2098 ppc_avr_t tmp;
2099
2100 carry_out = avr_qw_addc(&tmp, *a, *b);
2101
2102 if (!carry_out && carry_in) {
2103 ppc_avr_t one = QW_ONE;
2104 carry_out = avr_qw_addc(&tmp, tmp, one);
2105 }
3c385a93
MCA		 2106 r->VsrD(0) = 0;
2107 r->VsrD(1) = carry_out;
b41da4eb
TM		 2108#endif
2109}
2110
2111void helper_vsubuqm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2112{
2113#ifdef CONFIG_INT128
2114 r->u128 = a->u128 - b->u128;
2115#else
2116 ppc_avr_t tmp;
2117 ppc_avr_t one = QW_ONE;
2118
2119 avr_qw_not(&tmp, *b);
2120 avr_qw_add(&tmp, *a, tmp);
2121 avr_qw_add(r, tmp, one);
2122#endif
2123}
2124
2125void helper_vsubeuqm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
2126{
2127#ifdef CONFIG_INT128
2128 r->u128 = a->u128 + ~b->u128 + (c->u128 & 1);
2129#else
2130 ppc_avr_t tmp, sum;
2131
2132 avr_qw_not(&tmp, *b);
2133 avr_qw_add(&sum, *a, tmp);
2134
3c385a93
MCA		 2135 tmp.VsrD(0) = 0;
2136 tmp.VsrD(1) = c->VsrD(1) & 1;
b41da4eb
TM		 2137 avr_qw_add(r, sum, tmp);
2138#endif
2139}
2140
2141void helper_vsubcuq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2142{
2143#ifdef CONFIG_INT128
2144 r->u128 = (~a->u128 < ~b->u128) ||
2145 (a->u128 + ~b->u128 == (__uint128_t)-1);
2146#else
2147 int carry = (avr_qw_cmpu(*a, *b) > 0);
2148 if (!carry) {
2149 ppc_avr_t tmp;
2150 avr_qw_not(&tmp, *b);
2151 avr_qw_add(&tmp, *a, tmp);
3c385a93 2152 carry = ((tmp.VsrSD(0) == -1ull) && (tmp.VsrSD(1) == -1ull));
b41da4eb 2153 }
3c385a93
MCA		 2154 r->VsrD(0) = 0;
2155 r->VsrD(1) = carry;
b41da4eb
TM		 2156#endif
2157}
2158
2159void helper_vsubecuq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
2160{
2161#ifdef CONFIG_INT128
2162 r->u128 =
2163 (~a->u128 < ~b->u128) ||
2164 ((c->u128 & 1) && (a->u128 + ~b->u128 == (__uint128_t)-1));
2165#else
3c385a93 2166 int carry_in = c->VsrD(1) & 1;
b41da4eb
TM		 2167 int carry_out = (avr_qw_cmpu(*a, *b) > 0);
2168 if (!carry_out && carry_in) {
2169 ppc_avr_t tmp;
2170 avr_qw_not(&tmp, *b);
2171 avr_qw_add(&tmp, *a, tmp);
3c385a93 2172 carry_out = ((tmp.VsrD(0) == -1ull) && (tmp.VsrD(1) == -1ull));
b41da4eb
TM		 2173 }
2174
3c385a93
MCA		 2175 r->VsrD(0) = 0;
2176 r->VsrD(1) = carry_out;
b41da4eb
TM		 2177#endif
2178}
2179
e8f7b27b
TM		 2180#define BCD_PLUS_PREF_1 0xC
2181#define BCD_PLUS_PREF_2 0xF
2182#define BCD_PLUS_ALT_1 0xA
2183#define BCD_NEG_PREF 0xD
2184#define BCD_NEG_ALT 0xB
2185#define BCD_PLUS_ALT_2 0xE
b8155872
JRZ		 2186#define NATIONAL_PLUS 0x2B
2187#define NATIONAL_NEG 0x2D
e8f7b27b 2188
365206ae 2189#define BCD_DIG_BYTE(n) (15 - ((n) / 2))
e8f7b27b
TM		 2190
2191static int bcd_get_sgn(ppc_avr_t *bcd)
2192{
428115c3 2193 switch (bcd->VsrB(BCD_DIG_BYTE(0)) & 0xF) {
e8f7b27b
TM		 2194 case BCD_PLUS_PREF_1:
2195 case BCD_PLUS_PREF_2:
2196 case BCD_PLUS_ALT_1:
2197 case BCD_PLUS_ALT_2:
2198 {
2199 return 1;
2200 }
2201
2202 case BCD_NEG_PREF:
2203 case BCD_NEG_ALT:
2204 {
2205 return -1;
2206 }
2207
2208 default:
2209 {
2210 return 0;
2211 }
2212 }
2213}
2214
2215static int bcd_preferred_sgn(int sgn, int ps)
2216{
2217 if (sgn >= 0) {
2218 return (ps == 0) ? BCD_PLUS_PREF_1 : BCD_PLUS_PREF_2;
2219 } else {
2220 return BCD_NEG_PREF;
2221 }
2222}
2223
2224static uint8_t bcd_get_digit(ppc_avr_t *bcd, int n, int *invalid)
2225{
2226 uint8_t result;
2227 if (n & 1) {
428115c3 2228 result = bcd->VsrB(BCD_DIG_BYTE(n)) >> 4;
e8f7b27b 2229 } else {
428115c3 2230 result = bcd->VsrB(BCD_DIG_BYTE(n)) & 0xF;
e8f7b27b
TM		 2231 }
2232
2233 if (unlikely(result > 9)) {
2234 *invalid = true;
2235 }
2236 return result;
2237}
2238
2239static void bcd_put_digit(ppc_avr_t *bcd, uint8_t digit, int n)
2240{
2241 if (n & 1) {
428115c3
MCA		 2242 bcd->VsrB(BCD_DIG_BYTE(n)) &= 0x0F;
2243 bcd->VsrB(BCD_DIG_BYTE(n)) |= (digit << 4);
e8f7b27b 2244 } else {
428115c3
MCA		 2245 bcd->VsrB(BCD_DIG_BYTE(n)) &= 0xF0;
2246 bcd->VsrB(BCD_DIG_BYTE(n)) |= digit;
e8f7b27b
TM		 2247 }
2248}
2249
071663df
JRZ		 2250static bool bcd_is_valid(ppc_avr_t *bcd)
2251{
2252 int i;
2253 int invalid = 0;
2254
2255 if (bcd_get_sgn(bcd) == 0) {
2256 return false;
2257 }
2258
2259 for (i = 1; i < 32; i++) {
2260 bcd_get_digit(bcd, i, &invalid);
2261 if (unlikely(invalid)) {
2262 return false;
2263 }
2264 }
2265 return true;
2266}
2267
b8155872
JRZ		 2268static int bcd_cmp_zero(ppc_avr_t *bcd)
2269{
3c385a93 2270 if (bcd->VsrD(0) == 0 && (bcd->VsrD(1) >> 4) == 0) {
efa73196 2271 return CRF_EQ;
b8155872 2272 } else {
efa73196 2273 return (bcd_get_sgn(bcd) == 1) ? CRF_GT : CRF_LT;
b8155872
JRZ		 2274 }
2275}
2276
2277static uint16_t get_national_digit(ppc_avr_t *reg, int n)
2278{
60594fea 2279 return reg->VsrH(7 - n);
b8155872
JRZ		 2280}
2281
e2106d73
JRZ		 2282static void set_national_digit(ppc_avr_t *reg, uint8_t val, int n)
2283{
60594fea 2284 reg->VsrH(7 - n) = val;
e2106d73
JRZ		 2285}
2286
e8f7b27b
TM		 2287static int bcd_cmp_mag(ppc_avr_t *a, ppc_avr_t *b)
2288{
2289 int i;
2290 int invalid = 0;
2291 for (i = 31; i > 0; i--) {
2292 uint8_t dig_a = bcd_get_digit(a, i, &invalid);
2293 uint8_t dig_b = bcd_get_digit(b, i, &invalid);
2294 if (unlikely(invalid)) {
3b163b01 2295 return 0; /* doesn't matter */
e8f7b27b
TM		 2296 } else if (dig_a > dig_b) {
2297 return 1;
2298 } else if (dig_a < dig_b) {
2299 return -1;
2300 }
2301 }
2302
2303 return 0;
2304}
2305
936fda4d 2306static int bcd_add_mag(ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, int *invalid,
e8f7b27b
TM		 2307 int *overflow)
2308{
2309 int carry = 0;
2310 int i;
936fda4d
FR		 2311 int is_zero = 1;
2312
e8f7b27b
TM		 2313 for (i = 1; i <= 31; i++) {
2314 uint8_t digit = bcd_get_digit(a, i, invalid) +
2315 bcd_get_digit(b, i, invalid) + carry;
936fda4d 2316 is_zero &= (digit == 0);
e8f7b27b
TM		 2317 if (digit > 9) {
2318 carry = 1;
2319 digit -= 10;
2320 } else {
2321 carry = 0;
2322 }
2323
2324 bcd_put_digit(t, digit, i);
e8f7b27b
TM		 2325 }
2326
2327 *overflow = carry;
936fda4d 2328 return is_zero;
e8f7b27b
TM		 2329}
2330
d03b174a 2331static void bcd_sub_mag(ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, int *invalid,
e8f7b27b
TM		 2332 int *overflow)
2333{
2334 int carry = 0;
2335 int i;
d03b174a 2336
e8f7b27b
TM		 2337 for (i = 1; i <= 31; i++) {
2338 uint8_t digit = bcd_get_digit(a, i, invalid) -
2339 bcd_get_digit(b, i, invalid) + carry;
e8f7b27b
TM		 2340 if (digit & 0x80) {
2341 carry = -1;
2342 digit += 10;
2343 } else {
2344 carry = 0;
2345 }
2346
2347 bcd_put_digit(t, digit, i);
e8f7b27b
TM		 2348 }
2349
2350 *overflow = carry;
e8f7b27b
TM		 2351}
2352
2353uint32_t helper_bcdadd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2354{
2355
2356 int sgna = bcd_get_sgn(a);
2357 int sgnb = bcd_get_sgn(b);
2358 int invalid = (sgna == 0) || (sgnb == 0);
2359 int overflow = 0;
936fda4d 2360 int zero = 0;
e8f7b27b
TM		 2361 uint32_t cr = 0;
2362 ppc_avr_t result = { .u64 = { 0, 0 } };
2363
2364 if (!invalid) {
2365 if (sgna == sgnb) {
428115c3 2366 result.VsrB(BCD_DIG_BYTE(0)) = bcd_preferred_sgn(sgna, ps);
936fda4d
FR		 2367 zero = bcd_add_mag(&result, a, b, &invalid, &overflow);
2368 cr = (sgna > 0) ? CRF_GT : CRF_LT;
e8f7b27b 2369 } else {
d03b174a
YB		 2370 int magnitude = bcd_cmp_mag(a, b);
2371 if (magnitude > 0) {
428115c3 2372 result.VsrB(BCD_DIG_BYTE(0)) = bcd_preferred_sgn(sgna, ps);
d03b174a
YB		 2373 bcd_sub_mag(&result, a, b, &invalid, &overflow);
2374 cr = (sgna > 0) ? CRF_GT : CRF_LT;
2375 } else if (magnitude < 0) {
428115c3 2376 result.VsrB(BCD_DIG_BYTE(0)) = bcd_preferred_sgn(sgnb, ps);
d03b174a
YB		 2377 bcd_sub_mag(&result, b, a, &invalid, &overflow);
2378 cr = (sgnb > 0) ? CRF_GT : CRF_LT;
2379 } else {
428115c3 2380 result.VsrB(BCD_DIG_BYTE(0)) = bcd_preferred_sgn(0, ps);
d03b174a
YB		 2381 cr = CRF_EQ;
2382 }
e8f7b27b
TM		 2383 }
2384 }
2385
2386 if (unlikely(invalid)) {
3c385a93 2387 result.VsrD(0) = result.VsrD(1) = -1;
efa73196 2388 cr = CRF_SO;
e8f7b27b 2389 } else if (overflow) {
efa73196 2390 cr |= CRF_SO;
936fda4d
FR		 2391 } else if (zero) {
2392 cr |= CRF_EQ;
e8f7b27b
TM		 2393 }
2394
2395 *r = result;
2396
2397 return cr;
2398}
2399
2400uint32_t helper_bcdsub(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2401{
2402 ppc_avr_t bcopy = *b;
2403 int sgnb = bcd_get_sgn(b);
2404 if (sgnb < 0) {
2405 bcd_put_digit(&bcopy, BCD_PLUS_PREF_1, 0);
2406 } else if (sgnb > 0) {
2407 bcd_put_digit(&bcopy, BCD_NEG_PREF, 0);
2408 }
2409 /* else invalid ... defer to bcdadd code for proper handling */
2410
2411 return helper_bcdadd(r, a, &bcopy, ps);
2412}
f293f04a 2413
b8155872
JRZ		 2414uint32_t helper_bcdcfn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
2415{
2416 int i;
2417 int cr = 0;
2418 uint16_t national = 0;
2419 uint16_t sgnb = get_national_digit(b, 0);
2420 ppc_avr_t ret = { .u64 = { 0, 0 } };
2421 int invalid = (sgnb != NATIONAL_PLUS && sgnb != NATIONAL_NEG);
2422
2423 for (i = 1; i < 8; i++) {
2424 national = get_national_digit(b, i);
2425 if (unlikely(national < 0x30 || national > 0x39)) {
2426 invalid = 1;
2427 break;
2428 }
2429
2430 bcd_put_digit(&ret, national & 0xf, i);
2431 }
2432
2433 if (sgnb == NATIONAL_PLUS) {
2434 bcd_put_digit(&ret, (ps == 0) ? BCD_PLUS_PREF_1 : BCD_PLUS_PREF_2, 0);
2435 } else {
2436 bcd_put_digit(&ret, BCD_NEG_PREF, 0);
2437 }
2438
2439 cr = bcd_cmp_zero(&ret);
2440
2441 if (unlikely(invalid)) {
efa73196 2442 cr = CRF_SO;
b8155872
JRZ		 2443 }
2444
2445 *r = ret;
2446
2447 return cr;
2448}
2449
e2106d73
JRZ		 2450uint32_t helper_bcdctn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
2451{
2452 int i;
2453 int cr = 0;
2454 int sgnb = bcd_get_sgn(b);
2455 int invalid = (sgnb == 0);
2456 ppc_avr_t ret = { .u64 = { 0, 0 } };
2457
3c385a93 2458 int ox_flag = (b->VsrD(0) != 0) || ((b->VsrD(1) >> 32) != 0);
e2106d73
JRZ		 2459
2460 for (i = 1; i < 8; i++) {
2461 set_national_digit(&ret, 0x30 + bcd_get_digit(b, i, &invalid), i);
2462
2463 if (unlikely(invalid)) {
2464 break;
2465 }
2466 }
2467 set_national_digit(&ret, (sgnb == -1) ? NATIONAL_NEG : NATIONAL_PLUS, 0);
2468
2469 cr = bcd_cmp_zero(b);
2470
2471 if (ox_flag) {
efa73196 2472 cr |= CRF_SO;
e2106d73
JRZ		 2473 }
2474
2475 if (unlikely(invalid)) {
efa73196 2476 cr = CRF_SO;
e2106d73
JRZ		 2477 }
2478
2479 *r = ret;
2480
2481 return cr;
2482}
2483
38f4cb04
JRZ		 2484uint32_t helper_bcdcfz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
2485{
2486 int i;
2487 int cr = 0;
2488 int invalid = 0;
2489 int zone_digit = 0;
2490 int zone_lead = ps ? 0xF : 0x3;
2491 int digit = 0;
2492 ppc_avr_t ret = { .u64 = { 0, 0 } };
428115c3 2493 int sgnb = b->VsrB(BCD_DIG_BYTE(0)) >> 4;
38f4cb04
JRZ		 2494
2495 if (unlikely((sgnb < 0xA) && ps)) {
2496 invalid = 1;
2497 }
2498
2499 for (i = 0; i < 16; i++) {
428115c3
MCA		 2500 zone_digit = i ? b->VsrB(BCD_DIG_BYTE(i * 2)) >> 4 : zone_lead;
2501 digit = b->VsrB(BCD_DIG_BYTE(i * 2)) & 0xF;
38f4cb04
JRZ		 2502 if (unlikely(zone_digit != zone_lead || digit > 0x9)) {
2503 invalid = 1;
2504 break;
2505 }
2506
2507 bcd_put_digit(&ret, digit, i + 1);
2508 }
2509
2510 if ((ps && (sgnb == 0xB || sgnb == 0xD)) ||
2511 (!ps && (sgnb & 0x4))) {
2512 bcd_put_digit(&ret, BCD_NEG_PREF, 0);
2513 } else {
2514 bcd_put_digit(&ret, BCD_PLUS_PREF_1, 0);
2515 }
2516
2517 cr = bcd_cmp_zero(&ret);
2518
2519 if (unlikely(invalid)) {
efa73196 2520 cr = CRF_SO;
38f4cb04
JRZ		 2521 }
2522
2523 *r = ret;
2524
2525 return cr;
2526}
2527
0a890b31
JRZ		 2528uint32_t helper_bcdctz(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
2529{
2530 int i;
2531 int cr = 0;
2532 uint8_t digit = 0;
2533 int sgnb = bcd_get_sgn(b);
2534 int zone_lead = (ps) ? 0xF0 : 0x30;
2535 int invalid = (sgnb == 0);
2536 ppc_avr_t ret = { .u64 = { 0, 0 } };
2537
3c385a93 2538 int ox_flag = ((b->VsrD(0) >> 4) != 0);
0a890b31
JRZ		 2539
2540 for (i = 0; i < 16; i++) {
2541 digit = bcd_get_digit(b, i + 1, &invalid);
2542
2543 if (unlikely(invalid)) {
2544 break;
2545 }
2546
428115c3 2547 ret.VsrB(BCD_DIG_BYTE(i * 2)) = zone_lead + digit;
0a890b31
JRZ		 2548 }
2549
2550 if (ps) {
2551 bcd_put_digit(&ret, (sgnb == 1) ? 0xC : 0xD, 1);
2552 } else {
2553 bcd_put_digit(&ret, (sgnb == 1) ? 0x3 : 0x7, 1);
2554 }
2555
2556 cr = bcd_cmp_zero(b);
2557
2558 if (ox_flag) {
efa73196 2559 cr |= CRF_SO;
0a890b31
JRZ		 2560 }
2561
2562 if (unlikely(invalid)) {
efa73196 2563 cr = CRF_SO;
0a890b31
JRZ		 2564 }
2565
2566 *r = ret;
2567
2568 return cr;
2569}
2570
a3d67f3e
LP		 2571/**
2572 * Compare 2 128-bit unsigned integers, passed in as unsigned 64-bit pairs
2573 *
2574 * Returns:
2575 * > 0 if ahi|alo > bhi|blo,
2576 * 0 if ahi|alo == bhi|blo,
2577 * < 0 if ahi|alo < bhi|blo
2578 */
2579static inline int ucmp128(uint64_t alo, uint64_t ahi,
2580 uint64_t blo, uint64_t bhi)
2581{
2582 return (ahi == bhi) ?
2583 (alo > blo ? 1 : (alo == blo ? 0 : -1)) :
2584 (ahi > bhi ? 1 : -1);
2585}
2586
a406c058
JRZ		 2587uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
2588{
2589 int i;
a3d67f3e 2590 int cr;
a406c058
JRZ		 2591 uint64_t lo_value;
2592 uint64_t hi_value;
40f3e79a 2593 uint64_t rem;
a406c058
JRZ		 2594 ppc_avr_t ret = { .u64 = { 0, 0 } };
2595
3c385a93
MCA		 2596 if (b->VsrSD(0) < 0) {
2597 lo_value = -b->VsrSD(1);
2598 hi_value = ~b->VsrD(0) + !lo_value;
a406c058 2599 bcd_put_digit(&ret, 0xD, 0);
a3d67f3e
LP		 2600
2601 cr = CRF_LT;
a406c058 2602 } else {
3c385a93
MCA		 2603 lo_value = b->VsrD(1);
2604 hi_value = b->VsrD(0);
a406c058 2605 bcd_put_digit(&ret, bcd_preferred_sgn(0, ps), 0);
a406c058 2606
a3d67f3e
LP		 2607 if (hi_value == 0 && lo_value == 0) {
2608 cr = CRF_EQ;
2609 } else {
2610 cr = CRF_GT;
2611 }
a406c058
JRZ		 2612 }
2613
a3d67f3e
LP		 2614 /*
2615 * Check src limits: abs(src) <= 10^31 - 1
2616 *
2617 * 10^31 - 1 = 0x0000007e37be2022 c0914b267fffffff
2618 */
2619 if (ucmp128(lo_value, hi_value,
2620 0xc0914b267fffffffULL, 0x7e37be2022ULL) > 0) {
2621 cr |= CRF_SO;
a406c058 2622
a3d67f3e
LP		 2623 /*
2624 * According to the ISA, if src wouldn't fit in the destination
2625 * register, the result is undefined.
2626 * In that case, we leave r unchanged.
2627 */
2628 } else {
40f3e79a 2629 rem = divu128(&lo_value, &hi_value, 1000000000000000ULL);
a406c058 2630
40f3e79a
LP		 2631 for (i = 1; i < 16; rem /= 10, i++) {
2632 bcd_put_digit(&ret, rem % 10, i);
a3d67f3e 2633 }
a406c058 2634
a3d67f3e
LP		 2635 for (; i < 32; lo_value /= 10, i++) {
2636 bcd_put_digit(&ret, lo_value % 10, i);
2637 }
2638
2639 *r = ret;
2640 }
a406c058
JRZ		 2641
2642 return cr;
2643}
2644
c85bc7dd
JRZ		 2645uint32_t helper_bcdctsq(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
2646{
2647 uint8_t i;
2648 int cr;
2649 uint64_t carry;
2650 uint64_t unused;
2651 uint64_t lo_value;
2652 uint64_t hi_value = 0;
2653 int sgnb = bcd_get_sgn(b);
2654 int invalid = (sgnb == 0);
2655
2656 lo_value = bcd_get_digit(b, 31, &invalid);
2657 for (i = 30; i > 0; i--) {
2658 mulu64(&lo_value, &carry, lo_value, 10ULL);
2659 mulu64(&hi_value, &unused, hi_value, 10ULL);
2660 lo_value += bcd_get_digit(b, i, &invalid);
2661 hi_value += carry;
2662
2663 if (unlikely(invalid)) {
2664 break;
2665 }
2666 }
2667
2668 if (sgnb == -1) {
3c385a93
MCA		 2669 r->VsrSD(1) = -lo_value;
2670 r->VsrSD(0) = ~hi_value + !r->VsrSD(1);
c85bc7dd 2671 } else {
3c385a93
MCA		 2672 r->VsrSD(1) = lo_value;
2673 r->VsrSD(0) = hi_value;
c85bc7dd
JRZ		 2674 }
2675
2676 cr = bcd_cmp_zero(b);
2677
2678 if (unlikely(invalid)) {
2679 cr = CRF_SO;
2680 }
2681
2682 return cr;
2683}
2684
c3025c3b
JRZ		 2685uint32_t helper_bcdcpsgn(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2686{
2687 int i;
2688 int invalid = 0;
2689
2690 if (bcd_get_sgn(a) == 0 || bcd_get_sgn(b) == 0) {
2691 return CRF_SO;
2692 }
2693
2694 *r = *a;
428115c3 2695 bcd_put_digit(r, b->VsrB(BCD_DIG_BYTE(0)) & 0xF, 0);
c3025c3b
JRZ		 2696
2697 for (i = 1; i < 32; i++) {
2698 bcd_get_digit(a, i, &invalid);
2699 bcd_get_digit(b, i, &invalid);
2700 if (unlikely(invalid)) {
2701 return CRF_SO;
2702 }
2703 }
2704
2705 return bcd_cmp_zero(r);
2706}
2707
466a3f9c
JRZ		 2708uint32_t helper_bcdsetsgn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
2709{
466a3f9c
JRZ		 2710 int sgnb = bcd_get_sgn(b);
2711
2712 *r = *b;
2713 bcd_put_digit(r, bcd_preferred_sgn(sgnb, ps), 0);
2714
071663df
JRZ		 2715 if (bcd_is_valid(b) == false) {
2716 return CRF_SO;
466a3f9c
JRZ		 2717 }
2718
2719 return bcd_cmp_zero(r);
2720}
2721
e04797f7
JRZ		 2722uint32_t helper_bcds(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2723{
2724 int cr;
428115c3 2725 int i = a->VsrSB(7);
e04797f7
JRZ		 2726 bool ox_flag = false;
2727 int sgnb = bcd_get_sgn(b);
2728 ppc_avr_t ret = *b;
3c385a93 2729 ret.VsrD(1) &= ~0xf;
e04797f7
JRZ		 2730
2731 if (bcd_is_valid(b) == false) {
2732 return CRF_SO;
2733 }
2734
2735 if (unlikely(i > 31)) {
2736 i = 31;
2737 } else if (unlikely(i < -31)) {
2738 i = -31;
2739 }
2740
2741 if (i > 0) {
3c385a93 2742 ulshift(&ret.VsrD(1), &ret.VsrD(0), i * 4, &ox_flag);
e04797f7 2743 } else {
3c385a93 2744 urshift(&ret.VsrD(1), &ret.VsrD(0), -i * 4);
e04797f7
JRZ		 2745 }
2746 bcd_put_digit(&ret, bcd_preferred_sgn(sgnb, ps), 0);
2747
2748 *r = ret;
2749
2750 cr = bcd_cmp_zero(r);
2751 if (ox_flag) {
2752 cr |= CRF_SO;
2753 }
2754
2755 return cr;
2756}
2757
a49a95e9
JRZ		 2758uint32_t helper_bcdus(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2759{
2760 int cr;
2761 int i;
2762 int invalid = 0;
2763 bool ox_flag = false;
2764 ppc_avr_t ret = *b;
2765
2766 for (i = 0; i < 32; i++) {
2767 bcd_get_digit(b, i, &invalid);
2768
2769 if (unlikely(invalid)) {
2770 return CRF_SO;
2771 }
2772 }
2773
428115c3 2774 i = a->VsrSB(7);
a49a95e9
JRZ		 2775 if (i >= 32) {
2776 ox_flag = true;
3c385a93 2777 ret.VsrD(1) = ret.VsrD(0) = 0;
a49a95e9 2778 } else if (i <= -32) {
3c385a93 2779 ret.VsrD(1) = ret.VsrD(0) = 0;
a49a95e9 2780 } else if (i > 0) {
3c385a93 2781 ulshift(&ret.VsrD(1), &ret.VsrD(0), i * 4, &ox_flag);
a49a95e9 2782 } else {
3c385a93 2783 urshift(&ret.VsrD(1), &ret.VsrD(0), -i * 4);
a49a95e9
JRZ		 2784 }
2785 *r = ret;
2786
2787 cr = bcd_cmp_zero(r);
2788 if (ox_flag) {
2789 cr |= CRF_SO;
2790 }
2791
2792 return cr;
2793}
2794
a54238ad
JRZ		 2795uint32_t helper_bcdsr(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2796{
2797 int cr;
2798 int unused = 0;
2799 int invalid = 0;
2800 bool ox_flag = false;
2801 int sgnb = bcd_get_sgn(b);
2802 ppc_avr_t ret = *b;
3c385a93 2803 ret.VsrD(1) &= ~0xf;
a54238ad 2804
428115c3
MCA		 2805 int i = a->VsrSB(7);
2806 ppc_avr_t bcd_one;
2807
2808 bcd_one.VsrD(0) = 0;
2809 bcd_one.VsrD(1) = 0x10;
a54238ad
JRZ		 2810
2811 if (bcd_is_valid(b) == false) {
2812 return CRF_SO;
2813 }
2814
2815 if (unlikely(i > 31)) {
2816 i = 31;
2817 } else if (unlikely(i < -31)) {
2818 i = -31;
2819 }
2820
2821 if (i > 0) {
3c385a93 2822 ulshift(&ret.VsrD(1), &ret.VsrD(0), i * 4, &ox_flag);
a54238ad 2823 } else {
3c385a93 2824 urshift(&ret.VsrD(1), &ret.VsrD(0), -i * 4);
a54238ad
JRZ		 2825
2826 if (bcd_get_digit(&ret, 0, &invalid) >= 5) {
2827 bcd_add_mag(&ret, &ret, &bcd_one, &invalid, &unused);
2828 }
2829 }
2830 bcd_put_digit(&ret, bcd_preferred_sgn(sgnb, ps), 0);
2831
2832 cr = bcd_cmp_zero(&ret);
2833 if (ox_flag) {
2834 cr |= CRF_SO;
2835 }
2836 *r = ret;
2837
2838 return cr;
2839}
2840
31bc4d11
JRZ		 2841uint32_t helper_bcdtrunc(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2842{
2843 uint64_t mask;
2844 uint32_t ox_flag = 0;
428115c3 2845 int i = a->VsrSH(3) + 1;
31bc4d11
JRZ		 2846 ppc_avr_t ret = *b;
2847
2848 if (bcd_is_valid(b) == false) {
2849 return CRF_SO;
2850 }
2851
2852 if (i > 16 && i < 32) {
2853 mask = (uint64_t)-1 >> (128 - i * 4);
3c385a93 2854 if (ret.VsrD(0) & ~mask) {
31bc4d11
JRZ		 2855 ox_flag = CRF_SO;
2856 }
2857
3c385a93 2858 ret.VsrD(0) &= mask;
31bc4d11
JRZ		 2859 } else if (i >= 0 && i <= 16) {
2860 mask = (uint64_t)-1 >> (64 - i * 4);
3c385a93 2861 if (ret.VsrD(0) || (ret.VsrD(1) & ~mask)) {
31bc4d11
JRZ		 2862 ox_flag = CRF_SO;
2863 }
2864
3c385a93
MCA		 2865 ret.VsrD(1) &= mask;
2866 ret.VsrD(0) = 0;
31bc4d11
JRZ		 2867 }
2868 bcd_put_digit(&ret, bcd_preferred_sgn(bcd_get_sgn(b), ps), 0);
2869 *r = ret;
2870
2871 return bcd_cmp_zero(&ret) | ox_flag;
2872}
2873
5c32e2e4
JRZ		 2874uint32_t helper_bcdutrunc(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
2875{
2876 int i;
2877 uint64_t mask;
2878 uint32_t ox_flag = 0;
2879 int invalid = 0;
2880 ppc_avr_t ret = *b;
2881
2882 for (i = 0; i < 32; i++) {
2883 bcd_get_digit(b, i, &invalid);
2884
2885 if (unlikely(invalid)) {
2886 return CRF_SO;
2887 }
2888 }
2889
428115c3 2890 i = a->VsrSH(3);
5c32e2e4
JRZ		 2891 if (i > 16 && i < 33) {
2892 mask = (uint64_t)-1 >> (128 - i * 4);
3c385a93 2893 if (ret.VsrD(0) & ~mask) {
5c32e2e4
JRZ		 2894 ox_flag = CRF_SO;
2895 }
2896
3c385a93 2897 ret.VsrD(0) &= mask;
5c32e2e4
JRZ		 2898 } else if (i > 0 && i <= 16) {
2899 mask = (uint64_t)-1 >> (64 - i * 4);
3c385a93 2900 if (ret.VsrD(0) || (ret.VsrD(1) & ~mask)) {
5c32e2e4
JRZ		 2901 ox_flag = CRF_SO;
2902 }
2903
3c385a93
MCA		 2904 ret.VsrD(1) &= mask;
2905 ret.VsrD(0) = 0;
5c32e2e4 2906 } else if (i == 0) {
3c385a93 2907 if (ret.VsrD(0) || ret.VsrD(1)) {
5c32e2e4
JRZ		 2908 ox_flag = CRF_SO;
2909 }
3c385a93 2910 ret.VsrD(0) = ret.VsrD(1) = 0;
5c32e2e4
JRZ		 2911 }
2912
2913 *r = ret;
3c385a93 2914 if (r->VsrD(0) == 0 && r->VsrD(1) == 0) {
5c32e2e4
JRZ		 2915 return ox_flag | CRF_EQ;
2916 }
2917
2918 return ox_flag | CRF_GT;
2919}
2920
c1542453 2921void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
557d52fa
TM		 2922{
2923 int i;
2924 VECTOR_FOR_INORDER_I(i, u8) {
c1542453 2925 r->u8[i] = AES_sbox[a->u8[i]];
557d52fa
TM		 2926 }
2927}
2928
c1542453 2929void helper_vcipher(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
557d52fa 2930{
65cf1f65 2931 ppc_avr_t result;
557d52fa 2932 int i;
557d52fa 2933
c1542453 2934 VECTOR_FOR_INORDER_I(i, u32) {
2dea57db
MCA		 2935 result.VsrW(i) = b->VsrW(i) ^
2936 (AES_Te0[a->VsrB(AES_shifts[4 * i + 0])] ^
2937 AES_Te1[a->VsrB(AES_shifts[4 * i + 1])] ^
2938 AES_Te2[a->VsrB(AES_shifts[4 * i + 2])] ^
2939 AES_Te3[a->VsrB(AES_shifts[4 * i + 3])]);
557d52fa 2940 }
65cf1f65 2941 *r = result;
557d52fa
TM		 2942}
2943
557d52fa
TM		 2944void helper_vcipherlast(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2945{
65cf1f65 2946 ppc_avr_t result;
c1542453
TM		 2947 int i;
2948
2949 VECTOR_FOR_INORDER_I(i, u8) {
2dea57db 2950 result.VsrB(i) = b->VsrB(i) ^ (AES_sbox[a->VsrB(AES_shifts[i])]);
c1542453 2951 }
65cf1f65 2952 *r = result;
557d52fa
TM		 2953}
2954
2955void helper_vncipher(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2956{
2957 /* This differs from what is written in ISA V2.07. The RTL is */
2958 /* incorrect and will be fixed in V2.07B. */
c1542453
TM		 2959 int i;
2960 ppc_avr_t tmp;
2961
2962 VECTOR_FOR_INORDER_I(i, u8) {
2dea57db 2963 tmp.VsrB(i) = b->VsrB(i) ^ AES_isbox[a->VsrB(AES_ishifts[i])];
c1542453
TM		 2964 }
2965
2966 VECTOR_FOR_INORDER_I(i, u32) {
2dea57db
MCA		 2967 r->VsrW(i) =
2968 AES_imc[tmp.VsrB(4 * i + 0)][0] ^
2969 AES_imc[tmp.VsrB(4 * i + 1)][1] ^
2970 AES_imc[tmp.VsrB(4 * i + 2)][2] ^
2971 AES_imc[tmp.VsrB(4 * i + 3)][3];
c1542453 2972 }
557d52fa
TM		 2973}
2974
2975void helper_vncipherlast(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
2976{
65cf1f65 2977 ppc_avr_t result;
c1542453
TM		 2978 int i;
2979
2980 VECTOR_FOR_INORDER_I(i, u8) {
2dea57db 2981 result.VsrB(i) = b->VsrB(i) ^ (AES_isbox[a->VsrB(AES_ishifts[i])]);
c1542453 2982 }
65cf1f65 2983 *r = result;
557d52fa
TM		 2984}
2985
57354f8f
TM		 2986void helper_vshasigmaw(ppc_avr_t *r, ppc_avr_t *a, uint32_t st_six)
2987{
2988 int st = (st_six & 0x10) != 0;
2989 int six = st_six & 0xF;
2990 int i;
2991
730d2ca3 2992 for (i = 0; i < ARRAY_SIZE(r->u32); i++) {
57354f8f
TM		 2993 if (st == 0) {
2994 if ((six & (0x8 >> i)) == 0) {
0ef83bf2
MCA		 2995 r->VsrW(i) = ror32(a->VsrW(i), 7) ^
2996 ror32(a->VsrW(i), 18) ^
730d2ca3 2997 (a->VsrW(i) >> 3);
57354f8f 2998 } else { /* six.bit[i] == 1 */
0ef83bf2
MCA		 2999 r->VsrW(i) = ror32(a->VsrW(i), 17) ^
3000 ror32(a->VsrW(i), 19) ^
730d2ca3 3001 (a->VsrW(i) >> 10);
57354f8f
TM		 3002 }
3003 } else { /* st == 1 */
3004 if ((six & (0x8 >> i)) == 0) {
0ef83bf2
MCA		 3005 r->VsrW(i) = ror32(a->VsrW(i), 2) ^
3006 ror32(a->VsrW(i), 13) ^
3007 ror32(a->VsrW(i), 22);
57354f8f 3008 } else { /* six.bit[i] == 1 */
0ef83bf2
MCA		 3009 r->VsrW(i) = ror32(a->VsrW(i), 6) ^
3010 ror32(a->VsrW(i), 11) ^
3011 ror32(a->VsrW(i), 25);
57354f8f
TM		 3012 }
3013 }
3014 }
3015}
3016
57354f8f
TM		 3017void helper_vshasigmad(ppc_avr_t *r, ppc_avr_t *a, uint32_t st_six)
3018{
3019 int st = (st_six & 0x10) != 0;
3020 int six = st_six & 0xF;
3021 int i;
3022
730d2ca3 3023 for (i = 0; i < ARRAY_SIZE(r->u64); i++) {
57354f8f 3024 if (st == 0) {
b6cb41b2 3025 if ((six & (0x8 >> (2 * i))) == 0) {
0ef83bf2
MCA		 3026 r->VsrD(i) = ror64(a->VsrD(i), 1) ^
3027 ror64(a->VsrD(i), 8) ^
730d2ca3 3028 (a->VsrD(i) >> 7);
57354f8f 3029 } else { /* six.bit[2*i] == 1 */
0ef83bf2
MCA		 3030 r->VsrD(i) = ror64(a->VsrD(i), 19) ^
3031 ror64(a->VsrD(i), 61) ^
730d2ca3 3032 (a->VsrD(i) >> 6);
57354f8f
TM		 3033 }
3034 } else { /* st == 1 */
b6cb41b2 3035 if ((six & (0x8 >> (2 * i))) == 0) {
0ef83bf2
MCA		 3036 r->VsrD(i) = ror64(a->VsrD(i), 28) ^
3037 ror64(a->VsrD(i), 34) ^
3038 ror64(a->VsrD(i), 39);
57354f8f 3039 } else { /* six.bit[2*i] == 1 */
0ef83bf2
MCA		 3040 r->VsrD(i) = ror64(a->VsrD(i), 14) ^
3041 ror64(a->VsrD(i), 18) ^
3042 ror64(a->VsrD(i), 41);
57354f8f
TM		 3043 }
3044 }
3045 }
3046}
3047
ac174549
TM		 3048void helper_vpermxor(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
3049{
65cf1f65 3050 ppc_avr_t result;
ac174549 3051 int i;
65cf1f65 3052
60594fea
MCA		 3053 for (i = 0; i < ARRAY_SIZE(r->u8); i++) {
3054 int indexA = c->VsrB(i) >> 4;
3055 int indexB = c->VsrB(i) & 0xF;
3056
3057 result.VsrB(i) = a->VsrB(indexA) ^ b->VsrB(indexB);
ac174549 3058 }
65cf1f65 3059 *r = result;
ac174549
TM		 3060}
3061
64654ded 3062#undef VECTOR_FOR_INORDER_I
64654ded
BS		 3063
3064/*****************************************************************************/
3065/* SPE extension helpers */
3066/* Use a table to make this quicker */
ea6c0dac 3067static const uint8_t hbrev[16] = {
64654ded
BS		 3068 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE,
3069 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF,
3070};
3071
3072static inline uint8_t byte_reverse(uint8_t val)
3073{
3074 return hbrev[val >> 4] | (hbrev[val & 0xF] << 4);
3075}
3076
3077static inline uint32_t word_reverse(uint32_t val)
3078{
3079 return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) |
3080 (byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24);
3081}
3082
3083#define MASKBITS 16 /* Random value - to be fixed (implementation dependent) */
3084target_ulong helper_brinc(target_ulong arg1, target_ulong arg2)
3085{
3086 uint32_t a, b, d, mask;
3087
3088 mask = UINT32_MAX >> (32 - MASKBITS);
3089 a = arg1 & mask;
3090 b = arg2 & mask;
3091 d = word_reverse(1 + word_reverse(a | ~b));
3092 return (arg1 & ~mask) | (d & b);
3093}
3094
3095uint32_t helper_cntlsw32(uint32_t val)
3096{
3097 if (val & 0x80000000) {
3098 return clz32(~val);
3099 } else {
3100 return clz32(val);
3101 }
3102}
3103
3104uint32_t helper_cntlzw32(uint32_t val)
3105{
3106 return clz32(val);
3107}
3108
3109/* 440 specific */
d15f74fb
BS		 3110target_ulong helper_dlmzb(CPUPPCState *env, target_ulong high,
3111 target_ulong low, uint32_t update_Rc)
64654ded
BS		 3112{
3113 target_ulong mask;
3114 int i;
3115
3116 i = 1;
3117 for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
3118 if ((high & mask) == 0) {
3119 if (update_Rc) {
3120 env->crf[0] = 0x4;
3121 }
3122 goto done;
3123 }
3124 i++;
3125 }
3126 for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
3127 if ((low & mask) == 0) {
3128 if (update_Rc) {
3129 env->crf[0] = 0x8;
3130 }
3131 goto done;
3132 }
3133 i++;
3134 }
ebbd8b40 3135 i = 8;
64654ded
BS		 3136 if (update_Rc) {
3137 env->crf[0] = 0x2;
3138 }
3139 done:
3140 env->xer = (env->xer & ~0x7F) | i;
3141 if (update_Rc) {
3142 env->crf[0] |= xer_so;
3143 }
3144 return i;
3145}
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