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Commit | Line | Data |
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d76d1650 AJ |
1 | /* |
2 | * Copyright 2008 IBM Corporation. | |
3 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | |
4 | * | |
5 | * This work is licensed under the GNU GPL license version 2 or later. | |
6 | * | |
7 | */ | |
8 | ||
2a6a4076 MA |
9 | #ifndef KVM_PPC_H |
10 | #define KVM_PPC_H | |
d76d1650 | 11 | |
c9137065 | 12 | #define TYPE_HOST_POWERPC_CPU POWERPC_CPU_TYPE_NAME("host") |
2985b86b | 13 | |
921e28db AG |
14 | #ifdef CONFIG_KVM |
15 | ||
dc333cd6 | 16 | uint32_t kvmppc_get_tbfreq(void); |
eadaada1 | 17 | uint64_t kvmppc_get_clockfreq(void); |
ef951443 ND |
18 | bool kvmppc_get_host_model(char **buf); |
19 | bool kvmppc_get_host_serial(char **buf); | |
1a61a9ae | 20 | int kvmppc_get_hasidle(CPUPPCState *env); |
1328c2bf | 21 | int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len); |
1bc22652 | 22 | int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level); |
026bfd89 | 23 | void kvmppc_enable_logical_ci_hcalls(void); |
ef9971dd | 24 | void kvmppc_enable_set_mode_hcall(void); |
5145ad4f | 25 | void kvmppc_enable_clear_ref_mod_hcalls(void); |
68f9f708 | 26 | void kvmppc_enable_h_page_init(void); |
82123b75 | 27 | void kvmppc_enable_h_rpt_invalidate(void); |
1bc22652 | 28 | void kvmppc_set_papr(PowerPCCPU *cpu); |
d6e166c0 | 29 | int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr); |
5b95b8b9 | 30 | void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy); |
ec010c00 | 31 | bool kvmppc_get_fwnmi(void); |
aef92d87 | 32 | int kvmppc_set_fwnmi(PowerPCCPU *cpu); |
e97c3636 | 33 | int kvmppc_smt_threads(void); |
0c115681 | 34 | void kvmppc_error_append_smt_possible_hint(Error *const *errp); |
fa98fbfc | 35 | int kvmppc_set_smt_threads(int smt); |
31f2cb8f BB |
36 | int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits); |
37 | int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits); | |
38 | int kvmppc_set_tcr(PowerPCCPU *cpu); | |
39 | int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu); | |
b4db5413 SJS |
40 | target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, |
41 | bool radix, bool gtse, | |
42 | uint64_t proc_tbl); | |
98efaf75 | 43 | #ifndef CONFIG_USER_ONLY |
da95324e | 44 | bool kvmppc_spapr_use_multitce(void); |
3dc410ae | 45 | int kvmppc_spapr_enable_inkernel_multitce(void); |
d6ee2a7c AK |
46 | void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, |
47 | uint64_t bus_offset, uint32_t nb_table, | |
48 | int *pfd, bool need_vfio); | |
0f5cb298 | 49 | int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size); |
7f763a5d | 50 | int kvmppc_reset_htab(int shift_hint); |
6a84737c | 51 | uint64_t kvmppc_vrma_limit(unsigned int hash_shift); |
9ded780c | 52 | bool kvmppc_has_cap_spapr_vfio(void); |
98efaf75 | 53 | #endif /* !CONFIG_USER_ONLY */ |
3b961124 | 54 | bool kvmppc_has_cap_epr(void); |
feaa64c4 | 55 | int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function); |
14b0d748 | 56 | int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp); |
e68cb8b4 AK |
57 | int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns); |
58 | int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, | |
0a06e4d6 | 59 | uint16_t n_valid, uint16_t n_invalid, Error **errp); |
1ad9f0a4 DG |
60 | void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n); |
61 | void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1); | |
87a91de6 | 62 | bool kvmppc_has_cap_fixup_hcalls(void); |
bac3bf28 | 63 | bool kvmppc_has_cap_htm(void); |
cf1c4cce SB |
64 | bool kvmppc_has_cap_mmu_radix(void); |
65 | bool kvmppc_has_cap_mmu_hash_v3(void); | |
38afd772 | 66 | bool kvmppc_has_cap_xive(void); |
8acc2ae5 SJS |
67 | int kvmppc_get_cap_safe_cache(void); |
68 | int kvmppc_get_cap_safe_bounds_check(void); | |
69 | int kvmppc_get_cap_safe_indirect_branch(void); | |
8ff43ee4 | 70 | int kvmppc_get_cap_count_cache_flush_assist(void); |
b9a477b7 SJS |
71 | bool kvmppc_has_cap_nested_kvm_hv(void); |
72 | int kvmppc_set_cap_nested_kvm_hv(int enable); | |
7d050527 SJS |
73 | int kvmppc_get_cap_large_decr(void); |
74 | int kvmppc_enable_cap_large_decr(PowerPCCPU *cpu, int enable); | |
82123b75 | 75 | int kvmppc_has_cap_rpt_invalidate(void); |
4d9392be | 76 | int kvmppc_enable_hwrng(void); |
e5c0d3ce | 77 | int kvmppc_put_books_sregs(PowerPCCPU *cpu); |
52b2519c | 78 | PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); |
30f4b05b | 79 | void kvmppc_check_papr_resize_hpt(Error **errp); |
b55d295e DG |
80 | int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu, target_ulong flags, int shift); |
81 | int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, target_ulong flags, int shift); | |
c363a37a | 82 | bool kvmppc_pvr_workaround_required(PowerPCCPU *cpu); |
c1385933 | 83 | |
24c6863c | 84 | bool kvmppc_hpt_needs_host_contiguous_pages(void); |
e5ca28ec | 85 | void kvm_check_mmu(PowerPCCPU *cpu, Error **errp); |
a84f7179 | 86 | void kvmppc_set_reg_ppc_online(PowerPCCPU *cpu, unsigned int online); |
9723295a | 87 | void kvmppc_set_reg_tb_offset(PowerPCCPU *cpu, int64_t tb_offset); |
df587133 | 88 | |
9ac703ac AP |
89 | int kvm_handle_nmi(PowerPCCPU *cpu, struct kvm_run *run); |
90 | ||
921e28db AG |
91 | #else |
92 | ||
93 | static inline uint32_t kvmppc_get_tbfreq(void) | |
94 | { | |
95 | return 0; | |
96 | } | |
97 | ||
ef951443 ND |
98 | static inline bool kvmppc_get_host_model(char **buf) |
99 | { | |
100 | return false; | |
101 | } | |
102 | ||
103 | static inline bool kvmppc_get_host_serial(char **buf) | |
104 | { | |
105 | return false; | |
106 | } | |
107 | ||
921e28db AG |
108 | static inline uint64_t kvmppc_get_clockfreq(void) |
109 | { | |
110 | return 0; | |
111 | } | |
112 | ||
6659394f DG |
113 | static inline uint32_t kvmppc_get_vmx(void) |
114 | { | |
115 | return 0; | |
116 | } | |
117 | ||
118 | static inline uint32_t kvmppc_get_dfp(void) | |
119 | { | |
120 | return 0; | |
121 | } | |
122 | ||
1a61a9ae SY |
123 | static inline int kvmppc_get_hasidle(CPUPPCState *env) |
124 | { | |
125 | return 0; | |
126 | } | |
127 | ||
c995e942 DG |
128 | static inline int kvmppc_get_hypercall(CPUPPCState *env, |
129 | uint8_t *buf, int buf_len) | |
921e28db AG |
130 | { |
131 | return -1; | |
132 | } | |
133 | ||
1bc22652 | 134 | static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level) |
921e28db AG |
135 | { |
136 | return -1; | |
137 | } | |
138 | ||
026bfd89 DG |
139 | static inline void kvmppc_enable_logical_ci_hcalls(void) |
140 | { | |
141 | } | |
142 | ||
ef9971dd AK |
143 | static inline void kvmppc_enable_set_mode_hcall(void) |
144 | { | |
145 | } | |
146 | ||
5145ad4f NW |
147 | static inline void kvmppc_enable_clear_ref_mod_hcalls(void) |
148 | { | |
149 | } | |
150 | ||
68f9f708 SJS |
151 | static inline void kvmppc_enable_h_page_init(void) |
152 | { | |
153 | } | |
154 | ||
82123b75 BR |
155 | static inline void kvmppc_enable_h_rpt_invalidate(void) |
156 | { | |
157 | g_assert_not_reached(); | |
158 | } | |
159 | ||
1bc22652 | 160 | static inline void kvmppc_set_papr(PowerPCCPU *cpu) |
f61b4bed AG |
161 | { |
162 | } | |
163 | ||
d6e166c0 | 164 | static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr) |
6db5bb0f AK |
165 | { |
166 | return 0; | |
167 | } | |
168 | ||
5b95b8b9 AG |
169 | static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy) |
170 | { | |
171 | } | |
172 | ||
ec010c00 NP |
173 | static inline bool kvmppc_get_fwnmi(void) |
174 | { | |
175 | return false; | |
176 | } | |
177 | ||
aef92d87 | 178 | static inline int kvmppc_set_fwnmi(PowerPCCPU *cpu) |
9d953ce4 AP |
179 | { |
180 | return -1; | |
181 | } | |
182 | ||
e97c3636 DG |
183 | static inline int kvmppc_smt_threads(void) |
184 | { | |
185 | return 1; | |
186 | } | |
187 | ||
0c115681 | 188 | static inline void kvmppc_error_append_smt_possible_hint(Error *const *errp) |
fa98fbfc SB |
189 | { |
190 | return; | |
191 | } | |
192 | ||
193 | static inline int kvmppc_set_smt_threads(int smt) | |
194 | { | |
195 | return 0; | |
196 | } | |
197 | ||
31f2cb8f BB |
198 | static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits) |
199 | { | |
200 | return 0; | |
201 | } | |
202 | ||
203 | static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits) | |
204 | { | |
205 | return 0; | |
206 | } | |
207 | ||
208 | static inline int kvmppc_set_tcr(PowerPCCPU *cpu) | |
209 | { | |
210 | return 0; | |
211 | } | |
212 | ||
213 | static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu) | |
214 | { | |
215 | return -1; | |
216 | } | |
217 | ||
b4db5413 SJS |
218 | static inline target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, |
219 | bool radix, bool gtse, | |
220 | uint64_t proc_tbl) | |
221 | { | |
222 | return 0; | |
223 | } | |
224 | ||
a84f7179 ND |
225 | static inline void kvmppc_set_reg_ppc_online(PowerPCCPU *cpu, |
226 | unsigned int online) | |
227 | { | |
228 | return; | |
229 | } | |
230 | ||
9723295a GK |
231 | static inline void kvmppc_set_reg_tb_offset(PowerPCCPU *cpu, int64_t tb_offset) |
232 | { | |
233 | } | |
234 | ||
98efaf75 | 235 | #ifndef CONFIG_USER_ONLY |
da95324e AK |
236 | static inline bool kvmppc_spapr_use_multitce(void) |
237 | { | |
238 | return false; | |
239 | } | |
240 | ||
3dc410ae AK |
241 | static inline int kvmppc_spapr_enable_inkernel_multitce(void) |
242 | { | |
243 | return -1; | |
244 | } | |
245 | ||
d6ee2a7c AK |
246 | static inline void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, |
247 | uint64_t bus_offset, | |
248 | uint32_t nb_table, | |
249 | int *pfd, bool need_vfio) | |
0f5cb298 DG |
250 | { |
251 | return NULL; | |
252 | } | |
253 | ||
254 | static inline int kvmppc_remove_spapr_tce(void *table, int pfd, | |
523e7b8a | 255 | uint32_t nb_table) |
0f5cb298 DG |
256 | { |
257 | return -1; | |
258 | } | |
7f763a5d DG |
259 | |
260 | static inline int kvmppc_reset_htab(int shift_hint) | |
261 | { | |
a3166f8f | 262 | return 0; |
7f763a5d DG |
263 | } |
264 | ||
6a84737c | 265 | static inline uint64_t kvmppc_vrma_limit(unsigned int hash_shift) |
7f763a5d | 266 | { |
6a84737c | 267 | g_assert_not_reached(); |
7f763a5d DG |
268 | } |
269 | ||
24c6863c DG |
270 | static inline bool kvmppc_hpt_needs_host_contiguous_pages(void) |
271 | { | |
272 | return false; | |
273 | } | |
274 | ||
e5ca28ec DG |
275 | static inline void kvm_check_mmu(PowerPCCPU *cpu, Error **errp) |
276 | { | |
277 | } | |
278 | ||
9ded780c AK |
279 | static inline bool kvmppc_has_cap_spapr_vfio(void) |
280 | { | |
281 | return false; | |
282 | } | |
283 | ||
e89aac1a PMD |
284 | static inline void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, |
285 | hwaddr ptex, int n) | |
286 | { | |
287 | abort(); | |
288 | } | |
289 | ||
290 | static inline void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1) | |
291 | { | |
292 | abort(); | |
293 | } | |
294 | ||
98efaf75 | 295 | #endif /* !CONFIG_USER_ONLY */ |
0f5cb298 | 296 | |
3b961124 SY |
297 | static inline bool kvmppc_has_cap_epr(void) |
298 | { | |
299 | return false; | |
300 | } | |
e68cb8b4 | 301 | |
feaa64c4 DG |
302 | static inline int kvmppc_define_rtas_kernel_token(uint32_t token, |
303 | const char *function) | |
304 | { | |
305 | return -1; | |
306 | } | |
307 | ||
14b0d748 | 308 | static inline int kvmppc_get_htab_fd(bool write, uint64_t index, Error **errp) |
e68cb8b4 AK |
309 | { |
310 | return -1; | |
311 | } | |
312 | ||
313 | static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, | |
314 | int64_t max_ns) | |
315 | { | |
316 | abort(); | |
317 | } | |
318 | ||
319 | static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, | |
0a06e4d6 GK |
320 | uint16_t n_valid, uint16_t n_invalid, |
321 | Error **errp) | |
e68cb8b4 AK |
322 | { |
323 | abort(); | |
324 | } | |
325 | ||
87a91de6 AG |
326 | static inline bool kvmppc_has_cap_fixup_hcalls(void) |
327 | { | |
328 | abort(); | |
329 | } | |
330 | ||
bac3bf28 TH |
331 | static inline bool kvmppc_has_cap_htm(void) |
332 | { | |
333 | return false; | |
334 | } | |
335 | ||
cf1c4cce SB |
336 | static inline bool kvmppc_has_cap_mmu_radix(void) |
337 | { | |
338 | return false; | |
339 | } | |
340 | ||
341 | static inline bool kvmppc_has_cap_mmu_hash_v3(void) | |
342 | { | |
343 | return false; | |
344 | } | |
345 | ||
38afd772 CLG |
346 | static inline bool kvmppc_has_cap_xive(void) |
347 | { | |
348 | return false; | |
349 | } | |
350 | ||
8acc2ae5 SJS |
351 | static inline int kvmppc_get_cap_safe_cache(void) |
352 | { | |
353 | return 0; | |
354 | } | |
355 | ||
356 | static inline int kvmppc_get_cap_safe_bounds_check(void) | |
357 | { | |
358 | return 0; | |
359 | } | |
360 | ||
361 | static inline int kvmppc_get_cap_safe_indirect_branch(void) | |
362 | { | |
363 | return 0; | |
364 | } | |
365 | ||
8ff43ee4 SJS |
366 | static inline int kvmppc_get_cap_count_cache_flush_assist(void) |
367 | { | |
368 | return 0; | |
369 | } | |
370 | ||
b9a477b7 SJS |
371 | static inline bool kvmppc_has_cap_nested_kvm_hv(void) |
372 | { | |
373 | return false; | |
374 | } | |
375 | ||
376 | static inline int kvmppc_set_cap_nested_kvm_hv(int enable) | |
377 | { | |
378 | return -1; | |
379 | } | |
380 | ||
7d050527 SJS |
381 | static inline int kvmppc_get_cap_large_decr(void) |
382 | { | |
383 | return 0; | |
384 | } | |
385 | ||
386 | static inline int kvmppc_enable_cap_large_decr(PowerPCCPU *cpu, int enable) | |
387 | { | |
388 | return -1; | |
389 | } | |
390 | ||
82123b75 BR |
391 | static inline int kvmppc_has_cap_rpt_invalidate(void) |
392 | { | |
393 | return false; | |
394 | } | |
395 | ||
4d9392be TH |
396 | static inline int kvmppc_enable_hwrng(void) |
397 | { | |
398 | return -1; | |
399 | } | |
e5c0d3ce DG |
400 | |
401 | static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu) | |
402 | { | |
403 | abort(); | |
404 | } | |
52b2519c TH |
405 | |
406 | static inline PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) | |
407 | { | |
408 | return NULL; | |
409 | } | |
410 | ||
30f4b05b DG |
411 | static inline void kvmppc_check_papr_resize_hpt(Error **errp) |
412 | { | |
413 | return; | |
414 | } | |
b55d295e DG |
415 | |
416 | static inline int kvmppc_resize_hpt_prepare(PowerPCCPU *cpu, | |
417 | target_ulong flags, int shift) | |
418 | { | |
419 | return -ENOSYS; | |
420 | } | |
421 | ||
422 | static inline int kvmppc_resize_hpt_commit(PowerPCCPU *cpu, | |
423 | target_ulong flags, int shift) | |
424 | { | |
425 | return -ENOSYS; | |
426 | } | |
427 | ||
001d235c GK |
428 | static inline bool kvmppc_pvr_workaround_required(PowerPCCPU *cpu) |
429 | { | |
430 | return false; | |
431 | } | |
432 | ||
921e28db AG |
433 | #endif |
434 | ||
b45d63b6 | 435 | #ifndef CONFIG_KVM |
3240dd9a | 436 | |
b45d63b6 | 437 | #define kvmppc_eieio() do { } while (0) |
3240dd9a TH |
438 | |
439 | static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
440 | { | |
441 | } | |
442 | ||
443 | static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
444 | { | |
445 | } | |
446 | ||
447 | #else /* CONFIG_KVM */ | |
448 | ||
b45d63b6 BH |
449 | #define kvmppc_eieio() \ |
450 | do { \ | |
451 | if (kvm_enabled()) { \ | |
452 | asm volatile("eieio" : : : "memory"); \ | |
453 | } \ | |
454 | } while (0) | |
3240dd9a TH |
455 | |
456 | /* Store data cache blocks back to memory */ | |
457 | static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
458 | { | |
459 | uint8_t *p; | |
460 | ||
461 | for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) { | |
462 | asm volatile("dcbst 0,%0" : : "r"(p) : "memory"); | |
463 | } | |
464 | } | |
465 | ||
466 | /* Invalidate instruction cache blocks */ | |
467 | static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
468 | { | |
469 | uint8_t *p; | |
470 | ||
471 | for (p = addr; p < addr + len; p += cpu->env.icache_line_size) { | |
472 | asm volatile("icbi 0,%0" : : "r"(p)); | |
473 | } | |
474 | } | |
475 | ||
476 | #endif /* CONFIG_KVM */ | |
b45d63b6 | 477 | |
2a6a4076 | 478 | #endif /* KVM_PPC_H */ |