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Commit | Line | Data |
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d76d1650 AJ |
1 | /* |
2 | * Copyright 2008 IBM Corporation. | |
3 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | |
4 | * | |
5 | * This work is licensed under the GNU GPL license version 2 or later. | |
6 | * | |
7 | */ | |
8 | ||
2a6a4076 MA |
9 | #ifndef KVM_PPC_H |
10 | #define KVM_PPC_H | |
d76d1650 | 11 | |
2985b86b AF |
12 | #define TYPE_HOST_POWERPC_CPU "host-" TYPE_POWERPC_CPU |
13 | ||
921e28db AG |
14 | #ifdef CONFIG_KVM |
15 | ||
dc333cd6 | 16 | uint32_t kvmppc_get_tbfreq(void); |
eadaada1 | 17 | uint64_t kvmppc_get_clockfreq(void); |
6659394f DG |
18 | uint32_t kvmppc_get_vmx(void); |
19 | uint32_t kvmppc_get_dfp(void); | |
ef951443 ND |
20 | bool kvmppc_get_host_model(char **buf); |
21 | bool kvmppc_get_host_serial(char **buf); | |
1a61a9ae | 22 | int kvmppc_get_hasidle(CPUPPCState *env); |
1328c2bf | 23 | int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len); |
1bc22652 | 24 | int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level); |
026bfd89 | 25 | void kvmppc_enable_logical_ci_hcalls(void); |
ef9971dd | 26 | void kvmppc_enable_set_mode_hcall(void); |
5145ad4f | 27 | void kvmppc_enable_clear_ref_mod_hcalls(void); |
1bc22652 | 28 | void kvmppc_set_papr(PowerPCCPU *cpu); |
d6e166c0 | 29 | int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr); |
5b95b8b9 | 30 | void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy); |
e97c3636 | 31 | int kvmppc_smt_threads(void); |
31f2cb8f BB |
32 | int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits); |
33 | int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits); | |
34 | int kvmppc_set_tcr(PowerPCCPU *cpu); | |
35 | int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu); | |
98efaf75 | 36 | #ifndef CONFIG_USER_ONLY |
658fa66b | 37 | off_t kvmppc_alloc_rma(void **rma); |
da95324e | 38 | bool kvmppc_spapr_use_multitce(void); |
d6ee2a7c AK |
39 | void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, |
40 | uint64_t bus_offset, uint32_t nb_table, | |
41 | int *pfd, bool need_vfio); | |
0f5cb298 | 42 | int kvmppc_remove_spapr_tce(void *table, int pfd, uint32_t window_size); |
7f763a5d DG |
43 | int kvmppc_reset_htab(int shift_hint); |
44 | uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift); | |
98efaf75 | 45 | #endif /* !CONFIG_USER_ONLY */ |
3b961124 | 46 | bool kvmppc_has_cap_epr(void); |
feaa64c4 | 47 | int kvmppc_define_rtas_kernel_token(uint32_t token, const char *function); |
7c43bca0 | 48 | bool kvmppc_has_cap_htab_fd(void); |
e68cb8b4 AK |
49 | int kvmppc_get_htab_fd(bool write); |
50 | int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns); | |
51 | int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, | |
52 | uint16_t n_valid, uint16_t n_invalid); | |
1ad9f0a4 DG |
53 | void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, hwaddr ptex, int n); |
54 | void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1); | |
87a91de6 | 55 | bool kvmppc_has_cap_fixup_hcalls(void); |
bac3bf28 | 56 | bool kvmppc_has_cap_htm(void); |
cf1c4cce SB |
57 | bool kvmppc_has_cap_mmu_radix(void); |
58 | bool kvmppc_has_cap_mmu_hash_v3(void); | |
4d9392be | 59 | int kvmppc_enable_hwrng(void); |
e5c0d3ce | 60 | int kvmppc_put_books_sregs(PowerPCCPU *cpu); |
52b2519c | 61 | PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); |
c1385933 | 62 | |
df587133 TH |
63 | bool kvmppc_is_mem_backend_page_size_ok(char *obj_path); |
64 | ||
921e28db AG |
65 | #else |
66 | ||
67 | static inline uint32_t kvmppc_get_tbfreq(void) | |
68 | { | |
69 | return 0; | |
70 | } | |
71 | ||
ef951443 ND |
72 | static inline bool kvmppc_get_host_model(char **buf) |
73 | { | |
74 | return false; | |
75 | } | |
76 | ||
77 | static inline bool kvmppc_get_host_serial(char **buf) | |
78 | { | |
79 | return false; | |
80 | } | |
81 | ||
921e28db AG |
82 | static inline uint64_t kvmppc_get_clockfreq(void) |
83 | { | |
84 | return 0; | |
85 | } | |
86 | ||
6659394f DG |
87 | static inline uint32_t kvmppc_get_vmx(void) |
88 | { | |
89 | return 0; | |
90 | } | |
91 | ||
92 | static inline uint32_t kvmppc_get_dfp(void) | |
93 | { | |
94 | return 0; | |
95 | } | |
96 | ||
1a61a9ae SY |
97 | static inline int kvmppc_get_hasidle(CPUPPCState *env) |
98 | { | |
99 | return 0; | |
100 | } | |
101 | ||
1328c2bf | 102 | static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len) |
921e28db AG |
103 | { |
104 | return -1; | |
105 | } | |
106 | ||
1bc22652 | 107 | static inline int kvmppc_set_interrupt(PowerPCCPU *cpu, int irq, int level) |
921e28db AG |
108 | { |
109 | return -1; | |
110 | } | |
111 | ||
026bfd89 DG |
112 | static inline void kvmppc_enable_logical_ci_hcalls(void) |
113 | { | |
114 | } | |
115 | ||
ef9971dd AK |
116 | static inline void kvmppc_enable_set_mode_hcall(void) |
117 | { | |
118 | } | |
119 | ||
5145ad4f NW |
120 | static inline void kvmppc_enable_clear_ref_mod_hcalls(void) |
121 | { | |
122 | } | |
123 | ||
1bc22652 | 124 | static inline void kvmppc_set_papr(PowerPCCPU *cpu) |
f61b4bed AG |
125 | { |
126 | } | |
127 | ||
d6e166c0 | 128 | static inline int kvmppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr) |
6db5bb0f AK |
129 | { |
130 | return 0; | |
131 | } | |
132 | ||
5b95b8b9 AG |
133 | static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int mpic_proxy) |
134 | { | |
135 | } | |
136 | ||
e97c3636 DG |
137 | static inline int kvmppc_smt_threads(void) |
138 | { | |
139 | return 1; | |
140 | } | |
141 | ||
31f2cb8f BB |
142 | static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits) |
143 | { | |
144 | return 0; | |
145 | } | |
146 | ||
147 | static inline int kvmppc_clear_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits) | |
148 | { | |
149 | return 0; | |
150 | } | |
151 | ||
152 | static inline int kvmppc_set_tcr(PowerPCCPU *cpu) | |
153 | { | |
154 | return 0; | |
155 | } | |
156 | ||
157 | static inline int kvmppc_booke_watchdog_enable(PowerPCCPU *cpu) | |
158 | { | |
159 | return -1; | |
160 | } | |
161 | ||
98efaf75 | 162 | #ifndef CONFIG_USER_ONLY |
658fa66b | 163 | static inline off_t kvmppc_alloc_rma(void **rma) |
354ac20a DG |
164 | { |
165 | return 0; | |
166 | } | |
167 | ||
da95324e AK |
168 | static inline bool kvmppc_spapr_use_multitce(void) |
169 | { | |
170 | return false; | |
171 | } | |
172 | ||
d6ee2a7c AK |
173 | static inline void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, |
174 | uint64_t bus_offset, | |
175 | uint32_t nb_table, | |
176 | int *pfd, bool need_vfio) | |
0f5cb298 DG |
177 | { |
178 | return NULL; | |
179 | } | |
180 | ||
181 | static inline int kvmppc_remove_spapr_tce(void *table, int pfd, | |
523e7b8a | 182 | uint32_t nb_table) |
0f5cb298 DG |
183 | { |
184 | return -1; | |
185 | } | |
7f763a5d DG |
186 | |
187 | static inline int kvmppc_reset_htab(int shift_hint) | |
188 | { | |
a3166f8f | 189 | return 0; |
7f763a5d DG |
190 | } |
191 | ||
192 | static inline uint64_t kvmppc_rma_size(uint64_t current_size, | |
193 | unsigned int hash_shift) | |
194 | { | |
195 | return ram_size; | |
196 | } | |
197 | ||
df587133 TH |
198 | static inline bool kvmppc_is_mem_backend_page_size_ok(char *obj_path) |
199 | { | |
200 | return true; | |
201 | } | |
202 | ||
98efaf75 | 203 | #endif /* !CONFIG_USER_ONLY */ |
0f5cb298 | 204 | |
3b961124 SY |
205 | static inline bool kvmppc_has_cap_epr(void) |
206 | { | |
207 | return false; | |
208 | } | |
e68cb8b4 | 209 | |
feaa64c4 DG |
210 | static inline int kvmppc_define_rtas_kernel_token(uint32_t token, |
211 | const char *function) | |
212 | { | |
213 | return -1; | |
214 | } | |
215 | ||
7c43bca0 AK |
216 | static inline bool kvmppc_has_cap_htab_fd(void) |
217 | { | |
218 | return false; | |
219 | } | |
220 | ||
e68cb8b4 AK |
221 | static inline int kvmppc_get_htab_fd(bool write) |
222 | { | |
223 | return -1; | |
224 | } | |
225 | ||
226 | static inline int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, | |
227 | int64_t max_ns) | |
228 | { | |
229 | abort(); | |
230 | } | |
231 | ||
232 | static inline int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, | |
233 | uint16_t n_valid, uint16_t n_invalid) | |
234 | { | |
235 | abort(); | |
236 | } | |
237 | ||
1ad9f0a4 DG |
238 | static inline void kvmppc_read_hptes(ppc_hash_pte64_t *hptes, |
239 | hwaddr ptex, int n) | |
7c43bca0 AK |
240 | { |
241 | abort(); | |
242 | } | |
243 | ||
1ad9f0a4 | 244 | static inline void kvmppc_write_hpte(hwaddr ptex, uint64_t pte0, uint64_t pte1) |
c1385933 AK |
245 | { |
246 | abort(); | |
247 | } | |
248 | ||
87a91de6 AG |
249 | static inline bool kvmppc_has_cap_fixup_hcalls(void) |
250 | { | |
251 | abort(); | |
252 | } | |
253 | ||
bac3bf28 TH |
254 | static inline bool kvmppc_has_cap_htm(void) |
255 | { | |
256 | return false; | |
257 | } | |
258 | ||
cf1c4cce SB |
259 | static inline bool kvmppc_has_cap_mmu_radix(void) |
260 | { | |
261 | return false; | |
262 | } | |
263 | ||
264 | static inline bool kvmppc_has_cap_mmu_hash_v3(void) | |
265 | { | |
266 | return false; | |
267 | } | |
268 | ||
4d9392be TH |
269 | static inline int kvmppc_enable_hwrng(void) |
270 | { | |
271 | return -1; | |
272 | } | |
e5c0d3ce DG |
273 | |
274 | static inline int kvmppc_put_books_sregs(PowerPCCPU *cpu) | |
275 | { | |
276 | abort(); | |
277 | } | |
52b2519c TH |
278 | |
279 | static inline PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) | |
280 | { | |
281 | return NULL; | |
282 | } | |
283 | ||
921e28db AG |
284 | #endif |
285 | ||
b45d63b6 | 286 | #ifndef CONFIG_KVM |
3240dd9a | 287 | |
b45d63b6 | 288 | #define kvmppc_eieio() do { } while (0) |
3240dd9a TH |
289 | |
290 | static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
291 | { | |
292 | } | |
293 | ||
294 | static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
295 | { | |
296 | } | |
297 | ||
298 | #else /* CONFIG_KVM */ | |
299 | ||
b45d63b6 BH |
300 | #define kvmppc_eieio() \ |
301 | do { \ | |
302 | if (kvm_enabled()) { \ | |
303 | asm volatile("eieio" : : : "memory"); \ | |
304 | } \ | |
305 | } while (0) | |
3240dd9a TH |
306 | |
307 | /* Store data cache blocks back to memory */ | |
308 | static inline void kvmppc_dcbst_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
309 | { | |
310 | uint8_t *p; | |
311 | ||
312 | for (p = addr; p < addr + len; p += cpu->env.dcache_line_size) { | |
313 | asm volatile("dcbst 0,%0" : : "r"(p) : "memory"); | |
314 | } | |
315 | } | |
316 | ||
317 | /* Invalidate instruction cache blocks */ | |
318 | static inline void kvmppc_icbi_range(PowerPCCPU *cpu, uint8_t *addr, int len) | |
319 | { | |
320 | uint8_t *p; | |
321 | ||
322 | for (p = addr; p < addr + len; p += cpu->env.icache_line_size) { | |
323 | asm volatile("icbi 0,%0" : : "r"(p)); | |
324 | } | |
325 | } | |
326 | ||
327 | #endif /* CONFIG_KVM */ | |
b45d63b6 | 328 | |
2a6a4076 | 329 | #endif /* KVM_PPC_H */ |