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[mirror_qemu.git] / target / s390x / cpu.c
CommitLineData
29e4bcb2
AF
1/*
2 * QEMU S/390 CPU
3 *
1ac1a749
AF
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2011 Alexander Graf
29e4bcb2 6 * Copyright (c) 2012 SUSE LINUX Products GmbH
70bada03 7 * Copyright (c) 2012 IBM Corp.
29e4bcb2 8 *
44699e1c
TH
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
29e4bcb2 13 *
44699e1c 14 * This program is distributed in the hope that it will be useful,
29e4bcb2
AF
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
44699e1c 17 * General Public License for more details.
29e4bcb2 18 *
44699e1c
TH
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
29e4bcb2
AF
21 */
22
9615495a 23#include "qemu/osdep.h"
da34e65c 24#include "qapi/error.h"
564b863d 25#include "cpu.h"
4e58b838 26#include "internal.h"
f16bbb9b
DH
27#include "kvm_s390x.h"
28#include "sysemu/kvm.h"
71e8a915 29#include "sysemu/reset.h"
1de7afc9 30#include "qemu/timer.h"
eb24f7c6 31#include "qemu/error-report.h"
0b8fa32f 32#include "qemu/module.h"
eb24f7c6 33#include "trace.h"
96b1a8bb 34#include "qapi/visitor.h"
8ac25c84 35#include "qapi/qapi-types-machine.h"
112ed241 36#include "qapi/qapi-visit-run-state.h"
4ada99ad 37#include "sysemu/hw_accel.h"
ca5c1457 38#include "hw/qdev-properties.h"
c7396bbb 39#ifndef CONFIG_USER_ONLY
c3347ed0 40#include "hw/s390x/pv.h"
ae71ed86 41#include "hw/boards.h"
904e5fd5 42#include "sysemu/arch_init.h"
14a48c1d 43#include "sysemu/tcg.h"
904e5fd5 44#endif
5f8ab000 45#include "fpu/softfloat-helpers.h"
3d562845 46#include "disas/capstone.h"
904e5fd5 47
70bada03
JF
48#define CR0_RESET 0xE0UL
49#define CR14_RESET 0xC2000000UL;
50
f45748f1
AF
51static void s390_cpu_set_pc(CPUState *cs, vaddr value)
52{
53 S390CPU *cpu = S390_CPU(cs);
54
55 cpu->env.psw.addr = value;
56}
57
8c2e1b00
AF
58static bool s390_cpu_has_work(CPUState *cs)
59{
60 S390CPU *cpu = S390_CPU(cs);
8c2e1b00 61
4beab671 62 /* STOPPED cpus can never wake up */
9d0306df
VM
63 if (s390_cpu_get_state(cpu) != S390_CPU_STATE_LOAD &&
64 s390_cpu_get_state(cpu) != S390_CPU_STATE_OPERATING) {
4beab671
DH
65 return false;
66 }
67
8417f904
DH
68 if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) {
69 return false;
70 }
71
72 return s390_cpu_has_int(cpu);
8c2e1b00
AF
73}
74
29c6157c
CB
75#if !defined(CONFIG_USER_ONLY)
76/* S390CPUClass::load_normal() */
77static void s390_cpu_load_normal(CPUState *s)
78{
79 S390CPU *cpu = S390_CPU(s);
59181010
JF
80 uint64_t spsw;
81
82 if (!s390_is_pv()) {
83 spsw = ldq_phys(s->as, 0);
84 cpu->env.psw.mask = spsw & PSW_MASK_SHORT_CTRL;
85 /*
86 * Invert short psw indication, so SIE will report a specification
87 * exception if it was not set.
88 */
89 cpu->env.psw.mask ^= PSW_MASK_SHORTPSW;
90 cpu->env.psw.addr = spsw & PSW_MASK_SHORT_ADDR;
91 } else {
92 /*
93 * Firmware requires us to set the load state before we set
94 * the cpu to operating on protected guests.
95 */
96 s390_cpu_set_state(S390_CPU_STATE_LOAD, cpu);
97 }
9d0306df 98 s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu);
29c6157c
CB
99}
100#endif
101
eac4f827
JF
102/* S390CPUClass::reset() */
103static void s390_cpu_reset(CPUState *s, cpu_reset_type type)
29e4bcb2
AF
104{
105 S390CPU *cpu = S390_CPU(s);
106 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
107 CPUS390XState *env = &cpu->env;
781c67ca 108 DeviceState *dev = DEVICE(s);
29e4bcb2 109
781c67ca 110 scc->parent_reset(dev);
18ff9494 111 cpu->env.sigp_order = 0;
9d0306df 112 s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
eac4f827
JF
113
114 switch (type) {
eb8adcc3
JF
115 case S390_CPU_RESET_CLEAR:
116 memset(env, 0, offsetof(CPUS390XState, start_initial_reset_fields));
117 /* fall through */
81b92223
JF
118 case S390_CPU_RESET_INITIAL:
119 /* initial reset does not clear everything! */
120 memset(&env->start_initial_reset_fields, 0,
e893baee 121 offsetof(CPUS390XState, start_normal_reset_fields) -
81b92223
JF
122 offsetof(CPUS390XState, start_initial_reset_fields));
123
124 /* architectured initial value for Breaking-Event-Address register */
125 env->gbea = 1;
126
127 /* architectured initial values for CR 0 and 14 */
128 env->cregs[0] = CR0_RESET;
129 env->cregs[14] = CR14_RESET;
130
eb8adcc3
JF
131#if defined(CONFIG_USER_ONLY)
132 /* user mode should always be allowed to use the full FPU */
133 env->cregs[0] |= CR0_AFP;
134 if (s390_has_feat(S390_FEAT_VECTOR)) {
135 env->cregs[0] |= CR0_VECTOR;
136 }
137#endif
138
81b92223
JF
139 /* tininess for underflow is detected before rounding */
140 set_float_detect_tininess(float_tininess_before_rounding,
141 &env->fpu_status);
142 /* fall through */
eac4f827 143 case S390_CPU_RESET_NORMAL:
e893baee
JF
144 env->psw.mask &= ~PSW_MASK_RI;
145 memset(&env->start_normal_reset_fields, 0,
146 offsetof(CPUS390XState, end_reset_fields) -
147 offsetof(CPUS390XState, start_normal_reset_fields));
148
eac4f827
JF
149 env->pfault_token = -1UL;
150 env->bpbc = false;
151 break;
152 default:
153 g_assert_not_reached();
154 }
4a33565f 155
49f5c9e9 156 /* Reset state inside the kernel that we cannot access yet from QEMU. */
b91a0394
JF
157 if (kvm_enabled()) {
158 switch (type) {
159 case S390_CPU_RESET_CLEAR:
160 kvm_s390_reset_vcpu_clear(cpu);
161 break;
162 case S390_CPU_RESET_INITIAL:
163 kvm_s390_reset_vcpu_initial(cpu);
164 break;
165 case S390_CPU_RESET_NORMAL:
166 kvm_s390_reset_vcpu_normal(cpu);
167 break;
168 }
49f5c9e9 169 }
f5ae2a4f
CB
170}
171
70bada03
JF
172#if !defined(CONFIG_USER_ONLY)
173static void s390_cpu_machine_reset_cb(void *opaque)
174{
175 S390CPU *cpu = opaque;
176
14e6fe12 177 run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
70bada03
JF
178}
179#endif
180
dbad6b74
PC
181static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
182{
183 info->mach = bfd_mach_s390_64;
184 info->print_insn = print_insn_s390;
3d562845
RH
185 info->cap_arch = CS_ARCH_SYSZ;
186 info->cap_insn_unit = 2;
187 info->cap_insn_split = 6;
dbad6b74
PC
188}
189
1f136632
AF
190static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
191{
14a10fc3 192 CPUState *cs = CPU(dev);
1f136632 193 S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
1e70ba24 194#if !defined(CONFIG_USER_ONLY)
c6644fc8 195 S390CPU *cpu = S390_CPU(dev);
1e70ba24 196#endif
c6644fc8
MR
197 Error *err = NULL;
198
41868f84
DH
199 /* the model has to be realized before qemu_init_vcpu() due to kvm */
200 s390_realize_cpu_model(cs, &err);
201 if (err) {
202 goto out;
203 }
204
96b1a8bb 205#if !defined(CONFIG_USER_ONLY)
ae71ed86
LX
206 MachineState *ms = MACHINE(qdev_get_machine());
207 unsigned int max_cpus = ms->smp.max_cpus;
ca5c1457
DH
208 if (cpu->env.core_id >= max_cpus) {
209 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
210 ", maximum core-id: %d", cpu->env.core_id,
211 max_cpus - 1);
96b1a8bb
MR
212 goto out;
213 }
88556edd 214
ca5c1457
DH
215 if (cpu_exists(cpu->env.core_id)) {
216 error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
217 ", it already exists", cpu->env.core_id);
96b1a8bb
MR
218 goto out;
219 }
96b1a8bb 220
ca5c1457 221 /* sync cs->cpu_index and env->core_id. The latter is needed for TCG. */
1e70ba24
DH
222 cs->cpu_index = cpu->env.core_id;
223#endif
224
ce5b1bbf 225 cpu_exec_realizefn(cs, &err);
c6644fc8 226 if (err != NULL) {
96b1a8bb 227 goto out;
c6644fc8 228 }
1f136632 229
c6644fc8
MR
230#if !defined(CONFIG_USER_ONLY)
231 qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
232#endif
73d510c9 233 s390_cpu_gdb_init(cs);
14a10fc3 234 qemu_init_vcpu(cs);
d66b43c8
DH
235
236 /*
237 * KVM requires the initial CPU reset ioctl to be executed on the target
238 * CPU thread. CPU hotplug under single-threaded TCG will not work with
239 * run_on_cpu(), as run_on_cpu() will not work properly if called while
240 * the main thread is already running but the CPU hasn't been realized.
241 */
242 if (kvm_enabled()) {
243 run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
244 } else {
245 cpu_reset(cs);
246 }
1f136632 247
96b1a8bb 248 scc->parent_realize(dev, &err);
96b1a8bb
MR
249out:
250 error_propagate(errp, err);
251}
252
6b4bf66e 253#if !defined(CONFIG_USER_ONLY)
4ada99ad
CB
254static GuestPanicInformation *s390_cpu_get_crash_info(CPUState *cs)
255{
256 GuestPanicInformation *panic_info;
257 S390CPU *cpu = S390_CPU(cs);
258
259 cpu_synchronize_state(cs);
260 panic_info = g_malloc0(sizeof(GuestPanicInformation));
261
262 panic_info->type = GUEST_PANIC_INFORMATION_TYPE_S390;
4ada99ad 263 panic_info->u.s390.core = cpu->env.core_id;
4ada99ad
CB
264 panic_info->u.s390.psw_mask = cpu->env.psw.mask;
265 panic_info->u.s390.psw_addr = cpu->env.psw.addr;
266 panic_info->u.s390.reason = cpu->env.crash_reason;
267
268 return panic_info;
269}
270
271static void s390_cpu_get_crash_info_qom(Object *obj, Visitor *v,
272 const char *name, void *opaque,
273 Error **errp)
274{
275 CPUState *cs = CPU(obj);
276 GuestPanicInformation *panic_info;
277
278 if (!cs->crash_occurred) {
279 error_setg(errp, "No crash occurred");
280 return;
281 }
282
283 panic_info = s390_cpu_get_crash_info(cs);
284
285 visit_type_GuestPanicInformation(v, "crash-information", &panic_info,
286 errp);
287 qapi_free_GuestPanicInformation(panic_info);
288}
6b4bf66e 289#endif
4ada99ad 290
8f22e0df
AF
291static void s390_cpu_initfn(Object *obj)
292{
c05efcb1 293 CPUState *cs = CPU(obj);
8f22e0df 294 S390CPU *cpu = S390_CPU(obj);
8f22e0df 295
7506ed90 296 cpu_set_cpustate_pointers(cpu);
ef3027af 297 cs->exception_index = EXCP_HLT;
6b4bf66e 298#if !defined(CONFIG_USER_ONLY)
86c5e6ab 299 cs->start_powered_off = true;
4ada99ad 300 object_property_add(obj, "crash-information", "GuestPanicInformation",
d2623129 301 s390_cpu_get_crash_info_qom, NULL, NULL, NULL);
7506ed90
RH
302 cpu->env.tod_timer =
303 timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
304 cpu->env.cpu_timer =
305 timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
9d0306df 306 s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu);
8f22e0df 307#endif
8f22e0df
AF
308}
309
d5627ce8
AF
310static void s390_cpu_finalize(Object *obj)
311{
312#if !defined(CONFIG_USER_ONLY)
313 S390CPU *cpu = S390_CPU(obj);
314
c7454f05 315 timer_free(cpu->env.tod_timer);
c7454f05
GQ
316 timer_free(cpu->env.cpu_timer);
317
d5627ce8 318 qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
3cda44f7 319 g_free(cpu->irqstate);
d5627ce8
AF
320#endif
321}
322
75973bfe 323#if !defined(CONFIG_USER_ONLY)
eb24f7c6
DH
324static bool disabled_wait(CPUState *cpu)
325{
326 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
327 (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK));
328}
329
75973bfe
DH
330static unsigned s390_count_running_cpus(void)
331{
332 CPUState *cpu;
333 int nr_running = 0;
334
335 CPU_FOREACH(cpu) {
336 uint8_t state = S390_CPU(cpu)->env.cpu_state;
9d0306df
VM
337 if (state == S390_CPU_STATE_OPERATING ||
338 state == S390_CPU_STATE_LOAD) {
eb24f7c6
DH
339 if (!disabled_wait(cpu)) {
340 nr_running++;
341 }
75973bfe
DH
342 }
343 }
344
345 return nr_running;
346}
347
eb24f7c6 348unsigned int s390_cpu_halt(S390CPU *cpu)
75973bfe
DH
349{
350 CPUState *cs = CPU(cpu);
eb24f7c6 351 trace_cpu_halt(cs->cpu_index);
75973bfe 352
eb24f7c6
DH
353 if (!cs->halted) {
354 cs->halted = 1;
355 cs->exception_index = EXCP_HLT;
75973bfe 356 }
eb24f7c6
DH
357
358 return s390_count_running_cpus();
75973bfe
DH
359}
360
eb24f7c6 361void s390_cpu_unhalt(S390CPU *cpu)
75973bfe
DH
362{
363 CPUState *cs = CPU(cpu);
eb24f7c6 364 trace_cpu_unhalt(cs->cpu_index);
75973bfe 365
eb24f7c6
DH
366 if (cs->halted) {
367 cs->halted = 0;
368 cs->exception_index = -1;
369 }
370}
371
372unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
373 {
374 trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);
375
376 switch (cpu_state) {
9d0306df
VM
377 case S390_CPU_STATE_STOPPED:
378 case S390_CPU_STATE_CHECK_STOP:
eb24f7c6
DH
379 /* halt the cpu for common infrastructure */
380 s390_cpu_halt(cpu);
381 break;
9d0306df
VM
382 case S390_CPU_STATE_OPERATING:
383 case S390_CPU_STATE_LOAD:
741a4ec1
DH
384 /*
385 * Starting a CPU with a PSW WAIT bit set:
386 * KVM: handles this internally and triggers another WAIT exit.
387 * TCG: will actually try to continue to run. Don't unhalt, will
388 * be done when the CPU actually has work (an interrupt).
389 */
390 if (!tcg_enabled() || !(cpu->env.psw.mask & PSW_MASK_WAIT)) {
391 s390_cpu_unhalt(cpu);
392 }
eb24f7c6
DH
393 break;
394 default:
395 error_report("Requested CPU state is not a valid S390 CPU state: %u",
396 cpu_state);
397 exit(1);
75973bfe 398 }
c9e659c9
DH
399 if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
400 kvm_s390_set_cpu_state(cpu, cpu_state);
401 }
eb24f7c6 402 cpu->env.cpu_state = cpu_state;
75973bfe
DH
403
404 return s390_count_running_cpus();
405}
b6089b05 406
b6089b05
DH
407int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit)
408{
409 if (kvm_enabled()) {
410 return kvm_s390_set_mem_limit(new_limit, hw_limit);
411 }
412 return 0;
413}
9138977b
DH
414
415void s390_set_max_pagesize(uint64_t pagesize, Error **errp)
416{
417 if (kvm_enabled()) {
418 kvm_s390_set_max_pagesize(pagesize, errp);
419 }
420}
b6089b05
DH
421
422void s390_cmma_reset(void)
423{
424 if (kvm_enabled()) {
425 kvm_s390_cmma_reset();
426 }
427}
428
b6089b05
DH
429int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id,
430 int vq, bool assign)
431{
432 if (kvm_enabled()) {
433 return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign);
434 } else {
435 return 0;
436 }
437}
438
439void s390_crypto_reset(void)
440{
441 if (kvm_enabled()) {
442 kvm_s390_crypto_reset();
443 }
444}
445
5e7164c5
DH
446void s390_enable_css_support(S390CPU *cpu)
447{
448 if (kvm_enabled()) {
449 kvm_s390_enable_css_support(cpu);
450 }
451}
e2c6cd56
CW
452
453void s390_do_cpu_set_diag318(CPUState *cs, run_on_cpu_data arg)
454{
455 if (kvm_enabled()) {
456 kvm_s390_set_diag318(cs, arg.host_ulong);
457 }
458}
75973bfe
DH
459#endif
460
b3820e6c
DH
461static gchar *s390_gdb_arch_name(CPUState *cs)
462{
463 return g_strdup("s390:64-bit");
464}
465
ca5c1457 466static Property s390x_cpu_properties[] = {
1e70ba24 467#if !defined(CONFIG_USER_ONLY)
ca5c1457 468 DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0),
1e70ba24 469#endif
ca5c1457
DH
470 DEFINE_PROP_END_OF_LIST()
471};
472
781c67ca 473static void s390_cpu_reset_full(DeviceState *dev)
eb8adcc3 474{
781c67ca 475 CPUState *s = CPU(dev);
eb8adcc3
JF
476 return s390_cpu_reset(s, S390_CPU_RESET_CLEAR);
477}
478
78271684
CF
479#ifdef CONFIG_TCG
480#include "hw/core/tcg-cpu-ops.h"
481
482static struct TCGCPUOps s390_tcg_ops = {
483 .initialize = s390x_translate_init,
484 .tlb_fill = s390_cpu_tlb_fill,
485
486#if !defined(CONFIG_USER_ONLY)
487 .cpu_exec_interrupt = s390_cpu_exec_interrupt,
488 .do_interrupt = s390_cpu_do_interrupt,
489 .debug_excp_handler = s390x_cpu_debug_excp_handler,
490 .do_unaligned_access = s390x_cpu_do_unaligned_access,
491#endif /* !CONFIG_USER_ONLY */
492};
493#endif /* CONFIG_TCG */
494
29e4bcb2
AF
495static void s390_cpu_class_init(ObjectClass *oc, void *data)
496{
497 S390CPUClass *scc = S390_CPU_CLASS(oc);
498 CPUClass *cc = CPU_CLASS(scc);
c7396bbb 499 DeviceClass *dc = DEVICE_CLASS(oc);
29e4bcb2 500
bf853881
PMD
501 device_class_set_parent_realize(dc, s390_cpu_realizefn,
502 &scc->parent_realize);
4f67d30b 503 device_class_set_props(dc, s390x_cpu_properties);
0347ab84 504 dc->user_creatable = true;
1f136632 505
781c67ca 506 device_class_set_parent_reset(dc, s390_cpu_reset_full, &scc->parent_reset);
29c6157c
CB
507#if !defined(CONFIG_USER_ONLY)
508 scc->load_normal = s390_cpu_load_normal;
509#endif
eac4f827 510 scc->reset = s390_cpu_reset;
41868f84 511 cc->class_by_name = s390_cpu_class_by_name,
8c2e1b00 512 cc->has_work = s390_cpu_has_work;
878096ee 513 cc->dump_state = s390_cpu_dump_state;
f45748f1 514 cc->set_pc = s390_cpu_set_pc;
5b50e790
AF
515 cc->gdb_read_register = s390_cpu_gdb_read_register;
516 cc->gdb_write_register = s390_cpu_gdb_write_register;
82851985 517#ifndef CONFIG_USER_ONLY
00b941e5 518 cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
ef1df130 519 cc->vmsd = &vmstate_s390_cpu;
6b4bf66e 520 cc->get_crash_info = s390_cpu_get_crash_info;
9b4f38e1 521 cc->write_elf64_note = s390_cpu_write_elf64_note;
00b941e5 522#endif
dbad6b74 523 cc->disas_set_info = s390_cpu_disas_set_info;
73d510c9
DH
524 cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
525 cc->gdb_core_xml_file = "s390x-core64.xml";
b3820e6c 526 cc->gdb_arch_name = s390_gdb_arch_name;
4c315c27 527
6efadc90 528 s390_cpu_model_class_register_props(oc);
78271684
CF
529
530#ifdef CONFIG_TCG
531 cc->tcg_ops = &s390_tcg_ops;
532#endif /* CONFIG_TCG */
29e4bcb2
AF
533}
534
535static const TypeInfo s390_cpu_type_info = {
536 .name = TYPE_S390_CPU,
537 .parent = TYPE_CPU,
538 .instance_size = sizeof(S390CPU),
f62192a2 539 .instance_align = __alignof__(S390CPU),
8f22e0df 540 .instance_init = s390_cpu_initfn,
d5627ce8 541 .instance_finalize = s390_cpu_finalize,
41868f84 542 .abstract = true,
29e4bcb2
AF
543 .class_size = sizeof(S390CPUClass),
544 .class_init = s390_cpu_class_init,
545};
546
547static void s390_cpu_register_types(void)
548{
549 type_register_static(&s390_cpu_type_info);
550}
551
552type_init(s390_cpu_register_types)