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e72ca652 BS |
1 | /* |
2 | * S/390 FPU helper routines | |
3 | * | |
4 | * Copyright (c) 2009 Ulrich Hecht | |
5 | * Copyright (c) 2009 Alexander Graf | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
41c6a6dd | 10 | * version 2.1 of the License, or (at your option) any later version. |
e72ca652 BS |
11 | * |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
9615495a | 21 | #include "qemu/osdep.h" |
e72ca652 | 22 | #include "cpu.h" |
4e58b838 | 23 | #include "internal.h" |
bbf6ea3b | 24 | #include "tcg_s390x.h" |
63c91552 | 25 | #include "exec/exec-all.h" |
f08b6170 | 26 | #include "exec/cpu_ldst.h" |
2ef6175a | 27 | #include "exec/helper-proto.h" |
24f91e81 | 28 | #include "fpu/softfloat.h" |
e72ca652 | 29 | |
e72ca652 BS |
30 | /* #define DEBUG_HELPER */ |
31 | #ifdef DEBUG_HELPER | |
32 | #define HELPER_LOG(x...) qemu_log(x) | |
33 | #else | |
34 | #define HELPER_LOG(x...) | |
35 | #endif | |
36 | ||
587626f8 RH |
37 | #define RET128(F) (env->retxl = F.low, F.high) |
38 | ||
4b70fc54 DH |
39 | uint8_t s390_softfloat_exc_to_ieee(unsigned int exc) |
40 | { | |
41 | uint8_t s390_exc = 0; | |
42 | ||
43 | s390_exc |= (exc & float_flag_invalid) ? S390_IEEE_MASK_INVALID : 0; | |
44 | s390_exc |= (exc & float_flag_divbyzero) ? S390_IEEE_MASK_DIVBYZERO : 0; | |
45 | s390_exc |= (exc & float_flag_overflow) ? S390_IEEE_MASK_OVERFLOW : 0; | |
46 | s390_exc |= (exc & float_flag_underflow) ? S390_IEEE_MASK_UNDERFLOW : 0; | |
47 | s390_exc |= (exc & float_flag_inexact) ? S390_IEEE_MASK_INEXACT : 0; | |
48 | ||
49 | return s390_exc; | |
50 | } | |
587626f8 | 51 | |
587626f8 RH |
52 | /* Should be called after any operation that may raise IEEE exceptions. */ |
53 | static void handle_exceptions(CPUS390XState *env, uintptr_t retaddr) | |
54 | { | |
55 | unsigned s390_exc, qemu_exc; | |
56 | ||
57 | /* Get the exceptions raised by the current operation. Reset the | |
58 | fpu_status contents so that the next operation has a clean slate. */ | |
59 | qemu_exc = env->fpu_status.float_exception_flags; | |
60 | if (qemu_exc == 0) { | |
61 | return; | |
62 | } | |
63 | env->fpu_status.float_exception_flags = 0; | |
4b70fc54 | 64 | s390_exc = s390_softfloat_exc_to_ieee(qemu_exc); |
587626f8 | 65 | |
6d6ad1d1 DH |
66 | /* |
67 | * IEEE-Underflow exception recognition exists if a tininess condition | |
68 | * (underflow) exists and | |
69 | * - The mask bit in the FPC is zero and the result is inexact | |
70 | * - The mask bit in the FPC is one | |
71 | * So tininess conditions that are not inexact don't trigger any | |
72 | * underflow action in case the mask bit is not one. | |
73 | */ | |
74 | if (!(s390_exc & S390_IEEE_MASK_INEXACT) && | |
75 | !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) { | |
76 | s390_exc &= ~S390_IEEE_MASK_UNDERFLOW; | |
77 | } | |
78 | ||
fcb9e9f2 DH |
79 | /* |
80 | * FIXME: | |
81 | * 1. Right now, all inexact conditions are inidicated as | |
82 | * "truncated" (0) and never as "incremented" (1) in the DXC. | |
83 | * 2. Only traps due to invalid/divbyzero are suppressing. Other traps | |
84 | * are completing, meaning the target register has to be written! | |
85 | * This, however will mean that we have to write the register before | |
86 | * triggering the trap - impossible right now. | |
87 | */ | |
587626f8 | 88 | |
fcb9e9f2 DH |
89 | /* |
90 | * invalid/divbyzero cannot coexist with other conditions. | |
91 | * overflow/underflow however can coexist with inexact, we have to | |
92 | * handle it separatly. | |
93 | */ | |
94 | if (s390_exc & ~S390_IEEE_MASK_INEXACT) { | |
95 | if (s390_exc & ~S390_IEEE_MASK_INEXACT & env->fpc >> 24) { | |
96 | /* trap condition - inexact reported along */ | |
97 | tcg_s390_data_exception(env, s390_exc, retaddr); | |
98 | } | |
99 | /* nontrap condition - inexact handled differently */ | |
100 | env->fpc |= (s390_exc & ~S390_IEEE_MASK_INEXACT) << 16; | |
101 | } | |
102 | ||
103 | /* inexact handling */ | |
104 | if (s390_exc & S390_IEEE_MASK_INEXACT) { | |
105 | /* trap condition - overflow/underflow _not_ reported along */ | |
106 | if (s390_exc & S390_IEEE_MASK_INEXACT & env->fpc >> 24) { | |
107 | tcg_s390_data_exception(env, s390_exc & S390_IEEE_MASK_INEXACT, | |
108 | retaddr); | |
109 | } | |
110 | /* nontrap condition */ | |
111 | env->fpc |= (s390_exc & S390_IEEE_MASK_INEXACT) << 16; | |
587626f8 RH |
112 | } |
113 | } | |
114 | ||
449c0d70 | 115 | static inline int float_comp_to_cc(CPUS390XState *env, int float_compare) |
e72ca652 | 116 | { |
a47dddd7 AF |
117 | S390CPU *cpu = s390_env_get_cpu(env); |
118 | ||
e72ca652 BS |
119 | switch (float_compare) { |
120 | case float_relation_equal: | |
121 | return 0; | |
122 | case float_relation_less: | |
123 | return 1; | |
124 | case float_relation_greater: | |
125 | return 2; | |
126 | case float_relation_unordered: | |
127 | return 3; | |
128 | default: | |
a47dddd7 | 129 | cpu_abort(CPU(cpu), "unknown return value for float compare\n"); |
e72ca652 BS |
130 | } |
131 | } | |
132 | ||
e72ca652 BS |
133 | /* condition codes for unary FP ops */ |
134 | uint32_t set_cc_nz_f32(float32 v) | |
135 | { | |
136 | if (float32_is_any_nan(v)) { | |
137 | return 3; | |
138 | } else if (float32_is_zero(v)) { | |
139 | return 0; | |
140 | } else if (float32_is_neg(v)) { | |
141 | return 1; | |
142 | } else { | |
143 | return 2; | |
144 | } | |
145 | } | |
146 | ||
147 | uint32_t set_cc_nz_f64(float64 v) | |
148 | { | |
149 | if (float64_is_any_nan(v)) { | |
150 | return 3; | |
151 | } else if (float64_is_zero(v)) { | |
152 | return 0; | |
153 | } else if (float64_is_neg(v)) { | |
154 | return 1; | |
155 | } else { | |
156 | return 2; | |
157 | } | |
158 | } | |
159 | ||
587626f8 | 160 | uint32_t set_cc_nz_f128(float128 v) |
e72ca652 BS |
161 | { |
162 | if (float128_is_any_nan(v)) { | |
163 | return 3; | |
164 | } else if (float128_is_zero(v)) { | |
165 | return 0; | |
166 | } else if (float128_is_neg(v)) { | |
167 | return 1; | |
168 | } else { | |
169 | return 2; | |
170 | } | |
171 | } | |
172 | ||
587626f8 RH |
173 | /* 32-bit FP addition */ |
174 | uint64_t HELPER(aeb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 175 | { |
587626f8 RH |
176 | float32 ret = float32_add(f1, f2, &env->fpu_status); |
177 | handle_exceptions(env, GETPC()); | |
178 | return ret; | |
e72ca652 BS |
179 | } |
180 | ||
587626f8 RH |
181 | /* 64-bit FP addition */ |
182 | uint64_t HELPER(adb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 183 | { |
587626f8 RH |
184 | float64 ret = float64_add(f1, f2, &env->fpu_status); |
185 | handle_exceptions(env, GETPC()); | |
186 | return ret; | |
187 | } | |
e72ca652 | 188 | |
587626f8 RH |
189 | /* 128-bit FP addition */ |
190 | uint64_t HELPER(axb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
191 | uint64_t bh, uint64_t bl) | |
192 | { | |
193 | float128 ret = float128_add(make_float128(ah, al), | |
194 | make_float128(bh, bl), | |
195 | &env->fpu_status); | |
196 | handle_exceptions(env, GETPC()); | |
197 | return RET128(ret); | |
e72ca652 BS |
198 | } |
199 | ||
1a800a2d RH |
200 | /* 32-bit FP subtraction */ |
201 | uint64_t HELPER(seb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 202 | { |
1a800a2d RH |
203 | float32 ret = float32_sub(f1, f2, &env->fpu_status); |
204 | handle_exceptions(env, GETPC()); | |
205 | return ret; | |
e72ca652 BS |
206 | } |
207 | ||
1a800a2d RH |
208 | /* 64-bit FP subtraction */ |
209 | uint64_t HELPER(sdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 210 | { |
1a800a2d RH |
211 | float64 ret = float64_sub(f1, f2, &env->fpu_status); |
212 | handle_exceptions(env, GETPC()); | |
213 | return ret; | |
214 | } | |
e72ca652 | 215 | |
1a800a2d RH |
216 | /* 128-bit FP subtraction */ |
217 | uint64_t HELPER(sxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
218 | uint64_t bh, uint64_t bl) | |
219 | { | |
220 | float128 ret = float128_sub(make_float128(ah, al), | |
221 | make_float128(bh, bl), | |
222 | &env->fpu_status); | |
223 | handle_exceptions(env, GETPC()); | |
224 | return RET128(ret); | |
e72ca652 BS |
225 | } |
226 | ||
f08a5c31 RH |
227 | /* 32-bit FP division */ |
228 | uint64_t HELPER(deb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 229 | { |
f08a5c31 RH |
230 | float32 ret = float32_div(f1, f2, &env->fpu_status); |
231 | handle_exceptions(env, GETPC()); | |
232 | return ret; | |
e72ca652 BS |
233 | } |
234 | ||
f08a5c31 RH |
235 | /* 64-bit FP division */ |
236 | uint64_t HELPER(ddb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 237 | { |
f08a5c31 RH |
238 | float64 ret = float64_div(f1, f2, &env->fpu_status); |
239 | handle_exceptions(env, GETPC()); | |
240 | return ret; | |
241 | } | |
e72ca652 | 242 | |
f08a5c31 RH |
243 | /* 128-bit FP division */ |
244 | uint64_t HELPER(dxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
245 | uint64_t bh, uint64_t bl) | |
246 | { | |
247 | float128 ret = float128_div(make_float128(ah, al), | |
248 | make_float128(bh, bl), | |
249 | &env->fpu_status); | |
250 | handle_exceptions(env, GETPC()); | |
251 | return RET128(ret); | |
e72ca652 BS |
252 | } |
253 | ||
83b00736 RH |
254 | /* 32-bit FP multiplication */ |
255 | uint64_t HELPER(meeb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 256 | { |
83b00736 RH |
257 | float32 ret = float32_mul(f1, f2, &env->fpu_status); |
258 | handle_exceptions(env, GETPC()); | |
259 | return ret; | |
e72ca652 BS |
260 | } |
261 | ||
83b00736 RH |
262 | /* 64-bit FP multiplication */ |
263 | uint64_t HELPER(mdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 264 | { |
83b00736 RH |
265 | float64 ret = float64_mul(f1, f2, &env->fpu_status); |
266 | handle_exceptions(env, GETPC()); | |
267 | return ret; | |
268 | } | |
e72ca652 | 269 | |
83b00736 RH |
270 | /* 64/32-bit FP multiplication */ |
271 | uint64_t HELPER(mdeb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
272 | { | |
273 | float64 ret = float32_to_float64(f2, &env->fpu_status); | |
274 | ret = float64_mul(f1, ret, &env->fpu_status); | |
275 | handle_exceptions(env, GETPC()); | |
276 | return ret; | |
277 | } | |
278 | ||
279 | /* 128-bit FP multiplication */ | |
280 | uint64_t HELPER(mxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
281 | uint64_t bh, uint64_t bl) | |
282 | { | |
283 | float128 ret = float128_mul(make_float128(ah, al), | |
284 | make_float128(bh, bl), | |
285 | &env->fpu_status); | |
286 | handle_exceptions(env, GETPC()); | |
287 | return RET128(ret); | |
288 | } | |
289 | ||
290 | /* 128/64-bit FP multiplication */ | |
291 | uint64_t HELPER(mxdb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
292 | uint64_t f2) | |
293 | { | |
294 | float128 ret = float64_to_float128(f2, &env->fpu_status); | |
295 | ret = float128_mul(make_float128(ah, al), ret, &env->fpu_status); | |
296 | handle_exceptions(env, GETPC()); | |
297 | return RET128(ret); | |
e72ca652 BS |
298 | } |
299 | ||
300 | /* convert 32-bit float to 64-bit float */ | |
587626f8 | 301 | uint64_t HELPER(ldeb)(CPUS390XState *env, uint64_t f2) |
e72ca652 | 302 | { |
587626f8 RH |
303 | float64 ret = float32_to_float64(f2, &env->fpu_status); |
304 | handle_exceptions(env, GETPC()); | |
d0cfecb5 | 305 | return ret; |
e72ca652 BS |
306 | } |
307 | ||
308 | /* convert 128-bit float to 64-bit float */ | |
587626f8 | 309 | uint64_t HELPER(ldxb)(CPUS390XState *env, uint64_t ah, uint64_t al) |
e72ca652 | 310 | { |
587626f8 RH |
311 | float64 ret = float128_to_float64(make_float128(ah, al), &env->fpu_status); |
312 | handle_exceptions(env, GETPC()); | |
d0cfecb5 | 313 | return ret; |
e72ca652 BS |
314 | } |
315 | ||
316 | /* convert 64-bit float to 128-bit float */ | |
587626f8 | 317 | uint64_t HELPER(lxdb)(CPUS390XState *env, uint64_t f2) |
e72ca652 | 318 | { |
587626f8 RH |
319 | float128 ret = float64_to_float128(f2, &env->fpu_status); |
320 | handle_exceptions(env, GETPC()); | |
d0cfecb5 | 321 | return RET128(ret); |
587626f8 | 322 | } |
e72ca652 | 323 | |
587626f8 RH |
324 | /* convert 32-bit float to 128-bit float */ |
325 | uint64_t HELPER(lxeb)(CPUS390XState *env, uint64_t f2) | |
326 | { | |
327 | float128 ret = float32_to_float128(f2, &env->fpu_status); | |
328 | handle_exceptions(env, GETPC()); | |
d0cfecb5 | 329 | return RET128(ret); |
e72ca652 BS |
330 | } |
331 | ||
332 | /* convert 64-bit float to 32-bit float */ | |
587626f8 | 333 | uint64_t HELPER(ledb)(CPUS390XState *env, uint64_t f2) |
e72ca652 | 334 | { |
587626f8 RH |
335 | float32 ret = float64_to_float32(f2, &env->fpu_status); |
336 | handle_exceptions(env, GETPC()); | |
d0cfecb5 | 337 | return ret; |
e72ca652 BS |
338 | } |
339 | ||
340 | /* convert 128-bit float to 32-bit float */ | |
587626f8 | 341 | uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, uint64_t al) |
e72ca652 | 342 | { |
587626f8 RH |
343 | float32 ret = float128_to_float32(make_float128(ah, al), &env->fpu_status); |
344 | handle_exceptions(env, GETPC()); | |
d0cfecb5 | 345 | return ret; |
e72ca652 BS |
346 | } |
347 | ||
587626f8 RH |
348 | /* 32-bit FP compare */ |
349 | uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 350 | { |
587626f8 RH |
351 | int cmp = float32_compare_quiet(f1, f2, &env->fpu_status); |
352 | handle_exceptions(env, GETPC()); | |
353 | return float_comp_to_cc(env, cmp); | |
e72ca652 BS |
354 | } |
355 | ||
587626f8 RH |
356 | /* 64-bit FP compare */ |
357 | uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 358 | { |
587626f8 RH |
359 | int cmp = float64_compare_quiet(f1, f2, &env->fpu_status); |
360 | handle_exceptions(env, GETPC()); | |
361 | return float_comp_to_cc(env, cmp); | |
e72ca652 BS |
362 | } |
363 | ||
587626f8 RH |
364 | /* 128-bit FP compare */ |
365 | uint32_t HELPER(cxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
366 | uint64_t bh, uint64_t bl) | |
e72ca652 | 367 | { |
587626f8 RH |
368 | int cmp = float128_compare_quiet(make_float128(ah, al), |
369 | make_float128(bh, bl), | |
370 | &env->fpu_status); | |
371 | handle_exceptions(env, GETPC()); | |
372 | return float_comp_to_cc(env, cmp); | |
e72ca652 BS |
373 | } |
374 | ||
68c8bd93 | 375 | static int swap_round_mode(CPUS390XState *env, int m3) |
e72ca652 | 376 | { |
68c8bd93 | 377 | int ret = env->fpu_status.float_rounding_mode; |
e72ca652 BS |
378 | switch (m3) { |
379 | case 0: | |
380 | /* current mode */ | |
381 | break; | |
382 | case 1: | |
383 | /* biased round no nearest */ | |
384 | case 4: | |
385 | /* round to nearest */ | |
386 | set_float_rounding_mode(float_round_nearest_even, &env->fpu_status); | |
387 | break; | |
388 | case 5: | |
389 | /* round to zero */ | |
390 | set_float_rounding_mode(float_round_to_zero, &env->fpu_status); | |
391 | break; | |
392 | case 6: | |
393 | /* round to +inf */ | |
394 | set_float_rounding_mode(float_round_up, &env->fpu_status); | |
395 | break; | |
396 | case 7: | |
397 | /* round to -inf */ | |
398 | set_float_rounding_mode(float_round_down, &env->fpu_status); | |
399 | break; | |
400 | } | |
68c8bd93 | 401 | return ret; |
e72ca652 BS |
402 | } |
403 | ||
683bb9a8 RH |
404 | /* convert 64-bit int to 32-bit float */ |
405 | uint64_t HELPER(cegb)(CPUS390XState *env, int64_t v2, uint32_t m3) | |
406 | { | |
407 | int hold = swap_round_mode(env, m3); | |
408 | float32 ret = int64_to_float32(v2, &env->fpu_status); | |
409 | set_float_rounding_mode(hold, &env->fpu_status); | |
410 | handle_exceptions(env, GETPC()); | |
411 | return ret; | |
412 | } | |
413 | ||
414 | /* convert 64-bit int to 64-bit float */ | |
415 | uint64_t HELPER(cdgb)(CPUS390XState *env, int64_t v2, uint32_t m3) | |
416 | { | |
417 | int hold = swap_round_mode(env, m3); | |
418 | float64 ret = int64_to_float64(v2, &env->fpu_status); | |
419 | set_float_rounding_mode(hold, &env->fpu_status); | |
420 | handle_exceptions(env, GETPC()); | |
421 | return ret; | |
422 | } | |
423 | ||
424 | /* convert 64-bit int to 128-bit float */ | |
425 | uint64_t HELPER(cxgb)(CPUS390XState *env, int64_t v2, uint32_t m3) | |
426 | { | |
427 | int hold = swap_round_mode(env, m3); | |
428 | float128 ret = int64_to_float128(v2, &env->fpu_status); | |
429 | set_float_rounding_mode(hold, &env->fpu_status); | |
2112bf1b RH |
430 | handle_exceptions(env, GETPC()); |
431 | return RET128(ret); | |
432 | } | |
433 | ||
434 | /* convert 64-bit uint to 32-bit float */ | |
435 | uint64_t HELPER(celgb)(CPUS390XState *env, uint64_t v2, uint32_t m3) | |
436 | { | |
437 | int hold = swap_round_mode(env, m3); | |
438 | float32 ret = uint64_to_float32(v2, &env->fpu_status); | |
439 | set_float_rounding_mode(hold, &env->fpu_status); | |
440 | handle_exceptions(env, GETPC()); | |
441 | return ret; | |
442 | } | |
443 | ||
444 | /* convert 64-bit uint to 64-bit float */ | |
445 | uint64_t HELPER(cdlgb)(CPUS390XState *env, uint64_t v2, uint32_t m3) | |
446 | { | |
447 | int hold = swap_round_mode(env, m3); | |
448 | float64 ret = uint64_to_float64(v2, &env->fpu_status); | |
449 | set_float_rounding_mode(hold, &env->fpu_status); | |
450 | handle_exceptions(env, GETPC()); | |
451 | return ret; | |
452 | } | |
453 | ||
454 | /* convert 64-bit uint to 128-bit float */ | |
455 | uint64_t HELPER(cxlgb)(CPUS390XState *env, uint64_t v2, uint32_t m3) | |
456 | { | |
457 | int hold = swap_round_mode(env, m3); | |
d2d9feac | 458 | float128 ret = uint64_to_float128(v2, &env->fpu_status); |
2112bf1b | 459 | set_float_rounding_mode(hold, &env->fpu_status); |
683bb9a8 RH |
460 | handle_exceptions(env, GETPC()); |
461 | return RET128(ret); | |
462 | } | |
463 | ||
e72ca652 | 464 | /* convert 32-bit float to 64-bit int */ |
68c8bd93 | 465 | uint64_t HELPER(cgeb)(CPUS390XState *env, uint64_t v2, uint32_t m3) |
e72ca652 | 466 | { |
68c8bd93 RH |
467 | int hold = swap_round_mode(env, m3); |
468 | int64_t ret = float32_to_int64(v2, &env->fpu_status); | |
469 | set_float_rounding_mode(hold, &env->fpu_status); | |
470 | handle_exceptions(env, GETPC()); | |
471 | return ret; | |
e72ca652 BS |
472 | } |
473 | ||
474 | /* convert 64-bit float to 64-bit int */ | |
68c8bd93 | 475 | uint64_t HELPER(cgdb)(CPUS390XState *env, uint64_t v2, uint32_t m3) |
e72ca652 | 476 | { |
68c8bd93 RH |
477 | int hold = swap_round_mode(env, m3); |
478 | int64_t ret = float64_to_int64(v2, &env->fpu_status); | |
479 | set_float_rounding_mode(hold, &env->fpu_status); | |
480 | handle_exceptions(env, GETPC()); | |
481 | return ret; | |
e72ca652 BS |
482 | } |
483 | ||
484 | /* convert 128-bit float to 64-bit int */ | |
68c8bd93 | 485 | uint64_t HELPER(cgxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3) |
e72ca652 | 486 | { |
68c8bd93 RH |
487 | int hold = swap_round_mode(env, m3); |
488 | float128 v2 = make_float128(h, l); | |
489 | int64_t ret = float128_to_int64(v2, &env->fpu_status); | |
490 | set_float_rounding_mode(hold, &env->fpu_status); | |
491 | handle_exceptions(env, GETPC()); | |
492 | return ret; | |
e72ca652 BS |
493 | } |
494 | ||
495 | /* convert 32-bit float to 32-bit int */ | |
68c8bd93 | 496 | uint64_t HELPER(cfeb)(CPUS390XState *env, uint64_t v2, uint32_t m3) |
e72ca652 | 497 | { |
68c8bd93 RH |
498 | int hold = swap_round_mode(env, m3); |
499 | int32_t ret = float32_to_int32(v2, &env->fpu_status); | |
500 | set_float_rounding_mode(hold, &env->fpu_status); | |
501 | handle_exceptions(env, GETPC()); | |
502 | return ret; | |
e72ca652 BS |
503 | } |
504 | ||
505 | /* convert 64-bit float to 32-bit int */ | |
68c8bd93 | 506 | uint64_t HELPER(cfdb)(CPUS390XState *env, uint64_t v2, uint32_t m3) |
e72ca652 | 507 | { |
68c8bd93 RH |
508 | int hold = swap_round_mode(env, m3); |
509 | int32_t ret = float64_to_int32(v2, &env->fpu_status); | |
510 | set_float_rounding_mode(hold, &env->fpu_status); | |
511 | handle_exceptions(env, GETPC()); | |
512 | return ret; | |
e72ca652 BS |
513 | } |
514 | ||
515 | /* convert 128-bit float to 32-bit int */ | |
68c8bd93 | 516 | uint64_t HELPER(cfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3) |
e72ca652 | 517 | { |
68c8bd93 RH |
518 | int hold = swap_round_mode(env, m3); |
519 | float128 v2 = make_float128(h, l); | |
520 | int32_t ret = float128_to_int32(v2, &env->fpu_status); | |
521 | set_float_rounding_mode(hold, &env->fpu_status); | |
522 | handle_exceptions(env, GETPC()); | |
523 | return ret; | |
e72ca652 BS |
524 | } |
525 | ||
6ac1b45f RH |
526 | /* convert 32-bit float to 64-bit uint */ |
527 | uint64_t HELPER(clgeb)(CPUS390XState *env, uint64_t v2, uint32_t m3) | |
528 | { | |
529 | int hold = swap_round_mode(env, m3); | |
530 | uint64_t ret; | |
531 | v2 = float32_to_float64(v2, &env->fpu_status); | |
532 | ret = float64_to_uint64(v2, &env->fpu_status); | |
533 | set_float_rounding_mode(hold, &env->fpu_status); | |
534 | handle_exceptions(env, GETPC()); | |
535 | return ret; | |
536 | } | |
537 | ||
538 | /* convert 64-bit float to 64-bit uint */ | |
539 | uint64_t HELPER(clgdb)(CPUS390XState *env, uint64_t v2, uint32_t m3) | |
540 | { | |
541 | int hold = swap_round_mode(env, m3); | |
542 | uint64_t ret = float64_to_uint64(v2, &env->fpu_status); | |
543 | set_float_rounding_mode(hold, &env->fpu_status); | |
544 | handle_exceptions(env, GETPC()); | |
545 | return ret; | |
546 | } | |
547 | ||
548 | /* convert 128-bit float to 64-bit uint */ | |
549 | uint64_t HELPER(clgxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3) | |
550 | { | |
551 | int hold = swap_round_mode(env, m3); | |
3af471f9 | 552 | uint64_t ret = float128_to_uint64(make_float128(h, l), &env->fpu_status); |
6ac1b45f RH |
553 | set_float_rounding_mode(hold, &env->fpu_status); |
554 | handle_exceptions(env, GETPC()); | |
555 | return ret; | |
556 | } | |
557 | ||
558 | /* convert 32-bit float to 32-bit uint */ | |
559 | uint64_t HELPER(clfeb)(CPUS390XState *env, uint64_t v2, uint32_t m3) | |
560 | { | |
561 | int hold = swap_round_mode(env, m3); | |
562 | uint32_t ret = float32_to_uint32(v2, &env->fpu_status); | |
563 | set_float_rounding_mode(hold, &env->fpu_status); | |
564 | handle_exceptions(env, GETPC()); | |
565 | return ret; | |
566 | } | |
567 | ||
568 | /* convert 64-bit float to 32-bit uint */ | |
569 | uint64_t HELPER(clfdb)(CPUS390XState *env, uint64_t v2, uint32_t m3) | |
570 | { | |
571 | int hold = swap_round_mode(env, m3); | |
572 | uint32_t ret = float64_to_uint32(v2, &env->fpu_status); | |
573 | set_float_rounding_mode(hold, &env->fpu_status); | |
574 | handle_exceptions(env, GETPC()); | |
575 | return ret; | |
576 | } | |
577 | ||
578 | /* convert 128-bit float to 32-bit uint */ | |
579 | uint64_t HELPER(clfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3) | |
580 | { | |
581 | int hold = swap_round_mode(env, m3); | |
3af471f9 | 582 | uint32_t ret = float128_to_uint32(make_float128(h, l), &env->fpu_status); |
6ac1b45f RH |
583 | set_float_rounding_mode(hold, &env->fpu_status); |
584 | handle_exceptions(env, GETPC()); | |
585 | return ret; | |
586 | } | |
587 | ||
ed0bcece AJ |
588 | /* round to integer 32-bit */ |
589 | uint64_t HELPER(fieb)(CPUS390XState *env, uint64_t f2, uint32_t m3) | |
590 | { | |
591 | int hold = swap_round_mode(env, m3); | |
592 | float32 ret = float32_round_to_int(f2, &env->fpu_status); | |
593 | set_float_rounding_mode(hold, &env->fpu_status); | |
594 | handle_exceptions(env, GETPC()); | |
595 | return ret; | |
596 | } | |
597 | ||
598 | /* round to integer 64-bit */ | |
599 | uint64_t HELPER(fidb)(CPUS390XState *env, uint64_t f2, uint32_t m3) | |
600 | { | |
601 | int hold = swap_round_mode(env, m3); | |
602 | float64 ret = float64_round_to_int(f2, &env->fpu_status); | |
603 | set_float_rounding_mode(hold, &env->fpu_status); | |
604 | handle_exceptions(env, GETPC()); | |
605 | return ret; | |
606 | } | |
607 | ||
608 | /* round to integer 128-bit */ | |
609 | uint64_t HELPER(fixb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint32_t m3) | |
610 | { | |
611 | int hold = swap_round_mode(env, m3); | |
612 | float128 ret = float128_round_to_int(make_float128(ah, al), | |
613 | &env->fpu_status); | |
614 | set_float_rounding_mode(hold, &env->fpu_status); | |
615 | handle_exceptions(env, GETPC()); | |
616 | return RET128(ret); | |
617 | } | |
618 | ||
9c8be598 AJ |
619 | /* 32-bit FP compare and signal */ |
620 | uint32_t HELPER(keb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
621 | { | |
622 | int cmp = float32_compare(f1, f2, &env->fpu_status); | |
623 | handle_exceptions(env, GETPC()); | |
624 | return float_comp_to_cc(env, cmp); | |
625 | } | |
626 | ||
627 | /* 64-bit FP compare and signal */ | |
628 | uint32_t HELPER(kdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
629 | { | |
630 | int cmp = float64_compare(f1, f2, &env->fpu_status); | |
631 | handle_exceptions(env, GETPC()); | |
632 | return float_comp_to_cc(env, cmp); | |
633 | } | |
634 | ||
635 | /* 128-bit FP compare and signal */ | |
636 | uint32_t HELPER(kxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
637 | uint64_t bh, uint64_t bl) | |
638 | { | |
639 | int cmp = float128_compare(make_float128(ah, al), | |
640 | make_float128(bh, bl), | |
641 | &env->fpu_status); | |
642 | handle_exceptions(env, GETPC()); | |
643 | return float_comp_to_cc(env, cmp); | |
644 | } | |
645 | ||
722bfec3 RH |
646 | /* 32-bit FP multiply and add */ |
647 | uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1, | |
648 | uint64_t f2, uint64_t f3) | |
e72ca652 | 649 | { |
722bfec3 RH |
650 | float32 ret = float32_muladd(f2, f3, f1, 0, &env->fpu_status); |
651 | handle_exceptions(env, GETPC()); | |
652 | return ret; | |
e72ca652 BS |
653 | } |
654 | ||
722bfec3 RH |
655 | /* 64-bit FP multiply and add */ |
656 | uint64_t HELPER(madb)(CPUS390XState *env, uint64_t f1, | |
657 | uint64_t f2, uint64_t f3) | |
e72ca652 | 658 | { |
722bfec3 RH |
659 | float64 ret = float64_muladd(f2, f3, f1, 0, &env->fpu_status); |
660 | handle_exceptions(env, GETPC()); | |
661 | return ret; | |
e72ca652 BS |
662 | } |
663 | ||
722bfec3 RH |
664 | /* 32-bit FP multiply and subtract */ |
665 | uint64_t HELPER(mseb)(CPUS390XState *env, uint64_t f1, | |
666 | uint64_t f2, uint64_t f3) | |
e72ca652 | 667 | { |
722bfec3 RH |
668 | float32 ret = float32_muladd(f2, f3, f1, float_muladd_negate_c, |
669 | &env->fpu_status); | |
670 | handle_exceptions(env, GETPC()); | |
671 | return ret; | |
e72ca652 BS |
672 | } |
673 | ||
722bfec3 RH |
674 | /* 64-bit FP multiply and subtract */ |
675 | uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1, | |
676 | uint64_t f2, uint64_t f3) | |
e72ca652 | 677 | { |
722bfec3 RH |
678 | float64 ret = float64_muladd(f2, f3, f1, float_muladd_negate_c, |
679 | &env->fpu_status); | |
680 | handle_exceptions(env, GETPC()); | |
681 | return ret; | |
e72ca652 BS |
682 | } |
683 | ||
fc7cc951 DH |
684 | /* The rightmost bit has the number 11. */ |
685 | static inline uint16_t dcmask(int bit, bool neg) | |
686 | { | |
687 | return 1 << (11 - bit - neg); | |
688 | } | |
689 | ||
690 | #define DEF_FLOAT_DCMASK(_TYPE) \ | |
691 | static uint16_t _TYPE##_dcmask(CPUS390XState *env, _TYPE f1) \ | |
692 | { \ | |
693 | const bool neg = _TYPE##_is_neg(f1); \ | |
694 | \ | |
695 | /* Sorted by most common cases - only one class is possible */ \ | |
696 | if (_TYPE##_is_normal(f1)) { \ | |
697 | return dcmask(2, neg); \ | |
698 | } else if (_TYPE##_is_zero(f1)) { \ | |
699 | return dcmask(0, neg); \ | |
700 | } else if (_TYPE##_is_denormal(f1)) { \ | |
701 | return dcmask(4, neg); \ | |
702 | } else if (_TYPE##_is_infinity(f1)) { \ | |
703 | return dcmask(6, neg); \ | |
704 | } else if (_TYPE##_is_quiet_nan(f1, &env->fpu_status)) { \ | |
705 | return dcmask(8, neg); \ | |
706 | } \ | |
707 | /* signaling nan, as last remaining case */ \ | |
708 | return dcmask(10, neg); \ | |
709 | } | |
710 | DEF_FLOAT_DCMASK(float32) | |
711 | DEF_FLOAT_DCMASK(float64) | |
712 | DEF_FLOAT_DCMASK(float128) | |
713 | ||
e72ca652 | 714 | /* test data class 32-bit */ |
af39bc8c | 715 | uint32_t HELPER(tceb)(CPUS390XState *env, uint64_t f1, uint64_t m2) |
e72ca652 | 716 | { |
fc7cc951 | 717 | return (m2 & float32_dcmask(env, f1)) != 0; |
e72ca652 BS |
718 | } |
719 | ||
720 | /* test data class 64-bit */ | |
af39bc8c | 721 | uint32_t HELPER(tcdb)(CPUS390XState *env, uint64_t v1, uint64_t m2) |
e72ca652 | 722 | { |
fc7cc951 | 723 | return (m2 & float64_dcmask(env, v1)) != 0; |
e72ca652 BS |
724 | } |
725 | ||
726 | /* test data class 128-bit */ | |
fc7cc951 DH |
727 | uint32_t HELPER(tcxb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t m2) |
728 | { | |
729 | return (m2 & float128_dcmask(env, make_float128(ah, al))) != 0; | |
e72ca652 BS |
730 | } |
731 | ||
16d7b2a4 RH |
732 | /* square root 32-bit */ |
733 | uint64_t HELPER(sqeb)(CPUS390XState *env, uint64_t f2) | |
e72ca652 | 734 | { |
16d7b2a4 RH |
735 | float32 ret = float32_sqrt(f2, &env->fpu_status); |
736 | handle_exceptions(env, GETPC()); | |
737 | return ret; | |
738 | } | |
739 | ||
740 | /* square root 64-bit */ | |
741 | uint64_t HELPER(sqdb)(CPUS390XState *env, uint64_t f2) | |
742 | { | |
743 | float64 ret = float64_sqrt(f2, &env->fpu_status); | |
744 | handle_exceptions(env, GETPC()); | |
745 | return ret; | |
746 | } | |
747 | ||
748 | /* square root 128-bit */ | |
749 | uint64_t HELPER(sqxb)(CPUS390XState *env, uint64_t ah, uint64_t al) | |
750 | { | |
751 | float128 ret = float128_sqrt(make_float128(ah, al), &env->fpu_status); | |
752 | handle_exceptions(env, GETPC()); | |
753 | return RET128(ret); | |
e72ca652 | 754 | } |
8379bfdb | 755 | |
2aea83c6 | 756 | static const int fpc_to_rnd[8] = { |
411edc22 RH |
757 | float_round_nearest_even, |
758 | float_round_to_zero, | |
759 | float_round_up, | |
2aea83c6 DH |
760 | float_round_down, |
761 | -1, | |
762 | -1, | |
763 | -1, | |
764 | float_round_to_odd, | |
411edc22 RH |
765 | }; |
766 | ||
8379bfdb RH |
767 | /* set fpc */ |
768 | void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) | |
769 | { | |
2aea83c6 DH |
770 | if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || |
771 | (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { | |
772 | s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); | |
773 | } | |
774 | ||
8379bfdb RH |
775 | /* Install everything in the main FPC. */ |
776 | env->fpc = fpc; | |
777 | ||
778 | /* Install the rounding mode in the shadow fpu_status. */ | |
2aea83c6 | 779 | set_float_rounding_mode(fpc_to_rnd[fpc & 0x7], &env->fpu_status); |
411edc22 RH |
780 | } |
781 | ||
782 | /* set fpc and signal */ | |
f66a0ecf | 783 | void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) |
411edc22 RH |
784 | { |
785 | uint32_t signalling = env->fpc; | |
411edc22 RH |
786 | uint32_t s390_exc; |
787 | ||
2aea83c6 DH |
788 | if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || |
789 | (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { | |
790 | s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); | |
791 | } | |
792 | ||
f66a0ecf DH |
793 | /* |
794 | * FPC is set to the FPC operand with a bitwise OR of the signalling | |
795 | * flags. | |
796 | */ | |
797 | env->fpc = fpc | (signalling & 0x00ff0000); | |
2aea83c6 | 798 | set_float_rounding_mode(fpc_to_rnd[fpc & 0x7], &env->fpu_status); |
411edc22 | 799 | |
f66a0ecf DH |
800 | /* |
801 | * If any signaling flag is enabled in the new FPC mask, a | |
802 | * simulated-iee-exception exception occurs. | |
803 | */ | |
804 | s390_exc = (signalling >> 16) & (fpc >> 24); | |
411edc22 | 805 | if (s390_exc) { |
8772bbe4 DH |
806 | if (s390_exc & S390_IEEE_MASK_INVALID) { |
807 | s390_exc = S390_IEEE_MASK_INVALID; | |
808 | } else if (s390_exc & S390_IEEE_MASK_DIVBYZERO) { | |
809 | s390_exc = S390_IEEE_MASK_DIVBYZERO; | |
810 | } else if (s390_exc & S390_IEEE_MASK_OVERFLOW) { | |
811 | s390_exc &= (S390_IEEE_MASK_OVERFLOW | S390_IEEE_MASK_INEXACT); | |
812 | } else if (s390_exc & S390_IEEE_MASK_UNDERFLOW) { | |
813 | s390_exc &= (S390_IEEE_MASK_UNDERFLOW | S390_IEEE_MASK_INEXACT); | |
814 | } else if (s390_exc & S390_IEEE_MASK_INEXACT) { | |
815 | s390_exc = S390_IEEE_MASK_INEXACT; | |
816 | } else if (s390_exc & S390_IEEE_MASK_QUANTUM) { | |
817 | s390_exc = S390_IEEE_MASK_QUANTUM; | |
818 | } | |
bbf6ea3b | 819 | tcg_s390_data_exception(env, s390_exc | 3, GETPC()); |
411edc22 | 820 | } |
8379bfdb | 821 | } |
b9c737f5 DH |
822 | |
823 | /* set bfp rounding mode */ | |
824 | void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) | |
825 | { | |
826 | if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { | |
827 | s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); | |
828 | } | |
829 | ||
830 | env->fpc = deposit32(env->fpc, 0, 3, rnd); | |
831 | set_float_rounding_mode(fpc_to_rnd[rnd & 0x7], &env->fpu_status); | |
832 | } |