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e72ca652 BS |
1 | /* |
2 | * S/390 FPU helper routines | |
3 | * | |
4 | * Copyright (c) 2009 Ulrich Hecht | |
5 | * Copyright (c) 2009 Alexander Graf | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
41c6a6dd | 10 | * version 2.1 of the License, or (at your option) any later version. |
e72ca652 BS |
11 | * |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
9615495a | 21 | #include "qemu/osdep.h" |
e72ca652 | 22 | #include "cpu.h" |
4e58b838 | 23 | #include "internal.h" |
bbf6ea3b | 24 | #include "tcg_s390x.h" |
63c91552 | 25 | #include "exec/exec-all.h" |
f08b6170 | 26 | #include "exec/cpu_ldst.h" |
2ef6175a | 27 | #include "exec/helper-proto.h" |
24f91e81 | 28 | #include "fpu/softfloat.h" |
e72ca652 | 29 | |
e72ca652 BS |
30 | /* #define DEBUG_HELPER */ |
31 | #ifdef DEBUG_HELPER | |
32 | #define HELPER_LOG(x...) qemu_log(x) | |
33 | #else | |
34 | #define HELPER_LOG(x...) | |
35 | #endif | |
36 | ||
587626f8 RH |
37 | #define RET128(F) (env->retxl = F.low, F.high) |
38 | ||
4b70fc54 DH |
39 | uint8_t s390_softfloat_exc_to_ieee(unsigned int exc) |
40 | { | |
41 | uint8_t s390_exc = 0; | |
42 | ||
43 | s390_exc |= (exc & float_flag_invalid) ? S390_IEEE_MASK_INVALID : 0; | |
44 | s390_exc |= (exc & float_flag_divbyzero) ? S390_IEEE_MASK_DIVBYZERO : 0; | |
45 | s390_exc |= (exc & float_flag_overflow) ? S390_IEEE_MASK_OVERFLOW : 0; | |
46 | s390_exc |= (exc & float_flag_underflow) ? S390_IEEE_MASK_UNDERFLOW : 0; | |
47 | s390_exc |= (exc & float_flag_inexact) ? S390_IEEE_MASK_INEXACT : 0; | |
48 | ||
49 | return s390_exc; | |
50 | } | |
587626f8 | 51 | |
587626f8 | 52 | /* Should be called after any operation that may raise IEEE exceptions. */ |
cf97f9ff | 53 | static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr) |
587626f8 RH |
54 | { |
55 | unsigned s390_exc, qemu_exc; | |
56 | ||
57 | /* Get the exceptions raised by the current operation. Reset the | |
58 | fpu_status contents so that the next operation has a clean slate. */ | |
59 | qemu_exc = env->fpu_status.float_exception_flags; | |
60 | if (qemu_exc == 0) { | |
61 | return; | |
62 | } | |
63 | env->fpu_status.float_exception_flags = 0; | |
4b70fc54 | 64 | s390_exc = s390_softfloat_exc_to_ieee(qemu_exc); |
587626f8 | 65 | |
6d6ad1d1 DH |
66 | /* |
67 | * IEEE-Underflow exception recognition exists if a tininess condition | |
68 | * (underflow) exists and | |
69 | * - The mask bit in the FPC is zero and the result is inexact | |
70 | * - The mask bit in the FPC is one | |
71 | * So tininess conditions that are not inexact don't trigger any | |
72 | * underflow action in case the mask bit is not one. | |
73 | */ | |
74 | if (!(s390_exc & S390_IEEE_MASK_INEXACT) && | |
75 | !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) { | |
76 | s390_exc &= ~S390_IEEE_MASK_UNDERFLOW; | |
77 | } | |
78 | ||
fcb9e9f2 DH |
79 | /* |
80 | * FIXME: | |
81 | * 1. Right now, all inexact conditions are inidicated as | |
82 | * "truncated" (0) and never as "incremented" (1) in the DXC. | |
83 | * 2. Only traps due to invalid/divbyzero are suppressing. Other traps | |
84 | * are completing, meaning the target register has to be written! | |
85 | * This, however will mean that we have to write the register before | |
86 | * triggering the trap - impossible right now. | |
87 | */ | |
587626f8 | 88 | |
fcb9e9f2 DH |
89 | /* |
90 | * invalid/divbyzero cannot coexist with other conditions. | |
91 | * overflow/underflow however can coexist with inexact, we have to | |
92 | * handle it separatly. | |
93 | */ | |
94 | if (s390_exc & ~S390_IEEE_MASK_INEXACT) { | |
95 | if (s390_exc & ~S390_IEEE_MASK_INEXACT & env->fpc >> 24) { | |
96 | /* trap condition - inexact reported along */ | |
97 | tcg_s390_data_exception(env, s390_exc, retaddr); | |
98 | } | |
99 | /* nontrap condition - inexact handled differently */ | |
100 | env->fpc |= (s390_exc & ~S390_IEEE_MASK_INEXACT) << 16; | |
101 | } | |
102 | ||
103 | /* inexact handling */ | |
cf97f9ff | 104 | if (s390_exc & S390_IEEE_MASK_INEXACT && !XxC) { |
fcb9e9f2 DH |
105 | /* trap condition - overflow/underflow _not_ reported along */ |
106 | if (s390_exc & S390_IEEE_MASK_INEXACT & env->fpc >> 24) { | |
107 | tcg_s390_data_exception(env, s390_exc & S390_IEEE_MASK_INEXACT, | |
108 | retaddr); | |
109 | } | |
110 | /* nontrap condition */ | |
111 | env->fpc |= (s390_exc & S390_IEEE_MASK_INEXACT) << 16; | |
587626f8 RH |
112 | } |
113 | } | |
114 | ||
449c0d70 | 115 | static inline int float_comp_to_cc(CPUS390XState *env, int float_compare) |
e72ca652 | 116 | { |
a47dddd7 AF |
117 | S390CPU *cpu = s390_env_get_cpu(env); |
118 | ||
e72ca652 BS |
119 | switch (float_compare) { |
120 | case float_relation_equal: | |
121 | return 0; | |
122 | case float_relation_less: | |
123 | return 1; | |
124 | case float_relation_greater: | |
125 | return 2; | |
126 | case float_relation_unordered: | |
127 | return 3; | |
128 | default: | |
a47dddd7 | 129 | cpu_abort(CPU(cpu), "unknown return value for float compare\n"); |
e72ca652 BS |
130 | } |
131 | } | |
132 | ||
e72ca652 BS |
133 | /* condition codes for unary FP ops */ |
134 | uint32_t set_cc_nz_f32(float32 v) | |
135 | { | |
136 | if (float32_is_any_nan(v)) { | |
137 | return 3; | |
138 | } else if (float32_is_zero(v)) { | |
139 | return 0; | |
140 | } else if (float32_is_neg(v)) { | |
141 | return 1; | |
142 | } else { | |
143 | return 2; | |
144 | } | |
145 | } | |
146 | ||
147 | uint32_t set_cc_nz_f64(float64 v) | |
148 | { | |
149 | if (float64_is_any_nan(v)) { | |
150 | return 3; | |
151 | } else if (float64_is_zero(v)) { | |
152 | return 0; | |
153 | } else if (float64_is_neg(v)) { | |
154 | return 1; | |
155 | } else { | |
156 | return 2; | |
157 | } | |
158 | } | |
159 | ||
587626f8 | 160 | uint32_t set_cc_nz_f128(float128 v) |
e72ca652 BS |
161 | { |
162 | if (float128_is_any_nan(v)) { | |
163 | return 3; | |
164 | } else if (float128_is_zero(v)) { | |
165 | return 0; | |
166 | } else if (float128_is_neg(v)) { | |
167 | return 1; | |
168 | } else { | |
169 | return 2; | |
170 | } | |
171 | } | |
172 | ||
dce0a58f DH |
173 | static inline uint8_t round_from_m34(uint32_t m34) |
174 | { | |
175 | return extract32(m34, 0, 4); | |
176 | } | |
177 | ||
178 | static inline bool xxc_from_m34(uint32_t m34) | |
179 | { | |
180 | /* XxC is bit 1 of m4 */ | |
181 | return extract32(m34, 4 + 3 - 1, 1); | |
182 | } | |
183 | ||
587626f8 RH |
184 | /* 32-bit FP addition */ |
185 | uint64_t HELPER(aeb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 186 | { |
587626f8 | 187 | float32 ret = float32_add(f1, f2, &env->fpu_status); |
cf97f9ff | 188 | handle_exceptions(env, false, GETPC()); |
587626f8 | 189 | return ret; |
e72ca652 BS |
190 | } |
191 | ||
587626f8 RH |
192 | /* 64-bit FP addition */ |
193 | uint64_t HELPER(adb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 194 | { |
587626f8 | 195 | float64 ret = float64_add(f1, f2, &env->fpu_status); |
cf97f9ff | 196 | handle_exceptions(env, false, GETPC()); |
587626f8 RH |
197 | return ret; |
198 | } | |
e72ca652 | 199 | |
587626f8 RH |
200 | /* 128-bit FP addition */ |
201 | uint64_t HELPER(axb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
202 | uint64_t bh, uint64_t bl) | |
203 | { | |
204 | float128 ret = float128_add(make_float128(ah, al), | |
205 | make_float128(bh, bl), | |
206 | &env->fpu_status); | |
cf97f9ff | 207 | handle_exceptions(env, false, GETPC()); |
587626f8 | 208 | return RET128(ret); |
e72ca652 BS |
209 | } |
210 | ||
1a800a2d RH |
211 | /* 32-bit FP subtraction */ |
212 | uint64_t HELPER(seb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 213 | { |
1a800a2d | 214 | float32 ret = float32_sub(f1, f2, &env->fpu_status); |
cf97f9ff | 215 | handle_exceptions(env, false, GETPC()); |
1a800a2d | 216 | return ret; |
e72ca652 BS |
217 | } |
218 | ||
1a800a2d RH |
219 | /* 64-bit FP subtraction */ |
220 | uint64_t HELPER(sdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 221 | { |
1a800a2d | 222 | float64 ret = float64_sub(f1, f2, &env->fpu_status); |
cf97f9ff | 223 | handle_exceptions(env, false, GETPC()); |
1a800a2d RH |
224 | return ret; |
225 | } | |
e72ca652 | 226 | |
1a800a2d RH |
227 | /* 128-bit FP subtraction */ |
228 | uint64_t HELPER(sxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
229 | uint64_t bh, uint64_t bl) | |
230 | { | |
231 | float128 ret = float128_sub(make_float128(ah, al), | |
232 | make_float128(bh, bl), | |
233 | &env->fpu_status); | |
cf97f9ff | 234 | handle_exceptions(env, false, GETPC()); |
1a800a2d | 235 | return RET128(ret); |
e72ca652 BS |
236 | } |
237 | ||
f08a5c31 RH |
238 | /* 32-bit FP division */ |
239 | uint64_t HELPER(deb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 240 | { |
f08a5c31 | 241 | float32 ret = float32_div(f1, f2, &env->fpu_status); |
cf97f9ff | 242 | handle_exceptions(env, false, GETPC()); |
f08a5c31 | 243 | return ret; |
e72ca652 BS |
244 | } |
245 | ||
f08a5c31 RH |
246 | /* 64-bit FP division */ |
247 | uint64_t HELPER(ddb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 248 | { |
f08a5c31 | 249 | float64 ret = float64_div(f1, f2, &env->fpu_status); |
cf97f9ff | 250 | handle_exceptions(env, false, GETPC()); |
f08a5c31 RH |
251 | return ret; |
252 | } | |
e72ca652 | 253 | |
f08a5c31 RH |
254 | /* 128-bit FP division */ |
255 | uint64_t HELPER(dxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
256 | uint64_t bh, uint64_t bl) | |
257 | { | |
258 | float128 ret = float128_div(make_float128(ah, al), | |
259 | make_float128(bh, bl), | |
260 | &env->fpu_status); | |
cf97f9ff | 261 | handle_exceptions(env, false, GETPC()); |
f08a5c31 | 262 | return RET128(ret); |
e72ca652 BS |
263 | } |
264 | ||
83b00736 RH |
265 | /* 32-bit FP multiplication */ |
266 | uint64_t HELPER(meeb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 267 | { |
83b00736 | 268 | float32 ret = float32_mul(f1, f2, &env->fpu_status); |
cf97f9ff | 269 | handle_exceptions(env, false, GETPC()); |
83b00736 | 270 | return ret; |
e72ca652 BS |
271 | } |
272 | ||
83b00736 RH |
273 | /* 64-bit FP multiplication */ |
274 | uint64_t HELPER(mdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 275 | { |
83b00736 | 276 | float64 ret = float64_mul(f1, f2, &env->fpu_status); |
cf97f9ff | 277 | handle_exceptions(env, false, GETPC()); |
83b00736 RH |
278 | return ret; |
279 | } | |
e72ca652 | 280 | |
83b00736 RH |
281 | /* 64/32-bit FP multiplication */ |
282 | uint64_t HELPER(mdeb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
283 | { | |
284 | float64 ret = float32_to_float64(f2, &env->fpu_status); | |
285 | ret = float64_mul(f1, ret, &env->fpu_status); | |
cf97f9ff | 286 | handle_exceptions(env, false, GETPC()); |
83b00736 RH |
287 | return ret; |
288 | } | |
289 | ||
290 | /* 128-bit FP multiplication */ | |
291 | uint64_t HELPER(mxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
292 | uint64_t bh, uint64_t bl) | |
293 | { | |
294 | float128 ret = float128_mul(make_float128(ah, al), | |
295 | make_float128(bh, bl), | |
296 | &env->fpu_status); | |
cf97f9ff | 297 | handle_exceptions(env, false, GETPC()); |
83b00736 RH |
298 | return RET128(ret); |
299 | } | |
300 | ||
301 | /* 128/64-bit FP multiplication */ | |
302 | uint64_t HELPER(mxdb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
303 | uint64_t f2) | |
304 | { | |
305 | float128 ret = float64_to_float128(f2, &env->fpu_status); | |
306 | ret = float128_mul(make_float128(ah, al), ret, &env->fpu_status); | |
cf97f9ff | 307 | handle_exceptions(env, false, GETPC()); |
83b00736 | 308 | return RET128(ret); |
e72ca652 BS |
309 | } |
310 | ||
311 | /* convert 32-bit float to 64-bit float */ | |
587626f8 | 312 | uint64_t HELPER(ldeb)(CPUS390XState *env, uint64_t f2) |
e72ca652 | 313 | { |
587626f8 | 314 | float64 ret = float32_to_float64(f2, &env->fpu_status); |
cf97f9ff | 315 | handle_exceptions(env, false, GETPC()); |
d0cfecb5 | 316 | return ret; |
e72ca652 BS |
317 | } |
318 | ||
319 | /* convert 128-bit float to 64-bit float */ | |
bdcfcd44 DH |
320 | uint64_t HELPER(ldxb)(CPUS390XState *env, uint64_t ah, uint64_t al, |
321 | uint32_t m34) | |
e72ca652 | 322 | { |
bdcfcd44 | 323 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
587626f8 | 324 | float64 ret = float128_to_float64(make_float128(ah, al), &env->fpu_status); |
bdcfcd44 DH |
325 | |
326 | s390_restore_bfp_rounding_mode(env, old_mode); | |
327 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); | |
d0cfecb5 | 328 | return ret; |
e72ca652 BS |
329 | } |
330 | ||
331 | /* convert 64-bit float to 128-bit float */ | |
587626f8 | 332 | uint64_t HELPER(lxdb)(CPUS390XState *env, uint64_t f2) |
e72ca652 | 333 | { |
587626f8 | 334 | float128 ret = float64_to_float128(f2, &env->fpu_status); |
cf97f9ff | 335 | handle_exceptions(env, false, GETPC()); |
d0cfecb5 | 336 | return RET128(ret); |
587626f8 | 337 | } |
e72ca652 | 338 | |
587626f8 RH |
339 | /* convert 32-bit float to 128-bit float */ |
340 | uint64_t HELPER(lxeb)(CPUS390XState *env, uint64_t f2) | |
341 | { | |
342 | float128 ret = float32_to_float128(f2, &env->fpu_status); | |
cf97f9ff | 343 | handle_exceptions(env, false, GETPC()); |
d0cfecb5 | 344 | return RET128(ret); |
e72ca652 BS |
345 | } |
346 | ||
347 | /* convert 64-bit float to 32-bit float */ | |
bdcfcd44 | 348 | uint64_t HELPER(ledb)(CPUS390XState *env, uint64_t f2, uint32_t m34) |
e72ca652 | 349 | { |
bdcfcd44 | 350 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
587626f8 | 351 | float32 ret = float64_to_float32(f2, &env->fpu_status); |
bdcfcd44 DH |
352 | |
353 | s390_restore_bfp_rounding_mode(env, old_mode); | |
354 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); | |
d0cfecb5 | 355 | return ret; |
e72ca652 BS |
356 | } |
357 | ||
358 | /* convert 128-bit float to 32-bit float */ | |
bdcfcd44 DH |
359 | uint64_t HELPER(lexb)(CPUS390XState *env, uint64_t ah, uint64_t al, |
360 | uint32_t m34) | |
e72ca652 | 361 | { |
bdcfcd44 | 362 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
587626f8 | 363 | float32 ret = float128_to_float32(make_float128(ah, al), &env->fpu_status); |
bdcfcd44 DH |
364 | |
365 | s390_restore_bfp_rounding_mode(env, old_mode); | |
366 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); | |
d0cfecb5 | 367 | return ret; |
e72ca652 BS |
368 | } |
369 | ||
587626f8 RH |
370 | /* 32-bit FP compare */ |
371 | uint32_t HELPER(ceb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 372 | { |
587626f8 | 373 | int cmp = float32_compare_quiet(f1, f2, &env->fpu_status); |
cf97f9ff | 374 | handle_exceptions(env, false, GETPC()); |
587626f8 | 375 | return float_comp_to_cc(env, cmp); |
e72ca652 BS |
376 | } |
377 | ||
587626f8 RH |
378 | /* 64-bit FP compare */ |
379 | uint32_t HELPER(cdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
e72ca652 | 380 | { |
587626f8 | 381 | int cmp = float64_compare_quiet(f1, f2, &env->fpu_status); |
cf97f9ff | 382 | handle_exceptions(env, false, GETPC()); |
587626f8 | 383 | return float_comp_to_cc(env, cmp); |
e72ca652 BS |
384 | } |
385 | ||
587626f8 RH |
386 | /* 128-bit FP compare */ |
387 | uint32_t HELPER(cxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
388 | uint64_t bh, uint64_t bl) | |
e72ca652 | 389 | { |
587626f8 RH |
390 | int cmp = float128_compare_quiet(make_float128(ah, al), |
391 | make_float128(bh, bl), | |
392 | &env->fpu_status); | |
cf97f9ff | 393 | handle_exceptions(env, false, GETPC()); |
587626f8 | 394 | return float_comp_to_cc(env, cmp); |
e72ca652 BS |
395 | } |
396 | ||
c0ee7015 | 397 | int s390_swap_bfp_rounding_mode(CPUS390XState *env, int m3) |
e72ca652 | 398 | { |
68c8bd93 | 399 | int ret = env->fpu_status.float_rounding_mode; |
e72ca652 BS |
400 | switch (m3) { |
401 | case 0: | |
402 | /* current mode */ | |
403 | break; | |
404 | case 1: | |
405 | /* biased round no nearest */ | |
406 | case 4: | |
407 | /* round to nearest */ | |
408 | set_float_rounding_mode(float_round_nearest_even, &env->fpu_status); | |
409 | break; | |
410 | case 5: | |
411 | /* round to zero */ | |
412 | set_float_rounding_mode(float_round_to_zero, &env->fpu_status); | |
413 | break; | |
414 | case 6: | |
415 | /* round to +inf */ | |
416 | set_float_rounding_mode(float_round_up, &env->fpu_status); | |
417 | break; | |
418 | case 7: | |
419 | /* round to -inf */ | |
420 | set_float_rounding_mode(float_round_down, &env->fpu_status); | |
421 | break; | |
422 | } | |
68c8bd93 | 423 | return ret; |
e72ca652 BS |
424 | } |
425 | ||
c0ee7015 DH |
426 | void s390_restore_bfp_rounding_mode(CPUS390XState *env, int old_mode) |
427 | { | |
428 | set_float_rounding_mode(old_mode, &env->fpu_status); | |
429 | } | |
430 | ||
683bb9a8 | 431 | /* convert 64-bit int to 32-bit float */ |
dce0a58f | 432 | uint64_t HELPER(cegb)(CPUS390XState *env, int64_t v2, uint32_t m34) |
683bb9a8 | 433 | { |
dce0a58f | 434 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
683bb9a8 | 435 | float32 ret = int64_to_float32(v2, &env->fpu_status); |
c0ee7015 DH |
436 | |
437 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 438 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
683bb9a8 RH |
439 | return ret; |
440 | } | |
441 | ||
442 | /* convert 64-bit int to 64-bit float */ | |
dce0a58f | 443 | uint64_t HELPER(cdgb)(CPUS390XState *env, int64_t v2, uint32_t m34) |
683bb9a8 | 444 | { |
dce0a58f | 445 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
683bb9a8 | 446 | float64 ret = int64_to_float64(v2, &env->fpu_status); |
c0ee7015 DH |
447 | |
448 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 449 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
683bb9a8 RH |
450 | return ret; |
451 | } | |
452 | ||
453 | /* convert 64-bit int to 128-bit float */ | |
dce0a58f | 454 | uint64_t HELPER(cxgb)(CPUS390XState *env, int64_t v2, uint32_t m34) |
683bb9a8 | 455 | { |
dce0a58f | 456 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
683bb9a8 | 457 | float128 ret = int64_to_float128(v2, &env->fpu_status); |
c0ee7015 DH |
458 | |
459 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 460 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
2112bf1b RH |
461 | return RET128(ret); |
462 | } | |
463 | ||
464 | /* convert 64-bit uint to 32-bit float */ | |
dce0a58f | 465 | uint64_t HELPER(celgb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
2112bf1b | 466 | { |
dce0a58f | 467 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
2112bf1b | 468 | float32 ret = uint64_to_float32(v2, &env->fpu_status); |
c0ee7015 DH |
469 | |
470 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 471 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
2112bf1b RH |
472 | return ret; |
473 | } | |
474 | ||
475 | /* convert 64-bit uint to 64-bit float */ | |
dce0a58f | 476 | uint64_t HELPER(cdlgb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
2112bf1b | 477 | { |
dce0a58f | 478 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
2112bf1b | 479 | float64 ret = uint64_to_float64(v2, &env->fpu_status); |
c0ee7015 DH |
480 | |
481 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 482 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
2112bf1b RH |
483 | return ret; |
484 | } | |
485 | ||
486 | /* convert 64-bit uint to 128-bit float */ | |
dce0a58f | 487 | uint64_t HELPER(cxlgb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
2112bf1b | 488 | { |
dce0a58f | 489 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
d2d9feac | 490 | float128 ret = uint64_to_float128(v2, &env->fpu_status); |
c0ee7015 DH |
491 | |
492 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 493 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
683bb9a8 RH |
494 | return RET128(ret); |
495 | } | |
496 | ||
e72ca652 | 497 | /* convert 32-bit float to 64-bit int */ |
dce0a58f | 498 | uint64_t HELPER(cgeb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
e72ca652 | 499 | { |
dce0a58f | 500 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
68c8bd93 | 501 | int64_t ret = float32_to_int64(v2, &env->fpu_status); |
c0ee7015 DH |
502 | |
503 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 504 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
68c8bd93 | 505 | return ret; |
e72ca652 BS |
506 | } |
507 | ||
508 | /* convert 64-bit float to 64-bit int */ | |
dce0a58f | 509 | uint64_t HELPER(cgdb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
e72ca652 | 510 | { |
dce0a58f | 511 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
68c8bd93 | 512 | int64_t ret = float64_to_int64(v2, &env->fpu_status); |
c0ee7015 DH |
513 | |
514 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 515 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
68c8bd93 | 516 | return ret; |
e72ca652 BS |
517 | } |
518 | ||
519 | /* convert 128-bit float to 64-bit int */ | |
dce0a58f | 520 | uint64_t HELPER(cgxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m34) |
e72ca652 | 521 | { |
dce0a58f | 522 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
68c8bd93 RH |
523 | float128 v2 = make_float128(h, l); |
524 | int64_t ret = float128_to_int64(v2, &env->fpu_status); | |
c0ee7015 DH |
525 | |
526 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 527 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
68c8bd93 | 528 | return ret; |
e72ca652 BS |
529 | } |
530 | ||
531 | /* convert 32-bit float to 32-bit int */ | |
dce0a58f | 532 | uint64_t HELPER(cfeb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
e72ca652 | 533 | { |
dce0a58f | 534 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
68c8bd93 | 535 | int32_t ret = float32_to_int32(v2, &env->fpu_status); |
c0ee7015 DH |
536 | |
537 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 538 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
68c8bd93 | 539 | return ret; |
e72ca652 BS |
540 | } |
541 | ||
542 | /* convert 64-bit float to 32-bit int */ | |
dce0a58f | 543 | uint64_t HELPER(cfdb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
e72ca652 | 544 | { |
dce0a58f | 545 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
68c8bd93 | 546 | int32_t ret = float64_to_int32(v2, &env->fpu_status); |
c0ee7015 DH |
547 | |
548 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 549 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
68c8bd93 | 550 | return ret; |
e72ca652 BS |
551 | } |
552 | ||
553 | /* convert 128-bit float to 32-bit int */ | |
dce0a58f | 554 | uint64_t HELPER(cfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m34) |
e72ca652 | 555 | { |
dce0a58f | 556 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
68c8bd93 RH |
557 | float128 v2 = make_float128(h, l); |
558 | int32_t ret = float128_to_int32(v2, &env->fpu_status); | |
c0ee7015 DH |
559 | |
560 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 561 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
68c8bd93 | 562 | return ret; |
e72ca652 BS |
563 | } |
564 | ||
6ac1b45f | 565 | /* convert 32-bit float to 64-bit uint */ |
dce0a58f | 566 | uint64_t HELPER(clgeb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
6ac1b45f | 567 | { |
dce0a58f | 568 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
6ac1b45f | 569 | uint64_t ret; |
c0ee7015 | 570 | |
6ac1b45f RH |
571 | v2 = float32_to_float64(v2, &env->fpu_status); |
572 | ret = float64_to_uint64(v2, &env->fpu_status); | |
c0ee7015 | 573 | s390_restore_bfp_rounding_mode(env, old_mode); |
dce0a58f | 574 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
6ac1b45f RH |
575 | return ret; |
576 | } | |
577 | ||
578 | /* convert 64-bit float to 64-bit uint */ | |
dce0a58f | 579 | uint64_t HELPER(clgdb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
6ac1b45f | 580 | { |
dce0a58f | 581 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
6ac1b45f | 582 | uint64_t ret = float64_to_uint64(v2, &env->fpu_status); |
c0ee7015 DH |
583 | |
584 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 585 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
6ac1b45f RH |
586 | return ret; |
587 | } | |
588 | ||
589 | /* convert 128-bit float to 64-bit uint */ | |
dce0a58f | 590 | uint64_t HELPER(clgxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m34) |
6ac1b45f | 591 | { |
dce0a58f | 592 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
3af471f9 | 593 | uint64_t ret = float128_to_uint64(make_float128(h, l), &env->fpu_status); |
c0ee7015 DH |
594 | |
595 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 596 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
6ac1b45f RH |
597 | return ret; |
598 | } | |
599 | ||
600 | /* convert 32-bit float to 32-bit uint */ | |
dce0a58f | 601 | uint64_t HELPER(clfeb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
6ac1b45f | 602 | { |
dce0a58f | 603 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
6ac1b45f | 604 | uint32_t ret = float32_to_uint32(v2, &env->fpu_status); |
c0ee7015 DH |
605 | |
606 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 607 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
6ac1b45f RH |
608 | return ret; |
609 | } | |
610 | ||
611 | /* convert 64-bit float to 32-bit uint */ | |
dce0a58f | 612 | uint64_t HELPER(clfdb)(CPUS390XState *env, uint64_t v2, uint32_t m34) |
6ac1b45f | 613 | { |
dce0a58f | 614 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
6ac1b45f | 615 | uint32_t ret = float64_to_uint32(v2, &env->fpu_status); |
c0ee7015 DH |
616 | |
617 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 618 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
6ac1b45f RH |
619 | return ret; |
620 | } | |
621 | ||
622 | /* convert 128-bit float to 32-bit uint */ | |
dce0a58f | 623 | uint64_t HELPER(clfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m34) |
6ac1b45f | 624 | { |
dce0a58f | 625 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
3af471f9 | 626 | uint32_t ret = float128_to_uint32(make_float128(h, l), &env->fpu_status); |
c0ee7015 DH |
627 | |
628 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 629 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
6ac1b45f RH |
630 | return ret; |
631 | } | |
632 | ||
ed0bcece | 633 | /* round to integer 32-bit */ |
dce0a58f | 634 | uint64_t HELPER(fieb)(CPUS390XState *env, uint64_t f2, uint32_t m34) |
ed0bcece | 635 | { |
dce0a58f | 636 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
ed0bcece | 637 | float32 ret = float32_round_to_int(f2, &env->fpu_status); |
c0ee7015 DH |
638 | |
639 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 640 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
ed0bcece AJ |
641 | return ret; |
642 | } | |
643 | ||
644 | /* round to integer 64-bit */ | |
dce0a58f | 645 | uint64_t HELPER(fidb)(CPUS390XState *env, uint64_t f2, uint32_t m34) |
ed0bcece | 646 | { |
dce0a58f | 647 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
ed0bcece | 648 | float64 ret = float64_round_to_int(f2, &env->fpu_status); |
c0ee7015 DH |
649 | |
650 | s390_restore_bfp_rounding_mode(env, old_mode); | |
dce0a58f | 651 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
ed0bcece AJ |
652 | return ret; |
653 | } | |
654 | ||
655 | /* round to integer 128-bit */ | |
dce0a58f DH |
656 | uint64_t HELPER(fixb)(CPUS390XState *env, uint64_t ah, uint64_t al, |
657 | uint32_t m34) | |
ed0bcece | 658 | { |
dce0a58f | 659 | int old_mode = s390_swap_bfp_rounding_mode(env, round_from_m34(m34)); |
ed0bcece AJ |
660 | float128 ret = float128_round_to_int(make_float128(ah, al), |
661 | &env->fpu_status); | |
cf97f9ff | 662 | |
c0ee7015 | 663 | s390_restore_bfp_rounding_mode(env, old_mode); |
dce0a58f | 664 | handle_exceptions(env, xxc_from_m34(m34), GETPC()); |
ed0bcece AJ |
665 | return RET128(ret); |
666 | } | |
667 | ||
9c8be598 AJ |
668 | /* 32-bit FP compare and signal */ |
669 | uint32_t HELPER(keb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
670 | { | |
671 | int cmp = float32_compare(f1, f2, &env->fpu_status); | |
cf97f9ff | 672 | handle_exceptions(env, false, GETPC()); |
9c8be598 AJ |
673 | return float_comp_to_cc(env, cmp); |
674 | } | |
675 | ||
676 | /* 64-bit FP compare and signal */ | |
677 | uint32_t HELPER(kdb)(CPUS390XState *env, uint64_t f1, uint64_t f2) | |
678 | { | |
679 | int cmp = float64_compare(f1, f2, &env->fpu_status); | |
cf97f9ff | 680 | handle_exceptions(env, false, GETPC()); |
9c8be598 AJ |
681 | return float_comp_to_cc(env, cmp); |
682 | } | |
683 | ||
684 | /* 128-bit FP compare and signal */ | |
685 | uint32_t HELPER(kxb)(CPUS390XState *env, uint64_t ah, uint64_t al, | |
686 | uint64_t bh, uint64_t bl) | |
687 | { | |
688 | int cmp = float128_compare(make_float128(ah, al), | |
689 | make_float128(bh, bl), | |
690 | &env->fpu_status); | |
cf97f9ff | 691 | handle_exceptions(env, false, GETPC()); |
9c8be598 AJ |
692 | return float_comp_to_cc(env, cmp); |
693 | } | |
694 | ||
722bfec3 RH |
695 | /* 32-bit FP multiply and add */ |
696 | uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1, | |
697 | uint64_t f2, uint64_t f3) | |
e72ca652 | 698 | { |
722bfec3 | 699 | float32 ret = float32_muladd(f2, f3, f1, 0, &env->fpu_status); |
cf97f9ff | 700 | handle_exceptions(env, false, GETPC()); |
722bfec3 | 701 | return ret; |
e72ca652 BS |
702 | } |
703 | ||
722bfec3 RH |
704 | /* 64-bit FP multiply and add */ |
705 | uint64_t HELPER(madb)(CPUS390XState *env, uint64_t f1, | |
706 | uint64_t f2, uint64_t f3) | |
e72ca652 | 707 | { |
722bfec3 | 708 | float64 ret = float64_muladd(f2, f3, f1, 0, &env->fpu_status); |
cf97f9ff | 709 | handle_exceptions(env, false, GETPC()); |
722bfec3 | 710 | return ret; |
e72ca652 BS |
711 | } |
712 | ||
722bfec3 RH |
713 | /* 32-bit FP multiply and subtract */ |
714 | uint64_t HELPER(mseb)(CPUS390XState *env, uint64_t f1, | |
715 | uint64_t f2, uint64_t f3) | |
e72ca652 | 716 | { |
722bfec3 RH |
717 | float32 ret = float32_muladd(f2, f3, f1, float_muladd_negate_c, |
718 | &env->fpu_status); | |
cf97f9ff | 719 | handle_exceptions(env, false, GETPC()); |
722bfec3 | 720 | return ret; |
e72ca652 BS |
721 | } |
722 | ||
722bfec3 RH |
723 | /* 64-bit FP multiply and subtract */ |
724 | uint64_t HELPER(msdb)(CPUS390XState *env, uint64_t f1, | |
725 | uint64_t f2, uint64_t f3) | |
e72ca652 | 726 | { |
722bfec3 RH |
727 | float64 ret = float64_muladd(f2, f3, f1, float_muladd_negate_c, |
728 | &env->fpu_status); | |
cf97f9ff | 729 | handle_exceptions(env, false, GETPC()); |
722bfec3 | 730 | return ret; |
e72ca652 BS |
731 | } |
732 | ||
fc7cc951 DH |
733 | /* The rightmost bit has the number 11. */ |
734 | static inline uint16_t dcmask(int bit, bool neg) | |
735 | { | |
736 | return 1 << (11 - bit - neg); | |
737 | } | |
738 | ||
739 | #define DEF_FLOAT_DCMASK(_TYPE) \ | |
740 | static uint16_t _TYPE##_dcmask(CPUS390XState *env, _TYPE f1) \ | |
741 | { \ | |
742 | const bool neg = _TYPE##_is_neg(f1); \ | |
743 | \ | |
744 | /* Sorted by most common cases - only one class is possible */ \ | |
745 | if (_TYPE##_is_normal(f1)) { \ | |
746 | return dcmask(2, neg); \ | |
747 | } else if (_TYPE##_is_zero(f1)) { \ | |
748 | return dcmask(0, neg); \ | |
749 | } else if (_TYPE##_is_denormal(f1)) { \ | |
750 | return dcmask(4, neg); \ | |
751 | } else if (_TYPE##_is_infinity(f1)) { \ | |
752 | return dcmask(6, neg); \ | |
753 | } else if (_TYPE##_is_quiet_nan(f1, &env->fpu_status)) { \ | |
754 | return dcmask(8, neg); \ | |
755 | } \ | |
756 | /* signaling nan, as last remaining case */ \ | |
757 | return dcmask(10, neg); \ | |
758 | } | |
759 | DEF_FLOAT_DCMASK(float32) | |
760 | DEF_FLOAT_DCMASK(float64) | |
761 | DEF_FLOAT_DCMASK(float128) | |
762 | ||
e72ca652 | 763 | /* test data class 32-bit */ |
af39bc8c | 764 | uint32_t HELPER(tceb)(CPUS390XState *env, uint64_t f1, uint64_t m2) |
e72ca652 | 765 | { |
fc7cc951 | 766 | return (m2 & float32_dcmask(env, f1)) != 0; |
e72ca652 BS |
767 | } |
768 | ||
769 | /* test data class 64-bit */ | |
af39bc8c | 770 | uint32_t HELPER(tcdb)(CPUS390XState *env, uint64_t v1, uint64_t m2) |
e72ca652 | 771 | { |
fc7cc951 | 772 | return (m2 & float64_dcmask(env, v1)) != 0; |
e72ca652 BS |
773 | } |
774 | ||
775 | /* test data class 128-bit */ | |
fc7cc951 DH |
776 | uint32_t HELPER(tcxb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint64_t m2) |
777 | { | |
778 | return (m2 & float128_dcmask(env, make_float128(ah, al))) != 0; | |
e72ca652 BS |
779 | } |
780 | ||
16d7b2a4 RH |
781 | /* square root 32-bit */ |
782 | uint64_t HELPER(sqeb)(CPUS390XState *env, uint64_t f2) | |
e72ca652 | 783 | { |
16d7b2a4 | 784 | float32 ret = float32_sqrt(f2, &env->fpu_status); |
cf97f9ff | 785 | handle_exceptions(env, false, GETPC()); |
16d7b2a4 RH |
786 | return ret; |
787 | } | |
788 | ||
789 | /* square root 64-bit */ | |
790 | uint64_t HELPER(sqdb)(CPUS390XState *env, uint64_t f2) | |
791 | { | |
792 | float64 ret = float64_sqrt(f2, &env->fpu_status); | |
cf97f9ff | 793 | handle_exceptions(env, false, GETPC()); |
16d7b2a4 RH |
794 | return ret; |
795 | } | |
796 | ||
797 | /* square root 128-bit */ | |
798 | uint64_t HELPER(sqxb)(CPUS390XState *env, uint64_t ah, uint64_t al) | |
799 | { | |
800 | float128 ret = float128_sqrt(make_float128(ah, al), &env->fpu_status); | |
cf97f9ff | 801 | handle_exceptions(env, false, GETPC()); |
16d7b2a4 | 802 | return RET128(ret); |
e72ca652 | 803 | } |
8379bfdb | 804 | |
2aea83c6 | 805 | static const int fpc_to_rnd[8] = { |
411edc22 RH |
806 | float_round_nearest_even, |
807 | float_round_to_zero, | |
808 | float_round_up, | |
2aea83c6 DH |
809 | float_round_down, |
810 | -1, | |
811 | -1, | |
812 | -1, | |
813 | float_round_to_odd, | |
411edc22 RH |
814 | }; |
815 | ||
8379bfdb RH |
816 | /* set fpc */ |
817 | void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) | |
818 | { | |
2aea83c6 DH |
819 | if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || |
820 | (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { | |
821 | s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); | |
822 | } | |
823 | ||
8379bfdb RH |
824 | /* Install everything in the main FPC. */ |
825 | env->fpc = fpc; | |
826 | ||
827 | /* Install the rounding mode in the shadow fpu_status. */ | |
2aea83c6 | 828 | set_float_rounding_mode(fpc_to_rnd[fpc & 0x7], &env->fpu_status); |
411edc22 RH |
829 | } |
830 | ||
831 | /* set fpc and signal */ | |
f66a0ecf | 832 | void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) |
411edc22 RH |
833 | { |
834 | uint32_t signalling = env->fpc; | |
411edc22 RH |
835 | uint32_t s390_exc; |
836 | ||
2aea83c6 DH |
837 | if (fpc_to_rnd[fpc & 0x7] == -1 || fpc & 0x03030088u || |
838 | (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { | |
839 | s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); | |
840 | } | |
841 | ||
f66a0ecf DH |
842 | /* |
843 | * FPC is set to the FPC operand with a bitwise OR of the signalling | |
844 | * flags. | |
845 | */ | |
846 | env->fpc = fpc | (signalling & 0x00ff0000); | |
2aea83c6 | 847 | set_float_rounding_mode(fpc_to_rnd[fpc & 0x7], &env->fpu_status); |
411edc22 | 848 | |
f66a0ecf DH |
849 | /* |
850 | * If any signaling flag is enabled in the new FPC mask, a | |
851 | * simulated-iee-exception exception occurs. | |
852 | */ | |
853 | s390_exc = (signalling >> 16) & (fpc >> 24); | |
411edc22 | 854 | if (s390_exc) { |
8772bbe4 DH |
855 | if (s390_exc & S390_IEEE_MASK_INVALID) { |
856 | s390_exc = S390_IEEE_MASK_INVALID; | |
857 | } else if (s390_exc & S390_IEEE_MASK_DIVBYZERO) { | |
858 | s390_exc = S390_IEEE_MASK_DIVBYZERO; | |
859 | } else if (s390_exc & S390_IEEE_MASK_OVERFLOW) { | |
860 | s390_exc &= (S390_IEEE_MASK_OVERFLOW | S390_IEEE_MASK_INEXACT); | |
861 | } else if (s390_exc & S390_IEEE_MASK_UNDERFLOW) { | |
862 | s390_exc &= (S390_IEEE_MASK_UNDERFLOW | S390_IEEE_MASK_INEXACT); | |
863 | } else if (s390_exc & S390_IEEE_MASK_INEXACT) { | |
864 | s390_exc = S390_IEEE_MASK_INEXACT; | |
865 | } else if (s390_exc & S390_IEEE_MASK_QUANTUM) { | |
866 | s390_exc = S390_IEEE_MASK_QUANTUM; | |
867 | } | |
bbf6ea3b | 868 | tcg_s390_data_exception(env, s390_exc | 3, GETPC()); |
411edc22 | 869 | } |
8379bfdb | 870 | } |
b9c737f5 DH |
871 | |
872 | /* set bfp rounding mode */ | |
873 | void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) | |
874 | { | |
875 | if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] == -1) { | |
876 | s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); | |
877 | } | |
878 | ||
879 | env->fpc = deposit32(env->fpc, 0, 3, rnd); | |
880 | set_float_rounding_mode(fpc_to_rnd[rnd & 0x7], &env->fpu_status); | |
881 | } |