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s390x/cpumodel: mepochptff: warn when no mepoch and re-align group init
[mirror_qemu.git] / target / s390x / gen-features.c
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dced7eec
MM		 1/*
2 * S390 feature list generator
3 *
27e84d4e 4 * Copyright IBM Corp. 2016, 2018
dced7eec
MM		 5 *
6 * Author(s): Michael Mueller <mimu@linux.vnet.ibm.com>
7 * David Hildenbrand <dahi@linux.vnet.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at
10 * your option) any later version. See the COPYING file in the top-level
11 * directory.
dced7eec
MM		 12 */
13
d8e39b70
MA		 14#include <inttypes.h>
15#include <stdio.h>
dced7eec
MM		 16#include "cpu_features_def.h"
17
18#define ARRAY_SIZE(array) (sizeof(array) / sizeof(array[0]))
19
20/***** BEGIN FEATURE DEFS *****/
21
22#define S390_FEAT_GROUP_PLO \
23 S390_FEAT_PLO_CL, \
24 S390_FEAT_PLO_CLG, \
25 S390_FEAT_PLO_CLGR, \
26 S390_FEAT_PLO_CLX, \
27 S390_FEAT_PLO_CS, \
28 S390_FEAT_PLO_CSG, \
29 S390_FEAT_PLO_CSGR, \
30 S390_FEAT_PLO_CSX, \
31 S390_FEAT_PLO_DCS, \
32 S390_FEAT_PLO_DCSG, \
33 S390_FEAT_PLO_DCSGR, \
34 S390_FEAT_PLO_DCSX, \
35 S390_FEAT_PLO_CSST, \
36 S390_FEAT_PLO_CSSTG, \
37 S390_FEAT_PLO_CSSTGR, \
38 S390_FEAT_PLO_CSSTX, \
39 S390_FEAT_PLO_CSDST, \
40 S390_FEAT_PLO_CSDSTG, \
41 S390_FEAT_PLO_CSDSTGR, \
42 S390_FEAT_PLO_CSDSTX, \
43 S390_FEAT_PLO_CSTST, \
44 S390_FEAT_PLO_CSTSTG, \
45 S390_FEAT_PLO_CSTSTGR, \
46 S390_FEAT_PLO_CSTSTX
47
48#define S390_FEAT_GROUP_TOD_CLOCK_STEERING \
49 S390_FEAT_TOD_CLOCK_STEERING, \
50 S390_FEAT_PTFF_QTO, \
51 S390_FEAT_PTFF_QSI, \
52 S390_FEAT_PTFF_QPT, \
53 S390_FEAT_PTFF_STO
54
55#define S390_FEAT_GROUP_GEN13_PTFF \
56 S390_FEAT_PTFF_QUI, \
57 S390_FEAT_PTFF_QTOU, \
58 S390_FEAT_PTFF_STOU
59
46a99c9f
DH		 60#define S390_FEAT_GROUP_MULTIPLE_EPOCH_PTFF \
61 S390_FEAT_PTFF_QSIE, \
62 S390_FEAT_PTFF_QTOUE, \
63 S390_FEAT_PTFF_STOE, \
64 S390_FEAT_PTFF_STOUE
65
dced7eec
MM		 66#define S390_FEAT_GROUP_MSA \
67 S390_FEAT_MSA, \
68 S390_FEAT_KMAC_DEA, \
69 S390_FEAT_KMAC_TDEA_128, \
70 S390_FEAT_KMAC_TDEA_192, \
71 S390_FEAT_KMC_DEA, \
72 S390_FEAT_KMC_TDEA_128, \
73 S390_FEAT_KMC_TDEA_192, \
74 S390_FEAT_KM_DEA, \
75 S390_FEAT_KM_TDEA_128, \
76 S390_FEAT_KM_TDEA_192, \
77 S390_FEAT_KIMD_SHA_1, \
78 S390_FEAT_KLMD_SHA_1
79
80#define S390_FEAT_GROUP_MSA_EXT_1 \
81 S390_FEAT_KMC_AES_128, \
82 S390_FEAT_KM_AES_128, \
83 S390_FEAT_KIMD_SHA_256, \
84 S390_FEAT_KLMD_SHA_256
85
86#define S390_FEAT_GROUP_MSA_EXT_2 \
87 S390_FEAT_KMC_AES_192, \
88 S390_FEAT_KMC_AES_256, \
89 S390_FEAT_KMC_PRNG, \
90 S390_FEAT_KM_AES_192, \
91 S390_FEAT_KM_AES_256, \
92 S390_FEAT_KIMD_SHA_512, \
93 S390_FEAT_KLMD_SHA_512
94
95#define S390_FEAT_GROUP_MSA_EXT_3 \
96 S390_FEAT_MSA_EXT_3, \
97 S390_FEAT_KMAC_EDEA, \
98 S390_FEAT_KMAC_ETDEA_128, \
99 S390_FEAT_KMAC_ETDEA_192, \
100 S390_FEAT_KMC_EAES_128, \
101 S390_FEAT_KMC_EAES_192, \
102 S390_FEAT_KMC_EAES_256, \
103 S390_FEAT_KMC_EDEA, \
104 S390_FEAT_KMC_ETDEA_128, \
105 S390_FEAT_KMC_ETDEA_192, \
106 S390_FEAT_KM_EDEA, \
107 S390_FEAT_KM_ETDEA_128, \
108 S390_FEAT_KM_ETDEA_192, \
109 S390_FEAT_KM_EAES_128, \
110 S390_FEAT_KM_EAES_192, \
111 S390_FEAT_KM_EAES_256, \
112 S390_FEAT_PCKMO_EDEA, \
113 S390_FEAT_PCKMO_ETDEA_128, \
114 S390_FEAT_PCKMO_ETDEA_256, \
115 S390_FEAT_PCKMO_AES_128, \
116 S390_FEAT_PCKMO_AES_192, \
117 S390_FEAT_PCKMO_AES_256
118
119#define S390_FEAT_GROUP_MSA_EXT_4 \
120 S390_FEAT_MSA_EXT_4, \
121 S390_FEAT_KMAC_AES_128, \
122 S390_FEAT_KMAC_AES_192, \
123 S390_FEAT_KMAC_AES_256, \
124 S390_FEAT_KMAC_EAES_128, \
125 S390_FEAT_KMAC_EAES_192, \
126 S390_FEAT_KMAC_EAES_256, \
127 S390_FEAT_KM_XTS_AES_128, \
128 S390_FEAT_KM_XTS_AES_256, \
129 S390_FEAT_KM_XTS_EAES_128, \
130 S390_FEAT_KM_XTS_EAES_256, \
131 S390_FEAT_KIMD_GHASH, \
132 S390_FEAT_KMCTR_DEA, \
133 S390_FEAT_KMCTR_TDEA_128, \
134 S390_FEAT_KMCTR_TDEA_192, \
135 S390_FEAT_KMCTR_EDEA, \
136 S390_FEAT_KMCTR_ETDEA_128, \
137 S390_FEAT_KMCTR_ETDEA_192, \
138 S390_FEAT_KMCTR_AES_128, \
139 S390_FEAT_KMCTR_AES_192, \
140 S390_FEAT_KMCTR_AES_256, \
141 S390_FEAT_KMCTR_EAES_128, \
142 S390_FEAT_KMCTR_EAES_192, \
143 S390_FEAT_KMCTR_EAES_256, \
144 S390_FEAT_KMF_DEA, \
145 S390_FEAT_KMF_TDEA_128, \
146 S390_FEAT_KMF_TDEA_192, \
147 S390_FEAT_KMF_EDEA, \
148 S390_FEAT_KMF_ETDEA_128, \
149 S390_FEAT_KMF_ETDEA_192, \
150 S390_FEAT_KMF_AES_128, \
151 S390_FEAT_KMF_AES_192, \
152 S390_FEAT_KMF_AES_256, \
153 S390_FEAT_KMF_EAES_128, \
154 S390_FEAT_KMF_EAES_192, \
155 S390_FEAT_KMF_EAES_256, \
156 S390_FEAT_KMO_DEA, \
157 S390_FEAT_KMO_TDEA_128, \
158 S390_FEAT_KMO_TDEA_192, \
159 S390_FEAT_KMO_EDEA, \
160 S390_FEAT_KMO_ETDEA_128, \
161 S390_FEAT_KMO_ETDEA_192, \
162 S390_FEAT_KMO_AES_128, \
163 S390_FEAT_KMO_AES_192, \
164 S390_FEAT_KMO_AES_256, \
165 S390_FEAT_KMO_EAES_128, \
166 S390_FEAT_KMO_EAES_192, \
167 S390_FEAT_KMO_EAES_256, \
168 S390_FEAT_PCC_CMAC_DEA, \
169 S390_FEAT_PCC_CMAC_TDEA_128, \
170 S390_FEAT_PCC_CMAC_TDEA_192, \
171 S390_FEAT_PCC_CMAC_ETDEA_128, \
172 S390_FEAT_PCC_CMAC_ETDEA_192, \
173 S390_FEAT_PCC_CMAC_TDEA, \
174 S390_FEAT_PCC_CMAC_AES_128, \
175 S390_FEAT_PCC_CMAC_AES_192, \
176 S390_FEAT_PCC_CMAC_AES_256, \
177 S390_FEAT_PCC_CMAC_EAES_128, \
178 S390_FEAT_PCC_CMAC_EAES_192, \
179 S390_FEAT_PCC_CMAC_EAES_256, \
180 S390_FEAT_PCC_XTS_AES_128, \
181 S390_FEAT_PCC_XTS_AES_256, \
182 S390_FEAT_PCC_XTS_EAES_128, \
183 S390_FEAT_PCC_XTS_EAES_256
184
185#define S390_FEAT_GROUP_MSA_EXT_5 \
186 S390_FEAT_MSA_EXT_5, \
187 S390_FEAT_PPNO_SHA_512_DRNG
188
6da5c593
JH		 189#define S390_FEAT_GROUP_MSA_EXT_6 \
190 S390_FEAT_KIMD_SHA3_224, \
191 S390_FEAT_KIMD_SHA3_256, \
192 S390_FEAT_KIMD_SHA3_384, \
193 S390_FEAT_KIMD_SHA3_512, \
194 S390_FEAT_KIMD_SHAKE_128, \
195 S390_FEAT_KIMD_SHAKE_256, \
196 S390_FEAT_KLMD_SHA3_224, \
197 S390_FEAT_KLMD_SHA3_256, \
198 S390_FEAT_KLMD_SHA3_384, \
199 S390_FEAT_KLMD_SHA3_512, \
200 S390_FEAT_KLMD_SHAKE_128, \
201 S390_FEAT_KLMD_SHAKE_256
202
203#define S390_FEAT_GROUP_MSA_EXT_7 \
204 S390_FEAT_PRNO_TRNG_QRTCR, \
205 S390_FEAT_PRNO_TRNG
206
207#define S390_FEAT_GROUP_MSA_EXT_8 \
208 S390_FEAT_MSA_EXT_8, \
209 S390_FEAT_KMA_GCM_AES_128, \
210 S390_FEAT_KMA_GCM_AES_192, \
211 S390_FEAT_KMA_GCM_AES_256 , \
212 S390_FEAT_KMA_GCM_EAES_128, \
213 S390_FEAT_KMA_GCM_EAES_192, \
214 S390_FEAT_KMA_GCM_EAES_256
215
90229ebb
DH		 216/* cpu feature groups */
217static uint16_t group_PLO[] = {
218 S390_FEAT_GROUP_PLO,
219};
220static uint16_t group_TOD_CLOCK_STEERING[] = {
221 S390_FEAT_GROUP_TOD_CLOCK_STEERING,
222};
223static uint16_t group_GEN13_PTFF[] = {
224 S390_FEAT_GROUP_GEN13_PTFF,
225};
46a99c9f
DH		 226static uint16_t group_MULTIPLE_EPOCH_PTFF[] = {
227 S390_FEAT_GROUP_MULTIPLE_EPOCH_PTFF,
228};
90229ebb
DH		 229static uint16_t group_MSA[] = {
230 S390_FEAT_GROUP_MSA,
231};
232static uint16_t group_MSA_EXT_1[] = {
233 S390_FEAT_GROUP_MSA_EXT_1,
234};
235static uint16_t group_MSA_EXT_2[] = {
236 S390_FEAT_GROUP_MSA_EXT_2,
237};
238static uint16_t group_MSA_EXT_3[] = {
239 S390_FEAT_GROUP_MSA_EXT_3,
240};
241static uint16_t group_MSA_EXT_4[] = {
242 S390_FEAT_GROUP_MSA_EXT_4,
243};
244static uint16_t group_MSA_EXT_5[] = {
245 S390_FEAT_GROUP_MSA_EXT_5,
246};
6da5c593
JH		 247static uint16_t group_MSA_EXT_6[] = {
248 S390_FEAT_GROUP_MSA_EXT_6,
249};
250static uint16_t group_MSA_EXT_7[] = {
251 S390_FEAT_GROUP_MSA_EXT_7,
252};
253static uint16_t group_MSA_EXT_8[] = {
254 S390_FEAT_GROUP_MSA_EXT_8,
255};
90229ebb 256
ec3aadb1
JH		 257/* Base features (in order of release)
258 * Only non-hypervisor managed features belong here.
259 * Base feature sets are static meaning they do not change in future QEMU
260 * releases.
261 */
dced7eec
MM		 262static uint16_t base_GEN7_GA1[] = {
263 S390_FEAT_GROUP_PLO,
264 S390_FEAT_ESAN3,
265 S390_FEAT_ZARCH,
266};
ec3aadb1 267
dced7eec
MM		 268#define base_GEN7_GA2 EmptyFeat
269#define base_GEN7_GA3 EmptyFeat
ec3aadb1 270
dced7eec
MM		 271static uint16_t base_GEN8_GA1[] = {
272 S390_FEAT_DAT_ENH,
273 S390_FEAT_EXTENDED_TRANSLATION_2,
274 S390_FEAT_GROUP_MSA,
275 S390_FEAT_LONG_DISPLACEMENT,
276 S390_FEAT_LONG_DISPLACEMENT_FAST,
277 S390_FEAT_HFP_MADDSUB,
278};
ec3aadb1 279
dced7eec
MM		 280#define base_GEN8_GA2 EmptyFeat
281#define base_GEN8_GA3 EmptyFeat
282#define base_GEN8_GA4 EmptyFeat
283#define base_GEN8_GA5 EmptyFeat
ec3aadb1 284
dced7eec
MM		 285static uint16_t base_GEN9_GA1[] = {
286 S390_FEAT_IDTE_SEGMENT,
287 S390_FEAT_ASN_LX_REUSE,
288 S390_FEAT_STFLE,
289 S390_FEAT_SENSE_RUNNING_STATUS,
290 S390_FEAT_EXTENDED_IMMEDIATE,
291 S390_FEAT_EXTENDED_TRANSLATION_3,
292 S390_FEAT_HFP_UNNORMALIZED_EXT,
293 S390_FEAT_ETF2_ENH,
294 S390_FEAT_STORE_CLOCK_FAST,
295 S390_FEAT_GROUP_TOD_CLOCK_STEERING,
296 S390_FEAT_ETF3_ENH,
297 S390_FEAT_DAT_ENH_2,
298};
ec3aadb1 299
dced7eec
MM		 300#define base_GEN9_GA2 EmptyFeat
301#define base_GEN9_GA3 EmptyFeat
ec3aadb1 302
dced7eec
MM		 303static uint16_t base_GEN10_GA1[] = {
304 S390_FEAT_CONDITIONAL_SSKE,
305 S390_FEAT_PARSING_ENH,
306 S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
307 S390_FEAT_EXTRACT_CPU_TIME,
308 S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
309 S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2,
310 S390_FEAT_GENERAL_INSTRUCTIONS_EXT,
311 S390_FEAT_EXECUTE_EXT,
312 S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,
313 S390_FEAT_DFP,
314 S390_FEAT_DFP_FAST,
315 S390_FEAT_PFPO,
316};
317#define base_GEN10_GA2 EmptyFeat
318#define base_GEN10_GA3 EmptyFeat
ec3aadb1 319
dced7eec
MM		 320static uint16_t base_GEN11_GA1[] = {
321 S390_FEAT_NONQ_KEY_SETTING,
322 S390_FEAT_ENHANCED_MONITOR,
323 S390_FEAT_FLOATING_POINT_EXT,
324 S390_FEAT_SET_PROGRAM_PARAMETERS,
325 S390_FEAT_STFLE_45,
326 S390_FEAT_CMPSC_ENH,
327 S390_FEAT_INTERLOCKED_ACCESS_2,
328};
ec3aadb1 329
dced7eec 330#define base_GEN11_GA2 EmptyFeat
ec3aadb1 331
dced7eec
MM		 332static uint16_t base_GEN12_GA1[] = {
333 S390_FEAT_DFP_ZONED_CONVERSION,
334 S390_FEAT_STFLE_49,
335 S390_FEAT_LOCAL_TLB_CLEARING,
336};
ec3aadb1 337
dced7eec 338#define base_GEN12_GA2 EmptyFeat
ec3aadb1 339
dced7eec
MM		 340static uint16_t base_GEN13_GA1[] = {
341 S390_FEAT_STFLE_53,
342 S390_FEAT_DFP_PACKED_CONVERSION,
343 S390_FEAT_GROUP_GEN13_PTFF,
344};
ec3aadb1 345
dced7eec
MM		 346#define base_GEN13_GA2 EmptyFeat
347
cc28a594
JH		 348static uint16_t base_GEN14_GA1[] = {
349 S390_FEAT_ENTROPY_ENC_COMP,
350 S390_FEAT_MISC_INSTRUCTION_EXT,
351 S390_FEAT_SEMAPHORE_ASSIST,
352 S390_FEAT_TIME_SLICE_INSTRUMENTATION,
353 S390_FEAT_ORDER_PRESERVING_COMPRESSION,
354};
355
ec3aadb1
JH		 356/* Full features (in order of release)
357 * Automatically includes corresponding base features.
358 * Full features are all features this hardware supports even if kvm/QEMU do not
359 * support these features yet.
360 */
dced7eec 361static uint16_t full_GEN7_GA1[] = {
9f0d13f4 362 S390_FEAT_PPA15,
b073c875 363 S390_FEAT_BPB,
dced7eec
MM		 364 S390_FEAT_SIE_F2,
365 S390_FEAT_SIE_SKEY,
366 S390_FEAT_SIE_GPERE,
367 S390_FEAT_SIE_IB,
368 S390_FEAT_SIE_CEI,
369};
ec3aadb1 370
dced7eec
MM		 371static uint16_t full_GEN7_GA2[] = {
372 S390_FEAT_EXTENDED_TRANSLATION_2,
373};
ec3aadb1 374
dced7eec
MM		 375static uint16_t full_GEN7_GA3[] = {
376 S390_FEAT_LONG_DISPLACEMENT,
377 S390_FEAT_SIE_SIIF,
378};
ec3aadb1 379
dced7eec
MM		 380static uint16_t full_GEN8_GA1[] = {
381 S390_FEAT_SIE_GSLS,
382 S390_FEAT_SIE_64BSCAO,
383};
ec3aadb1 384
dced7eec 385#define full_GEN8_GA2 EmptyFeat
ec3aadb1 386
dced7eec
MM		 387static uint16_t full_GEN8_GA3[] = {
388 S390_FEAT_ASN_LX_REUSE,
389 S390_FEAT_EXTENDED_TRANSLATION_3,
390};
ec3aadb1 391
dced7eec
MM		 392#define full_GEN8_GA4 EmptyFeat
393#define full_GEN8_GA5 EmptyFeat
ec3aadb1 394
dced7eec
MM		 395static uint16_t full_GEN9_GA1[] = {
396 S390_FEAT_STORE_HYPERVISOR_INFO,
397 S390_FEAT_GROUP_MSA_EXT_1,
398 S390_FEAT_CMM,
399 S390_FEAT_SIE_CMMA,
400};
ec3aadb1 401
dced7eec
MM		 402static uint16_t full_GEN9_GA2[] = {
403 S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
404 S390_FEAT_EXTRACT_CPU_TIME,
405 S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
406 S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,
407 S390_FEAT_DFP,
408};
ec3aadb1 409
dced7eec
MM		 410static uint16_t full_GEN9_GA3[] = {
411 S390_FEAT_CONDITIONAL_SSKE,
412 S390_FEAT_PFPO,
413};
ec3aadb1 414
dced7eec
MM		 415static uint16_t full_GEN10_GA1[] = {
416 S390_FEAT_EDAT,
417 S390_FEAT_CONFIGURATION_TOPOLOGY,
418 S390_FEAT_GROUP_MSA_EXT_2,
419 S390_FEAT_ESOP,
420 S390_FEAT_SIE_PFMFI,
421 S390_FEAT_SIE_SIGPIF,
422};
ec3aadb1 423
dced7eec
MM		 424static uint16_t full_GEN10_GA2[] = {
425 S390_FEAT_SET_PROGRAM_PARAMETERS,
426 S390_FEAT_SIE_IBS,
427};
ec3aadb1 428
dced7eec
MM		 429static uint16_t full_GEN10_GA3[] = {
430 S390_FEAT_GROUP_MSA_EXT_3,
431};
ec3aadb1 432
dced7eec
MM		 433static uint16_t full_GEN11_GA1[] = {
434 S390_FEAT_IPTE_RANGE,
435 S390_FEAT_ACCESS_EXCEPTION_FS_INDICATION,
436 S390_FEAT_GROUP_MSA_EXT_4,
437};
ec3aadb1 438
dced7eec 439#define full_GEN11_GA2 EmptyFeat
ec3aadb1 440
dced7eec
MM		 441static uint16_t full_GEN12_GA1[] = {
442 S390_FEAT_CONSTRAINT_TRANSACTIONAL_EXE,
443 S390_FEAT_TRANSACTIONAL_EXE,
444 S390_FEAT_RUNTIME_INSTRUMENTATION,
3b00f702
YMZ		 445 S390_FEAT_ZPCI,
446 S390_FEAT_ADAPTER_EVENT_NOTIFICATION,
447 S390_FEAT_ADAPTER_INT_SUPPRESSION,
dced7eec 448 S390_FEAT_EDAT_2,
7223bcce 449 S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2,
c5cd17af
TK		 450 S390_FEAT_AP_QUERY_CONFIG_INFO,
451 S390_FEAT_AP_FACILITIES_TEST,
452 S390_FEAT_AP,
dced7eec 453};
ec3aadb1 454
dced7eec
MM		 455static uint16_t full_GEN12_GA2[] = {
456 S390_FEAT_GROUP_MSA_EXT_5,
457};
ec3aadb1 458
dced7eec
MM		 459static uint16_t full_GEN13_GA1[] = {
460 S390_FEAT_VECTOR,
461};
ec3aadb1 462
dced7eec
MM		 463#define full_GEN13_GA2 EmptyFeat
464
cc28a594
JH		 465static uint16_t full_GEN14_GA1[] = {
466 S390_FEAT_INSTRUCTION_EXEC_PROT,
467 S390_FEAT_GUARDED_STORAGE,
468 S390_FEAT_VECTOR_PACKED_DECIMAL,
469 S390_FEAT_VECTOR_ENH,
470 S390_FEAT_MULTIPLE_EPOCH,
471 S390_FEAT_TEST_PENDING_EXT_INTERRUPTION,
472 S390_FEAT_INSERT_REFERENCE_BITS_MULT,
473 S390_FEAT_GROUP_MSA_EXT_6,
474 S390_FEAT_GROUP_MSA_EXT_7,
475 S390_FEAT_GROUP_MSA_EXT_8,
476 S390_FEAT_CMM_NT,
27e84d4e 477 S390_FEAT_ETOKEN,
cc28a594
JH		 478 S390_FEAT_HPMA2,
479 S390_FEAT_SIE_KSS,
46a99c9f 480 S390_FEAT_GROUP_MULTIPLE_EPOCH_PTFF,
cc28a594
JH		 481};
482
ec3aadb1
JH		 483/* Default features (in order of release)
484 * Automatically includes corresponding base features.
485 * Default features are all features this version of QEMU supports for this
486 * hardware model. Default feature sets can grow with new QEMU releases.
487 */
dced7eec
MM		 488#define default_GEN7_GA1 EmptyFeat
489#define default_GEN7_GA2 EmptyFeat
490#define default_GEN7_GA3 EmptyFeat
491#define default_GEN8_GA1 EmptyFeat
492#define default_GEN8_GA2 EmptyFeat
493#define default_GEN8_GA3 EmptyFeat
494#define default_GEN8_GA4 EmptyFeat
495#define default_GEN8_GA5 EmptyFeat
ec3aadb1 496
dced7eec
MM		 497static uint16_t default_GEN9_GA1[] = {
498 S390_FEAT_STORE_HYPERVISOR_INFO,
499 S390_FEAT_GROUP_MSA_EXT_1,
07059eff 500 S390_FEAT_CMM,
dced7eec 501};
ec3aadb1 502
dced7eec
MM		 503#define default_GEN9_GA2 EmptyFeat
504#define default_GEN9_GA3 EmptyFeat
ec3aadb1 505
dced7eec
MM		 506static uint16_t default_GEN10_GA1[] = {
507 S390_FEAT_EDAT,
508 S390_FEAT_GROUP_MSA_EXT_2,
509};
ec3aadb1 510
dced7eec
MM		 511#define default_GEN10_GA2 EmptyFeat
512#define default_GEN10_GA3 EmptyFeat
ec3aadb1 513
dced7eec
MM		 514static uint16_t default_GEN11_GA1[] = {
515 S390_FEAT_GROUP_MSA_EXT_3,
516 S390_FEAT_IPTE_RANGE,
517 S390_FEAT_ACCESS_EXCEPTION_FS_INDICATION,
518 S390_FEAT_GROUP_MSA_EXT_4,
87273151
CB		 519 S390_FEAT_PPA15,
520 S390_FEAT_BPB,
dced7eec 521};
ec3aadb1 522
dced7eec 523#define default_GEN11_GA2 EmptyFeat
ec3aadb1 524
dced7eec
MM		 525static uint16_t default_GEN12_GA1[] = {
526 S390_FEAT_CONSTRAINT_TRANSACTIONAL_EXE,
527 S390_FEAT_TRANSACTIONAL_EXE,
528 S390_FEAT_RUNTIME_INSTRUMENTATION,
3b00f702
YMZ		 529 S390_FEAT_ZPCI,
530 S390_FEAT_ADAPTER_EVENT_NOTIFICATION,
dced7eec 531 S390_FEAT_EDAT_2,
7223bcce
JH		 532 S390_FEAT_ESOP,
533 S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2,
dced7eec 534};
ec3aadb1 535
dced7eec 536#define default_GEN12_GA2 EmptyFeat
ec3aadb1 537
dced7eec
MM		 538static uint16_t default_GEN13_GA1[] = {
539 S390_FEAT_GROUP_MSA_EXT_5,
540 S390_FEAT_VECTOR,
541};
ec3aadb1 542
dced7eec
MM		 543#define default_GEN13_GA2 EmptyFeat
544
cc28a594 545static uint16_t default_GEN14_GA1[] = {
cc28a594
JH		 546 S390_FEAT_INSTRUCTION_EXEC_PROT,
547 S390_FEAT_GUARDED_STORAGE,
548 S390_FEAT_VECTOR_PACKED_DECIMAL,
549 S390_FEAT_VECTOR_ENH,
550 S390_FEAT_GROUP_MSA_EXT_6,
551 S390_FEAT_GROUP_MSA_EXT_7,
552 S390_FEAT_GROUP_MSA_EXT_8,
cc28a594
JH		 553};
554
35b4df64
DH		 555/* QEMU (CPU model) features */
556
557static uint16_t qemu_V2_11[] = {
558 S390_FEAT_GROUP_PLO,
559 S390_FEAT_ESAN3,
560 S390_FEAT_ZARCH,
561};
562
d646b16b 563static uint16_t qemu_V3_1[] = {
35b4df64
DH		 564 S390_FEAT_DAT_ENH,
565 S390_FEAT_IDTE_SEGMENT,
566 S390_FEAT_STFLE,
567 S390_FEAT_SENSE_RUNNING_STATUS,
568 S390_FEAT_EXTENDED_TRANSLATION_2,
569 S390_FEAT_MSA,
570 S390_FEAT_LONG_DISPLACEMENT,
571 S390_FEAT_LONG_DISPLACEMENT_FAST,
572 S390_FEAT_EXTENDED_IMMEDIATE,
573 S390_FEAT_EXTENDED_TRANSLATION_3,
574 S390_FEAT_ETF2_ENH,
575 S390_FEAT_STORE_CLOCK_FAST,
576 S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
577 S390_FEAT_ETF3_ENH,
578 S390_FEAT_EXTRACT_CPU_TIME,
579 S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
580 S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2,
581 S390_FEAT_GENERAL_INSTRUCTIONS_EXT,
582 S390_FEAT_EXECUTE_EXT,
583 S390_FEAT_SET_PROGRAM_PARAMETERS,
584 S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,
585 S390_FEAT_STFLE_45,
586 S390_FEAT_STFLE_49,
587 S390_FEAT_LOCAL_TLB_CLEARING,
588 S390_FEAT_INTERLOCKED_ACCESS_2,
e3fd586d
CH		 589 S390_FEAT_ADAPTER_EVENT_NOTIFICATION,
590 S390_FEAT_ADAPTER_INT_SUPPRESSION,
35b4df64 591 S390_FEAT_MSA_EXT_3,
e3fd586d 592 S390_FEAT_MSA_EXT_4,
35b4df64
DH		 593};
594
d646b16b
DH		 595static uint16_t qemu_LATEST[] = {
596 S390_FEAT_ZPCI,
597};
598
35b4df64
DH		 599/* add all new definitions before this point */
600static uint16_t qemu_MAX[] = {
601 /* z13+ features */
602 S390_FEAT_STFLE_53,
603 /* generates a dependency warning, leave it out for now */
604 S390_FEAT_MSA_EXT_5,
605};
606
dced7eec
MM		 607/****** END FEATURE DEFS ******/
608
609#define _YEARS "2016"
610#define _NAME_H "TARGET_S390X_GEN_FEATURES_H"
611
612#define CPU_FEAT_INITIALIZER(_name) \
613 { \
614 .name = "S390_FEAT_LIST_" #_name, \
615 .base_bits = \
616 { .data = base_##_name, \
617 .len = ARRAY_SIZE(base_##_name) }, \
618 .default_bits = \
619 { .data = default_##_name, \
620 .len = ARRAY_SIZE(default_##_name) }, \
621 .full_bits = \
622 { .data = full_##_name, \
623 .len = ARRAY_SIZE(full_##_name) }, \
624 }
625
626typedef struct BitSpec {
627 uint16_t *data;
628 uint32_t len;
629} BitSpec;
630
631typedef struct {
632 const char *name;
633 BitSpec base_bits;
634 BitSpec default_bits;
635 BitSpec full_bits;
636} CpuFeatDefSpec;
637
638static uint16_t EmptyFeat[] = {};
639
640/*******************************
641 * processor GA series
642 *******************************/
643static CpuFeatDefSpec CpuFeatDef[] = {
644 CPU_FEAT_INITIALIZER(GEN7_GA1),
645 CPU_FEAT_INITIALIZER(GEN7_GA2),
646 CPU_FEAT_INITIALIZER(GEN7_GA3),
647 CPU_FEAT_INITIALIZER(GEN8_GA1),
648 CPU_FEAT_INITIALIZER(GEN8_GA2),
649 CPU_FEAT_INITIALIZER(GEN8_GA3),
650 CPU_FEAT_INITIALIZER(GEN8_GA4),
651 CPU_FEAT_INITIALIZER(GEN8_GA5),
652 CPU_FEAT_INITIALIZER(GEN9_GA1),
653 CPU_FEAT_INITIALIZER(GEN9_GA2),
654 CPU_FEAT_INITIALIZER(GEN9_GA3),
655 CPU_FEAT_INITIALIZER(GEN10_GA1),
656 CPU_FEAT_INITIALIZER(GEN10_GA2),
657 CPU_FEAT_INITIALIZER(GEN10_GA3),
658 CPU_FEAT_INITIALIZER(GEN11_GA1),
659 CPU_FEAT_INITIALIZER(GEN11_GA2),
660 CPU_FEAT_INITIALIZER(GEN12_GA1),
661 CPU_FEAT_INITIALIZER(GEN12_GA2),
662 CPU_FEAT_INITIALIZER(GEN13_GA1),
663 CPU_FEAT_INITIALIZER(GEN13_GA2),
cc28a594 664 CPU_FEAT_INITIALIZER(GEN14_GA1),
dced7eec
MM		 665};
666
90229ebb
DH		 667#define FEAT_GROUP_INITIALIZER(_name) \
668 { \
669 .name = "S390_FEAT_GROUP_LIST_" #_name, \
a5f9ecc4 670 .enum_name = "S390_FEAT_GROUP_" #_name, \
90229ebb
DH		 671 .bits = \
672 { .data = group_##_name, \
673 .len = ARRAY_SIZE(group_##_name) }, \
674 }
675
676typedef struct {
677 const char *name;
a5f9ecc4 678 const char *enum_name;
90229ebb
DH		 679 BitSpec bits;
680} FeatGroupDefSpec;
681
682/*******************************
683 * feature groups
684 *******************************/
685static FeatGroupDefSpec FeatGroupDef[] = {
686 FEAT_GROUP_INITIALIZER(PLO),
687 FEAT_GROUP_INITIALIZER(TOD_CLOCK_STEERING),
688 FEAT_GROUP_INITIALIZER(GEN13_PTFF),
689 FEAT_GROUP_INITIALIZER(MSA),
690 FEAT_GROUP_INITIALIZER(MSA_EXT_1),
691 FEAT_GROUP_INITIALIZER(MSA_EXT_2),
692 FEAT_GROUP_INITIALIZER(MSA_EXT_3),
693 FEAT_GROUP_INITIALIZER(MSA_EXT_4),
694 FEAT_GROUP_INITIALIZER(MSA_EXT_5),
6da5c593
JH		 695 FEAT_GROUP_INITIALIZER(MSA_EXT_6),
696 FEAT_GROUP_INITIALIZER(MSA_EXT_7),
697 FEAT_GROUP_INITIALIZER(MSA_EXT_8),
a5f9ecc4 698 FEAT_GROUP_INITIALIZER(MULTIPLE_EPOCH_PTFF),
90229ebb
DH		 699};
700
35b4df64
DH		 701#define QEMU_FEAT_INITIALIZER(_name) \
702 { \
703 .name = "S390_FEAT_LIST_QEMU_" #_name, \
704 .bits = \
705 { .data = qemu_##_name, \
706 .len = ARRAY_SIZE(qemu_##_name) }, \
707 }
708
709/*******************************
710 * QEMU (CPU model) features
711 *******************************/
712static FeatGroupDefSpec QemuFeatDef[] = {
713 QEMU_FEAT_INITIALIZER(V2_11),
d646b16b 714 QEMU_FEAT_INITIALIZER(V3_1),
35b4df64
DH		 715 QEMU_FEAT_INITIALIZER(LATEST),
716 QEMU_FEAT_INITIALIZER(MAX),
717};
718
719
dced7eec
MM		 720static void set_bits(uint64_t list[], BitSpec bits)
721{
722 uint32_t i;
723
724 for (i = 0; i < bits.len; i++) {
725 list[bits.data[i] / 64] |= 1ULL << (bits.data[i] % 64);
726 }
727}
728
729static void print_feature_defs(void)
730{
731 uint64_t base_feat[S390_FEAT_MAX / 64 + 1] = {};
732 uint64_t default_feat[S390_FEAT_MAX / 64 + 1] = {};
733 uint64_t full_feat[S390_FEAT_MAX / 64 + 1] = {};
734 int i, j;
735
736 printf("\n/* CPU model feature list data */\n");
737
738 for (i = 0; i < ARRAY_SIZE(CpuFeatDef); i++) {
739 set_bits(base_feat, CpuFeatDef[i].base_bits);
740 /* add the base to the default features */
741 set_bits(default_feat, CpuFeatDef[i].base_bits);
742 set_bits(default_feat, CpuFeatDef[i].default_bits);
743 /* add the base to the full features */
744 set_bits(full_feat, CpuFeatDef[i].base_bits);
745 set_bits(full_feat, CpuFeatDef[i].full_bits);
746
747 printf("#define %s_BASE\t", CpuFeatDef[i].name);
748 for (j = 0; j < ARRAY_SIZE(base_feat); j++) {
749 printf("0x%016"PRIx64"ULL", base_feat[j]);
750 if (j < ARRAY_SIZE(base_feat) - 1) {
751 printf(",");
752 } else {
753 printf("\n");
754 }
755 }
756 printf("#define %s_DEFAULT\t", CpuFeatDef[i].name);
757 for (j = 0; j < ARRAY_SIZE(default_feat); j++) {
758 printf("0x%016"PRIx64"ULL", default_feat[j]);
759 if (j < ARRAY_SIZE(default_feat) - 1) {
760 printf(",");
761 } else {
762 printf("\n");
763 }
764 }
765 printf("#define %s_FULL\t\t", CpuFeatDef[i].name);
766 for (j = 0; j < ARRAY_SIZE(full_feat); j++) {
767 printf("0x%016"PRIx64"ULL", full_feat[j]);
768 if (j < ARRAY_SIZE(full_feat) - 1) {
769 printf(",");
770 } else {
771 printf("\n");
772 }
773 }
774 }
775}
776
35b4df64
DH		 777static void print_qemu_feature_defs(void)
778{
779 uint64_t feat[S390_FEAT_MAX / 64 + 1] = {};
780 int i, j;
781
782 printf("\n/* QEMU (CPU model) feature list data */\n");
783
784 /* for now we assume that we only add new features */
785 for (i = 0; i < ARRAY_SIZE(QemuFeatDef); i++) {
786 set_bits(feat, QemuFeatDef[i].bits);
787
788 printf("#define %s\t", QemuFeatDef[i].name);
789 for (j = 0; j < ARRAY_SIZE(feat); j++) {
790 printf("0x%016"PRIx64"ULL", feat[j]);
791 if (j < ARRAY_SIZE(feat) - 1) {
792 printf(",");
793 } else {
794 printf("\n");
795 }
796 }
797 }
798}
799
90229ebb
DH		 800static void print_feature_group_defs(void)
801{
802 int i, j;
803
804 printf("\n/* CPU feature group list data */\n");
805
806 for (i = 0; i < ARRAY_SIZE(FeatGroupDef); i++) {
807 uint64_t feat[S390_FEAT_MAX / 64 + 1] = {};
808
809 set_bits(feat, FeatGroupDef[i].bits);
810 printf("#define %s\t", FeatGroupDef[i].name);
811 for (j = 0; j < ARRAY_SIZE(feat); j++) {
812 printf("0x%016"PRIx64"ULL", feat[j]);
813 if (j < ARRAY_SIZE(feat) - 1) {
814 printf(",");
815 } else {
816 printf("\n");
817 }
818 }
819 }
820}
821
a5f9ecc4
MM		 822static void print_feature_group_enum_type(void)
823{
824 int i;
825
826 printf("\n/* CPU feature group enum type */\n"
827 "typedef enum {\n");
828 for (i = 0; i < ARRAY_SIZE(FeatGroupDef); i++) {
829 printf("\t%s,\n", FeatGroupDef[i].enum_name);
830 }
831 printf("\tS390_FEAT_GROUP_MAX,\n"
832 "} S390FeatGroup;\n");
833}
834
dced7eec
MM		 835int main(int argc, char *argv[])
836{
837 printf("/*\n"
838 " * AUTOMATICALLY GENERATED, DO NOT MODIFY HERE, EDIT\n"
839 " * SOURCE FILE \"%s\" INSTEAD.\n"
840 " *\n"
841 " * Copyright %s IBM Corp.\n"
842 " *\n"
843 " * This work is licensed under the terms of the GNU GPL, "
844 "version 2 or (at\n * your option) any later version. See "
845 "the COPYING file in the top-level\n * directory.\n"
846 " */\n\n"
847 "#ifndef %s\n#define %s\n", __FILE__, _YEARS, _NAME_H, _NAME_H);
848 print_feature_defs();
90229ebb 849 print_feature_group_defs();
35b4df64 850 print_qemu_feature_defs();
a5f9ecc4 851 print_feature_group_enum_type();
dced7eec
MM		 852 printf("\n#endif\n");
853 return 0;
854}
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