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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
9615495a | 24 | #include "qemu/osdep.h" |
0e60a699 | 25 | #include <sys/ioctl.h> |
0e60a699 AG |
26 | |
27 | #include <linux/kvm.h> | |
28 | #include <asm/ptrace.h> | |
29 | ||
30 | #include "qemu-common.h" | |
33c11879 | 31 | #include "cpu.h" |
d49b6836 | 32 | #include "qemu/error-report.h" |
1de7afc9 | 33 | #include "qemu/timer.h" |
9c17d615 | 34 | #include "sysemu/sysemu.h" |
8195d899 | 35 | #include "sysemu/hw_accel.h" |
4cb88c3c | 36 | #include "hw/hw.h" |
9c17d615 | 37 | #include "sysemu/device_tree.h" |
08eb8c85 | 38 | #include "qapi/qmp/qjson.h" |
770a6379 | 39 | #include "exec/gdbstub.h" |
18ff9494 | 40 | #include "exec/address-spaces.h" |
860643bc | 41 | #include "trace.h" |
3a449690 | 42 | #include "qapi-event.h" |
863f6f52 | 43 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 44 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 45 | #include "hw/s390x/ipl.h" |
f07177a5 | 46 | #include "hw/s390x/ebcdic.h" |
4c663752 | 47 | #include "exec/memattrs.h" |
9700230b | 48 | #include "hw/s390x/s390-virtio-ccw.h" |
0e60a699 | 49 | |
08564ecd DA |
50 | #ifndef DEBUG_KVM |
51 | #define DEBUG_KVM 0 | |
0e60a699 AG |
52 | #endif |
53 | ||
08564ecd DA |
54 | #define DPRINTF(fmt, ...) do { \ |
55 | if (DEBUG_KVM) { \ | |
56 | fprintf(stderr, fmt, ## __VA_ARGS__); \ | |
57 | } \ | |
58 | } while (0); | |
59 | ||
2b147555 DD |
60 | #define kvm_vm_check_mem_attr(s, attr) \ |
61 | kvm_vm_check_attr(s, KVM_S390_VM_MEM_CTRL, attr) | |
62 | ||
0e60a699 AG |
63 | #define IPA0_DIAG 0x8300 |
64 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
65 | #define IPA0_B2 0xb200 |
66 | #define IPA0_B9 0xb900 | |
67 | #define IPA0_EB 0xeb00 | |
863f6f52 | 68 | #define IPA0_E3 0xe300 |
0e60a699 | 69 | |
1eecf41b FB |
70 | #define PRIV_B2_SCLP_CALL 0x20 |
71 | #define PRIV_B2_CSCH 0x30 | |
72 | #define PRIV_B2_HSCH 0x31 | |
73 | #define PRIV_B2_MSCH 0x32 | |
74 | #define PRIV_B2_SSCH 0x33 | |
75 | #define PRIV_B2_STSCH 0x34 | |
76 | #define PRIV_B2_TSCH 0x35 | |
77 | #define PRIV_B2_TPI 0x36 | |
78 | #define PRIV_B2_SAL 0x37 | |
79 | #define PRIV_B2_RSCH 0x38 | |
80 | #define PRIV_B2_STCRW 0x39 | |
81 | #define PRIV_B2_STCPS 0x3a | |
82 | #define PRIV_B2_RCHP 0x3b | |
83 | #define PRIV_B2_SCHM 0x3c | |
84 | #define PRIV_B2_CHSC 0x5f | |
85 | #define PRIV_B2_SIGA 0x74 | |
86 | #define PRIV_B2_XSCH 0x76 | |
87 | ||
88 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
89 | #define PRIV_EB_PCISTB 0xd0 |
90 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
91 | |
92 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
93 | #define PRIV_B9_CLP 0xa0 |
94 | #define PRIV_B9_PCISTG 0xd0 | |
95 | #define PRIV_B9_PCILG 0xd2 | |
96 | #define PRIV_B9_RPCIT 0xd3 | |
97 | ||
98 | #define PRIV_E3_MPCIFC 0xd0 | |
99 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 100 | |
8fc639af | 101 | #define DIAG_TIMEREVENT 0x288 |
268846ba | 102 | #define DIAG_IPL 0x308 |
0e60a699 AG |
103 | #define DIAG_KVM_HYPERCALL 0x500 |
104 | #define DIAG_KVM_BREAKPOINT 0x501 | |
105 | ||
0e60a699 | 106 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 107 | #define ICPT_PROGRAM 0x08 |
a2689242 | 108 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
109 | #define ICPT_WAITPSW 0x1c |
110 | #define ICPT_SOFT_INTERCEPT 0x24 | |
111 | #define ICPT_CPU_STOP 0x28 | |
b60fae32 | 112 | #define ICPT_OPEREXC 0x2c |
0e60a699 AG |
113 | #define ICPT_IO 0x40 |
114 | ||
3cda44f7 JF |
115 | #define NR_LOCAL_IRQS 32 |
116 | /* | |
117 | * Needs to be big enough to contain max_cpus emergency signals | |
118 | * and in addition NR_LOCAL_IRQS interrupts | |
119 | */ | |
120 | #define VCPU_IRQ_BUF_SIZE (sizeof(struct kvm_s390_irq) * \ | |
121 | (max_cpus + NR_LOCAL_IRQS)) | |
122 | ||
770a6379 DH |
123 | static CPUWatchpoint hw_watchpoint; |
124 | /* | |
125 | * We don't use a list because this structure is also used to transmit the | |
126 | * hardware breakpoints to the kernel. | |
127 | */ | |
128 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
129 | static int nb_hw_breakpoints; | |
130 | ||
94a8d39a JK |
131 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
132 | KVM_CAP_LAST_INFO | |
133 | }; | |
134 | ||
f9530c32 CB |
135 | static QemuMutex qemu_sigp_mutex; |
136 | ||
5b08b344 | 137 | static int cap_sync_regs; |
819bd309 | 138 | static int cap_async_pf; |
a9bcd1b8 | 139 | static int cap_mem_op; |
1191c949 | 140 | static int cap_s390_irq; |
9700230b | 141 | static int cap_ri; |
5b08b344 | 142 | |
dc622deb | 143 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 144 | |
a310b283 DD |
145 | static int kvm_s390_query_mem_limit(KVMState *s, uint64_t *memory_limit) |
146 | { | |
147 | struct kvm_device_attr attr = { | |
148 | .group = KVM_S390_VM_MEM_CTRL, | |
149 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
150 | .addr = (uint64_t) memory_limit, | |
151 | }; | |
152 | ||
153 | return kvm_vm_ioctl(s, KVM_GET_DEVICE_ATTR, &attr); | |
154 | } | |
155 | ||
156 | int kvm_s390_set_mem_limit(KVMState *s, uint64_t new_limit, uint64_t *hw_limit) | |
157 | { | |
158 | int rc; | |
159 | ||
160 | struct kvm_device_attr attr = { | |
161 | .group = KVM_S390_VM_MEM_CTRL, | |
162 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
163 | .addr = (uint64_t) &new_limit, | |
164 | }; | |
165 | ||
2b147555 | 166 | if (!kvm_vm_check_mem_attr(s, KVM_S390_VM_MEM_LIMIT_SIZE)) { |
a310b283 DD |
167 | return 0; |
168 | } | |
169 | ||
170 | rc = kvm_s390_query_mem_limit(s, hw_limit); | |
171 | if (rc) { | |
172 | return rc; | |
173 | } else if (*hw_limit < new_limit) { | |
174 | return -E2BIG; | |
175 | } | |
176 | ||
177 | return kvm_vm_ioctl(s, KVM_SET_DEVICE_ATTR, &attr); | |
178 | } | |
179 | ||
07059eff DH |
180 | static bool kvm_s390_cmma_available(void) |
181 | { | |
182 | static bool initialized, value; | |
183 | ||
184 | if (!initialized) { | |
185 | initialized = true; | |
186 | value = kvm_vm_check_mem_attr(kvm_state, KVM_S390_VM_MEM_ENABLE_CMMA) && | |
187 | kvm_vm_check_mem_attr(kvm_state, KVM_S390_VM_MEM_CLR_CMMA); | |
188 | } | |
189 | return value; | |
190 | } | |
191 | ||
1cd4e0f6 | 192 | void kvm_s390_cmma_reset(void) |
4cb88c3c DD |
193 | { |
194 | int rc; | |
4cb88c3c DD |
195 | struct kvm_device_attr attr = { |
196 | .group = KVM_S390_VM_MEM_CTRL, | |
197 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
198 | }; | |
199 | ||
0cf4d747 | 200 | if (mem_path || !kvm_s390_cmma_available()) { |
07059eff DH |
201 | return; |
202 | } | |
203 | ||
1cd4e0f6 | 204 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
4cb88c3c DD |
205 | trace_kvm_clear_cmma(rc); |
206 | } | |
207 | ||
07059eff | 208 | static void kvm_s390_enable_cmma(void) |
4cb88c3c DD |
209 | { |
210 | int rc; | |
211 | struct kvm_device_attr attr = { | |
212 | .group = KVM_S390_VM_MEM_CTRL, | |
213 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
214 | }; | |
215 | ||
07059eff | 216 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
4cb88c3c DD |
217 | trace_kvm_enable_cmma(rc); |
218 | } | |
219 | ||
2eb1cd07 TK |
220 | static void kvm_s390_set_attr(uint64_t attr) |
221 | { | |
222 | struct kvm_device_attr attribute = { | |
223 | .group = KVM_S390_VM_CRYPTO, | |
224 | .attr = attr, | |
225 | }; | |
226 | ||
227 | int ret = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attribute); | |
228 | ||
229 | if (ret) { | |
230 | error_report("Failed to set crypto device attribute %lu: %s", | |
231 | attr, strerror(-ret)); | |
232 | } | |
233 | } | |
234 | ||
235 | static void kvm_s390_init_aes_kw(void) | |
236 | { | |
237 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_AES_KW; | |
238 | ||
239 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "aes-key-wrap", | |
240 | NULL)) { | |
241 | attr = KVM_S390_VM_CRYPTO_ENABLE_AES_KW; | |
242 | } | |
243 | ||
244 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
245 | kvm_s390_set_attr(attr); | |
246 | } | |
247 | } | |
248 | ||
249 | static void kvm_s390_init_dea_kw(void) | |
250 | { | |
251 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_DEA_KW; | |
252 | ||
253 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "dea-key-wrap", | |
254 | NULL)) { | |
255 | attr = KVM_S390_VM_CRYPTO_ENABLE_DEA_KW; | |
256 | } | |
257 | ||
258 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
259 | kvm_s390_set_attr(attr); | |
260 | } | |
261 | } | |
262 | ||
4ab72920 | 263 | void kvm_s390_crypto_reset(void) |
2eb1cd07 | 264 | { |
c85d21c7 DH |
265 | if (s390_has_feat(S390_FEAT_MSA_EXT_3)) { |
266 | kvm_s390_init_aes_kw(); | |
267 | kvm_s390_init_dea_kw(); | |
268 | } | |
2eb1cd07 TK |
269 | } |
270 | ||
b16565b3 | 271 | int kvm_arch_init(MachineState *ms, KVMState *s) |
0e60a699 | 272 | { |
5b08b344 | 273 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 274 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
a9bcd1b8 | 275 | cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP); |
1191c949 | 276 | cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ); |
4cb88c3c | 277 | |
91138037 MA |
278 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
279 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
280 | phys_mem_set_alloc(legacy_s390_alloc); | |
281 | } | |
f16d3f58 DH |
282 | |
283 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); | |
46ca6b3b | 284 | kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0); |
f07177a5 | 285 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); |
9700230b FZ |
286 | if (ri_allowed()) { |
287 | if (kvm_vm_enable_cap(s, KVM_CAP_S390_RI, 0) == 0) { | |
288 | cap_ri = 1; | |
289 | } | |
290 | } | |
f16d3f58 | 291 | |
f9530c32 CB |
292 | qemu_mutex_init(&qemu_sigp_mutex); |
293 | ||
0e60a699 AG |
294 | return 0; |
295 | } | |
296 | ||
d525ffab PB |
297 | int kvm_arch_irqchip_create(MachineState *ms, KVMState *s) |
298 | { | |
299 | return 0; | |
300 | } | |
301 | ||
b164e48e EH |
302 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
303 | { | |
304 | return cpu->cpu_index; | |
305 | } | |
306 | ||
c9e659c9 | 307 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 308 | { |
c9e659c9 DH |
309 | S390CPU *cpu = S390_CPU(cs); |
310 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
3cda44f7 | 311 | cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE); |
1c9d2a1d | 312 | return 0; |
0e60a699 AG |
313 | } |
314 | ||
50a2c6e5 | 315 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 316 | { |
50a2c6e5 PB |
317 | CPUState *cs = CPU(cpu); |
318 | ||
419831d7 AG |
319 | /* The initial reset call is needed here to reset in-kernel |
320 | * vcpu data that we can't access directly from QEMU | |
321 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
322 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
323 | * code (kvm-all) */ | |
50a2c6e5 | 324 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 325 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 326 | } |
0e60a699 AG |
327 | } |
328 | ||
fdb78ec0 DH |
329 | static int can_sync_regs(CPUState *cs, int regs) |
330 | { | |
331 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
332 | } | |
333 | ||
20d695a9 | 334 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 335 | { |
20d695a9 AF |
336 | S390CPU *cpu = S390_CPU(cs); |
337 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 338 | struct kvm_sregs sregs; |
0e60a699 | 339 | struct kvm_regs regs; |
e6eef7c2 | 340 | struct kvm_fpu fpu = {}; |
860643bc | 341 | int r; |
0e60a699 AG |
342 | int i; |
343 | ||
5b08b344 | 344 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
345 | cs->kvm_run->psw_addr = env->psw.addr; |
346 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 347 | |
fdb78ec0 | 348 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 349 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
350 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
351 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
352 | } |
353 | } else { | |
354 | for (i = 0; i < 16; i++) { | |
355 | regs.gprs[i] = env->regs[i]; | |
356 | } | |
860643bc CB |
357 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
358 | if (r < 0) { | |
359 | return r; | |
5b08b344 | 360 | } |
0e60a699 AG |
361 | } |
362 | ||
fcb79802 EF |
363 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { |
364 | for (i = 0; i < 32; i++) { | |
365 | cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0].ll; | |
366 | cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1].ll; | |
367 | } | |
368 | cs->kvm_run->s.regs.fpc = env->fpc; | |
369 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_VRS; | |
5ab0e547 DH |
370 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
371 | for (i = 0; i < 16; i++) { | |
372 | cs->kvm_run->s.regs.fprs[i] = get_freg(env, i)->ll; | |
373 | } | |
374 | cs->kvm_run->s.regs.fpc = env->fpc; | |
375 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_FPRS; | |
fcb79802 EF |
376 | } else { |
377 | /* Floating point */ | |
378 | for (i = 0; i < 16; i++) { | |
379 | fpu.fprs[i] = get_freg(env, i)->ll; | |
380 | } | |
381 | fpu.fpc = env->fpc; | |
85ad6230 | 382 | |
fcb79802 EF |
383 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); |
384 | if (r < 0) { | |
385 | return r; | |
386 | } | |
85ad6230 JH |
387 | } |
388 | ||
44c68de0 DD |
389 | /* Do we need to save more than that? */ |
390 | if (level == KVM_PUT_RUNTIME_STATE) { | |
391 | return 0; | |
392 | } | |
420840e5 | 393 | |
59ac1532 DH |
394 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
395 | cs->kvm_run->s.regs.cputm = env->cputm; | |
396 | cs->kvm_run->s.regs.ckc = env->ckc; | |
397 | cs->kvm_run->s.regs.todpr = env->todpr; | |
398 | cs->kvm_run->s.regs.gbea = env->gbea; | |
399 | cs->kvm_run->s.regs.pp = env->pp; | |
400 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
401 | } else { | |
402 | /* | |
403 | * These ONE_REGS are not protected by a capability. As they are only | |
404 | * necessary for migration we just trace a possible error, but don't | |
405 | * return with an error return code. | |
406 | */ | |
407 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
408 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
409 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
410 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
411 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
412 | } | |
413 | ||
9700230b FZ |
414 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
415 | memcpy(cs->kvm_run->s.regs.riccb, env->riccb, 64); | |
416 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_RICCB; | |
417 | } | |
418 | ||
59ac1532 DH |
419 | /* pfault parameters */ |
420 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
421 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
422 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
423 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
424 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
425 | } else if (cap_async_pf) { | |
860643bc CB |
426 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
427 | if (r < 0) { | |
428 | return r; | |
819bd309 | 429 | } |
860643bc CB |
430 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
431 | if (r < 0) { | |
432 | return r; | |
819bd309 | 433 | } |
860643bc CB |
434 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
435 | if (r < 0) { | |
436 | return r; | |
819bd309 DD |
437 | } |
438 | } | |
439 | ||
fdb78ec0 DH |
440 | /* access registers and control registers*/ |
441 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 442 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
443 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
444 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 445 | } |
f7575c96 AF |
446 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
447 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
448 | } else { |
449 | for (i = 0; i < 16; i++) { | |
450 | sregs.acrs[i] = env->aregs[i]; | |
451 | sregs.crs[i] = env->cregs[i]; | |
452 | } | |
860643bc CB |
453 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
454 | if (r < 0) { | |
455 | return r; | |
5b08b344 CB |
456 | } |
457 | } | |
0e60a699 | 458 | |
5b08b344 | 459 | /* Finally the prefix */ |
fdb78ec0 | 460 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
461 | cs->kvm_run->s.regs.prefix = env->psa; |
462 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
463 | } else { |
464 | /* prefix is only supported via sync regs */ | |
465 | } | |
466 | return 0; | |
0e60a699 AG |
467 | } |
468 | ||
20d695a9 | 469 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
470 | { |
471 | S390CPU *cpu = S390_CPU(cs); | |
472 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 473 | struct kvm_sregs sregs; |
0e60a699 | 474 | struct kvm_regs regs; |
85ad6230 | 475 | struct kvm_fpu fpu; |
44c68de0 | 476 | int i, r; |
420840e5 | 477 | |
5b08b344 | 478 | /* get the PSW */ |
f7575c96 AF |
479 | env->psw.addr = cs->kvm_run->psw_addr; |
480 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
481 | |
482 | /* the GPRS */ | |
fdb78ec0 | 483 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 484 | for (i = 0; i < 16; i++) { |
f7575c96 | 485 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
486 | } |
487 | } else { | |
44c68de0 DD |
488 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
489 | if (r < 0) { | |
490 | return r; | |
5b08b344 CB |
491 | } |
492 | for (i = 0; i < 16; i++) { | |
493 | env->regs[i] = regs.gprs[i]; | |
494 | } | |
0e60a699 AG |
495 | } |
496 | ||
5b08b344 | 497 | /* The ACRS and CRS */ |
fdb78ec0 | 498 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 499 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
500 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
501 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
502 | } |
503 | } else { | |
44c68de0 DD |
504 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
505 | if (r < 0) { | |
506 | return r; | |
5b08b344 CB |
507 | } |
508 | for (i = 0; i < 16; i++) { | |
509 | env->aregs[i] = sregs.acrs[i]; | |
510 | env->cregs[i] = sregs.crs[i]; | |
511 | } | |
0e60a699 AG |
512 | } |
513 | ||
fcb79802 EF |
514 | /* Floating point and vector registers */ |
515 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { | |
516 | for (i = 0; i < 32; i++) { | |
517 | env->vregs[i][0].ll = cs->kvm_run->s.regs.vrs[i][0]; | |
518 | env->vregs[i][1].ll = cs->kvm_run->s.regs.vrs[i][1]; | |
519 | } | |
520 | env->fpc = cs->kvm_run->s.regs.fpc; | |
5ab0e547 DH |
521 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
522 | for (i = 0; i < 16; i++) { | |
523 | get_freg(env, i)->ll = cs->kvm_run->s.regs.fprs[i]; | |
524 | } | |
525 | env->fpc = cs->kvm_run->s.regs.fpc; | |
fcb79802 EF |
526 | } else { |
527 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
528 | if (r < 0) { | |
529 | return r; | |
530 | } | |
531 | for (i = 0; i < 16; i++) { | |
532 | get_freg(env, i)->ll = fpu.fprs[i]; | |
533 | } | |
534 | env->fpc = fpu.fpc; | |
85ad6230 | 535 | } |
85ad6230 | 536 | |
44c68de0 | 537 | /* The prefix */ |
fdb78ec0 | 538 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 539 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 540 | } |
0e60a699 | 541 | |
59ac1532 DH |
542 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
543 | env->cputm = cs->kvm_run->s.regs.cputm; | |
544 | env->ckc = cs->kvm_run->s.regs.ckc; | |
545 | env->todpr = cs->kvm_run->s.regs.todpr; | |
546 | env->gbea = cs->kvm_run->s.regs.gbea; | |
547 | env->pp = cs->kvm_run->s.regs.pp; | |
548 | } else { | |
549 | /* | |
550 | * These ONE_REGS are not protected by a capability. As they are only | |
551 | * necessary for migration we just trace a possible error, but don't | |
552 | * return with an error return code. | |
553 | */ | |
554 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
555 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
556 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
557 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
558 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
559 | } | |
560 | ||
9700230b FZ |
561 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
562 | memcpy(env->riccb, cs->kvm_run->s.regs.riccb, 64); | |
563 | } | |
564 | ||
59ac1532 DH |
565 | /* pfault parameters */ |
566 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
567 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
568 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
569 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
570 | } else if (cap_async_pf) { | |
860643bc | 571 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
572 | if (r < 0) { |
573 | return r; | |
574 | } | |
860643bc | 575 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
576 | if (r < 0) { |
577 | return r; | |
578 | } | |
860643bc | 579 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
580 | if (r < 0) { |
581 | return r; | |
582 | } | |
583 | } | |
584 | ||
0e60a699 AG |
585 | return 0; |
586 | } | |
587 | ||
3f9e59bb JH |
588 | int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) |
589 | { | |
590 | int r; | |
591 | struct kvm_device_attr attr = { | |
592 | .group = KVM_S390_VM_TOD, | |
593 | .attr = KVM_S390_VM_TOD_LOW, | |
594 | .addr = (uint64_t)tod_low, | |
595 | }; | |
596 | ||
597 | r = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
598 | if (r) { | |
599 | return r; | |
600 | } | |
601 | ||
602 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
603 | attr.addr = (uint64_t)tod_high; | |
604 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
605 | } | |
606 | ||
607 | int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) | |
608 | { | |
609 | int r; | |
610 | ||
611 | struct kvm_device_attr attr = { | |
612 | .group = KVM_S390_VM_TOD, | |
613 | .attr = KVM_S390_VM_TOD_LOW, | |
614 | .addr = (uint64_t)tod_low, | |
615 | }; | |
616 | ||
617 | r = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
618 | if (r) { | |
619 | return r; | |
620 | } | |
621 | ||
622 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
623 | attr.addr = (uint64_t)tod_high; | |
624 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
625 | } | |
626 | ||
a9bcd1b8 TH |
627 | /** |
628 | * kvm_s390_mem_op: | |
629 | * @addr: the logical start address in guest memory | |
6cb1e49d | 630 | * @ar: the access register number |
a9bcd1b8 | 631 | * @hostbuf: buffer in host memory. NULL = do only checks w/o copying |
67cc32eb | 632 | * @len: length that should be transferred |
a9bcd1b8 | 633 | * @is_write: true = write, false = read |
67cc32eb | 634 | * Returns: 0 on success, non-zero if an exception or error occurred |
a9bcd1b8 TH |
635 | * |
636 | * Use KVM ioctl to read/write from/to guest memory. An access exception | |
637 | * is injected into the vCPU in case of translation errors. | |
638 | */ | |
6cb1e49d AY |
639 | int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, uint8_t ar, void *hostbuf, |
640 | int len, bool is_write) | |
a9bcd1b8 TH |
641 | { |
642 | struct kvm_s390_mem_op mem_op = { | |
643 | .gaddr = addr, | |
644 | .flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION, | |
645 | .size = len, | |
646 | .op = is_write ? KVM_S390_MEMOP_LOGICAL_WRITE | |
647 | : KVM_S390_MEMOP_LOGICAL_READ, | |
648 | .buf = (uint64_t)hostbuf, | |
6cb1e49d | 649 | .ar = ar, |
a9bcd1b8 TH |
650 | }; |
651 | int ret; | |
652 | ||
653 | if (!cap_mem_op) { | |
654 | return -ENOSYS; | |
655 | } | |
656 | if (!hostbuf) { | |
657 | mem_op.flags |= KVM_S390_MEMOP_F_CHECK_ONLY; | |
658 | } | |
659 | ||
660 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); | |
661 | if (ret < 0) { | |
662 | error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); | |
663 | } | |
664 | return ret; | |
665 | } | |
666 | ||
fdec9918 CB |
667 | /* |
668 | * Legacy layout for s390: | |
669 | * Older S390 KVM requires the topmost vma of the RAM to be | |
670 | * smaller than an system defined value, which is at least 256GB. | |
671 | * Larger systems have larger values. We put the guest between | |
672 | * the end of data segment (system break) and this value. We | |
673 | * use 32GB as a base to have enough room for the system break | |
674 | * to grow. We also have to use MAP parameters that avoid | |
675 | * read-only mapping of guest pages. | |
676 | */ | |
dc622deb | 677 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
678 | { |
679 | void *mem; | |
680 | ||
681 | mem = mmap((void *) 0x800000000ULL, size, | |
682 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
683 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 684 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
685 | } |
686 | ||
b60fae32 DH |
687 | static uint8_t const *sw_bp_inst; |
688 | static uint8_t sw_bp_ilen; | |
689 | ||
690 | static void determine_sw_breakpoint_instr(void) | |
691 | { | |
692 | /* DIAG 501 is used for sw breakpoints with old kernels */ | |
693 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
694 | /* Instruction 0x0000 is used for sw breakpoints with recent kernels */ | |
695 | static const uint8_t instr_0x0000[] = {0x00, 0x00}; | |
696 | ||
697 | if (sw_bp_inst) { | |
698 | return; | |
699 | } | |
700 | if (kvm_vm_enable_cap(kvm_state, KVM_CAP_S390_USER_INSTR0, 0)) { | |
701 | sw_bp_inst = diag_501; | |
702 | sw_bp_ilen = sizeof(diag_501); | |
703 | DPRINTF("KVM: will use 4-byte sw breakpoints.\n"); | |
704 | } else { | |
705 | sw_bp_inst = instr_0x0000; | |
706 | sw_bp_ilen = sizeof(instr_0x0000); | |
707 | DPRINTF("KVM: will use 2-byte sw breakpoints.\n"); | |
708 | } | |
709 | } | |
8e4e86af | 710 | |
20d695a9 | 711 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 712 | { |
b60fae32 | 713 | determine_sw_breakpoint_instr(); |
0e60a699 | 714 | |
8e4e86af | 715 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
b60fae32 DH |
716 | sw_bp_ilen, 0) || |
717 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)sw_bp_inst, sw_bp_ilen, 1)) { | |
0e60a699 AG |
718 | return -EINVAL; |
719 | } | |
720 | return 0; | |
721 | } | |
722 | ||
20d695a9 | 723 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 724 | { |
b60fae32 | 725 | uint8_t t[MAX_ILEN]; |
0e60a699 | 726 | |
b60fae32 | 727 | if (cpu_memory_rw_debug(cs, bp->pc, t, sw_bp_ilen, 0)) { |
0e60a699 | 728 | return -EINVAL; |
b60fae32 | 729 | } else if (memcmp(t, sw_bp_inst, sw_bp_ilen)) { |
0e60a699 | 730 | return -EINVAL; |
8e4e86af | 731 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
b60fae32 | 732 | sw_bp_ilen, 1)) { |
0e60a699 AG |
733 | return -EINVAL; |
734 | } | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
770a6379 DH |
739 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
740 | int len, int type) | |
741 | { | |
742 | int n; | |
743 | ||
744 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
745 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
746 | (hw_breakpoints[n].len == len || len == -1)) { | |
747 | return &hw_breakpoints[n]; | |
748 | } | |
749 | } | |
750 | ||
751 | return NULL; | |
752 | } | |
753 | ||
754 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
755 | { | |
756 | int size; | |
757 | ||
758 | if (find_hw_breakpoint(addr, len, type)) { | |
759 | return -EEXIST; | |
760 | } | |
761 | ||
762 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
763 | ||
764 | if (!hw_breakpoints) { | |
765 | nb_hw_breakpoints = 0; | |
766 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
767 | } else { | |
768 | hw_breakpoints = | |
769 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
770 | } | |
771 | ||
772 | if (!hw_breakpoints) { | |
773 | nb_hw_breakpoints = 0; | |
774 | return -ENOMEM; | |
775 | } | |
776 | ||
777 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
778 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
779 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
780 | ||
781 | nb_hw_breakpoints++; | |
782 | ||
783 | return 0; | |
784 | } | |
785 | ||
8c012449 DH |
786 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
787 | target_ulong len, int type) | |
788 | { | |
770a6379 DH |
789 | switch (type) { |
790 | case GDB_BREAKPOINT_HW: | |
791 | type = KVM_HW_BP; | |
792 | break; | |
793 | case GDB_WATCHPOINT_WRITE: | |
794 | if (len < 1) { | |
795 | return -EINVAL; | |
796 | } | |
797 | type = KVM_HW_WP_WRITE; | |
798 | break; | |
799 | default: | |
800 | return -ENOSYS; | |
801 | } | |
802 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
803 | } |
804 | ||
805 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
806 | target_ulong len, int type) | |
807 | { | |
770a6379 DH |
808 | int size; |
809 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
810 | ||
811 | if (bp == NULL) { | |
812 | return -ENOENT; | |
813 | } | |
814 | ||
815 | nb_hw_breakpoints--; | |
816 | if (nb_hw_breakpoints > 0) { | |
817 | /* | |
818 | * In order to trim the array, move the last element to the position to | |
819 | * be removed - if necessary. | |
820 | */ | |
821 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
822 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
823 | } | |
824 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
825 | hw_breakpoints = | |
826 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
827 | } else { | |
828 | g_free(hw_breakpoints); | |
829 | hw_breakpoints = NULL; | |
830 | } | |
831 | ||
832 | return 0; | |
8c012449 DH |
833 | } |
834 | ||
835 | void kvm_arch_remove_all_hw_breakpoints(void) | |
836 | { | |
770a6379 DH |
837 | nb_hw_breakpoints = 0; |
838 | g_free(hw_breakpoints); | |
839 | hw_breakpoints = NULL; | |
8c012449 DH |
840 | } |
841 | ||
842 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
843 | { | |
770a6379 DH |
844 | int i; |
845 | ||
846 | if (nb_hw_breakpoints > 0) { | |
847 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
848 | dbg->arch.hw_bp = hw_breakpoints; | |
849 | ||
850 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
851 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
852 | hw_breakpoints[i].addr); | |
853 | } | |
854 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
855 | } else { | |
856 | dbg->arch.nr_hw_bp = 0; | |
857 | dbg->arch.hw_bp = NULL; | |
858 | } | |
8c012449 DH |
859 | } |
860 | ||
20d695a9 | 861 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 862 | { |
0e60a699 AG |
863 | } |
864 | ||
4c663752 | 865 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
0e60a699 | 866 | { |
4c663752 | 867 | return MEMTXATTRS_UNSPECIFIED; |
0e60a699 AG |
868 | } |
869 | ||
20d695a9 | 870 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 871 | { |
225dc991 | 872 | return cs->halted; |
0af691d7 MT |
873 | } |
874 | ||
66ad0893 CH |
875 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
876 | struct kvm_s390_interrupt *interrupt) | |
877 | { | |
878 | int r = 0; | |
879 | ||
880 | interrupt->type = irq->type; | |
881 | switch (irq->type) { | |
882 | case KVM_S390_INT_VIRTIO: | |
883 | interrupt->parm = irq->u.ext.ext_params; | |
884 | /* fall through */ | |
885 | case KVM_S390_INT_PFAULT_INIT: | |
886 | case KVM_S390_INT_PFAULT_DONE: | |
887 | interrupt->parm64 = irq->u.ext.ext_params2; | |
888 | break; | |
889 | case KVM_S390_PROGRAM_INT: | |
890 | interrupt->parm = irq->u.pgm.code; | |
891 | break; | |
892 | case KVM_S390_SIGP_SET_PREFIX: | |
893 | interrupt->parm = irq->u.prefix.address; | |
894 | break; | |
895 | case KVM_S390_INT_SERVICE: | |
896 | interrupt->parm = irq->u.ext.ext_params; | |
897 | break; | |
898 | case KVM_S390_MCHK: | |
899 | interrupt->parm = irq->u.mchk.cr14; | |
900 | interrupt->parm64 = irq->u.mchk.mcic; | |
901 | break; | |
902 | case KVM_S390_INT_EXTERNAL_CALL: | |
903 | interrupt->parm = irq->u.extcall.code; | |
904 | break; | |
905 | case KVM_S390_INT_EMERGENCY: | |
906 | interrupt->parm = irq->u.emerg.code; | |
907 | break; | |
908 | case KVM_S390_SIGP_STOP: | |
909 | case KVM_S390_RESTART: | |
910 | break; /* These types have no parameters */ | |
911 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
912 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
913 | interrupt->parm |= irq->u.io.subchannel_nr; | |
914 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
915 | interrupt->parm64 |= irq->u.io.io_int_word; | |
916 | break; | |
917 | default: | |
918 | r = -EINVAL; | |
919 | break; | |
920 | } | |
921 | return r; | |
922 | } | |
923 | ||
1191c949 | 924 | static void inject_vcpu_irq_legacy(CPUState *cs, struct kvm_s390_irq *irq) |
66ad0893 CH |
925 | { |
926 | struct kvm_s390_interrupt kvmint = {}; | |
66ad0893 CH |
927 | int r; |
928 | ||
929 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
930 | if (r < 0) { | |
931 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
932 | exit(1); | |
933 | } | |
934 | ||
935 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
936 | if (r < 0) { | |
937 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
938 | exit(1); | |
939 | } | |
940 | } | |
941 | ||
1191c949 JF |
942 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) |
943 | { | |
944 | CPUState *cs = CPU(cpu); | |
945 | int r; | |
946 | ||
947 | if (cap_s390_irq) { | |
948 | r = kvm_vcpu_ioctl(cs, KVM_S390_IRQ, irq); | |
949 | if (!r) { | |
950 | return; | |
951 | } | |
952 | error_report("KVM failed to inject interrupt %llx", irq->type); | |
953 | exit(1); | |
954 | } | |
955 | ||
956 | inject_vcpu_irq_legacy(cs, irq); | |
957 | } | |
958 | ||
bbd8bb8e | 959 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
960 | { |
961 | struct kvm_s390_interrupt kvmint = {}; | |
962 | int r; | |
963 | ||
964 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
965 | if (r < 0) { | |
966 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
967 | exit(1); | |
968 | } | |
969 | ||
970 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
971 | if (r < 0) { | |
972 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
973 | exit(1); | |
974 | } | |
975 | } | |
976 | ||
bbd8bb8e CH |
977 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
978 | { | |
979 | static bool use_flic = true; | |
980 | int r; | |
981 | ||
982 | if (use_flic) { | |
983 | r = kvm_s390_inject_flic(irq); | |
984 | if (r == -ENOSYS) { | |
985 | use_flic = false; | |
986 | } | |
987 | if (!r) { | |
988 | return; | |
989 | } | |
990 | } | |
991 | __kvm_s390_floating_interrupt(irq); | |
992 | } | |
993 | ||
de13d216 | 994 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 995 | { |
de13d216 CH |
996 | struct kvm_s390_irq irq = { |
997 | .type = KVM_S390_INT_SERVICE, | |
998 | .u.ext.ext_params = parm, | |
999 | }; | |
0e60a699 | 1000 | |
de13d216 | 1001 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
1002 | } |
1003 | ||
1bc22652 | 1004 | static void enter_pgmcheck(S390CPU *cpu, uint16_t code) |
0e60a699 | 1005 | { |
de13d216 CH |
1006 | struct kvm_s390_irq irq = { |
1007 | .type = KVM_S390_PROGRAM_INT, | |
1008 | .u.pgm.code = code, | |
1009 | }; | |
1010 | ||
1011 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
1012 | } |
1013 | ||
801cdd35 TH |
1014 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
1015 | { | |
1016 | struct kvm_s390_irq irq = { | |
1017 | .type = KVM_S390_PROGRAM_INT, | |
1018 | .u.pgm.code = code, | |
1019 | .u.pgm.trans_exc_code = te_code, | |
1020 | .u.pgm.exc_access_id = te_code & 3, | |
1021 | }; | |
1022 | ||
1023 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
1024 | } | |
1025 | ||
1bc22652 | 1026 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 1027 | uint16_t ipbh0) |
0e60a699 | 1028 | { |
1bc22652 | 1029 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
1030 | uint64_t sccb; |
1031 | uint32_t code; | |
0e60a699 AG |
1032 | int r = 0; |
1033 | ||
cb446eca | 1034 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1035 | sccb = env->regs[ipbh0 & 0xf]; |
1036 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
1037 | ||
6e252802 | 1038 | r = sclp_service_call(env, sccb, code); |
9abf567d | 1039 | if (r < 0) { |
1bc22652 | 1040 | enter_pgmcheck(cpu, -r); |
e8803d93 TH |
1041 | } else { |
1042 | setcc(cpu, r); | |
0e60a699 | 1043 | } |
81f7c56c | 1044 | |
0e60a699 AG |
1045 | return 0; |
1046 | } | |
1047 | ||
1eecf41b | 1048 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 1049 | { |
09b99878 | 1050 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
1051 | int rc = 0; |
1052 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 1053 | |
44c68de0 | 1054 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 1055 | |
09b99878 | 1056 | switch (ipa1) { |
1eecf41b | 1057 | case PRIV_B2_XSCH: |
5d9bf1c0 | 1058 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 1059 | break; |
1eecf41b | 1060 | case PRIV_B2_CSCH: |
5d9bf1c0 | 1061 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 1062 | break; |
1eecf41b | 1063 | case PRIV_B2_HSCH: |
5d9bf1c0 | 1064 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 1065 | break; |
1eecf41b | 1066 | case PRIV_B2_MSCH: |
5d9bf1c0 | 1067 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1068 | break; |
1eecf41b | 1069 | case PRIV_B2_SSCH: |
5d9bf1c0 | 1070 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1071 | break; |
1eecf41b | 1072 | case PRIV_B2_STCRW: |
5d9bf1c0 | 1073 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 1074 | break; |
1eecf41b | 1075 | case PRIV_B2_STSCH: |
5d9bf1c0 | 1076 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1077 | break; |
1eecf41b | 1078 | case PRIV_B2_TSCH: |
09b99878 CH |
1079 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
1080 | fprintf(stderr, "Spurious tsch intercept\n"); | |
1081 | break; | |
1eecf41b | 1082 | case PRIV_B2_CHSC: |
5d9bf1c0 | 1083 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 1084 | break; |
1eecf41b | 1085 | case PRIV_B2_TPI: |
09b99878 CH |
1086 | /* This should have been handled by kvm already. */ |
1087 | fprintf(stderr, "Spurious tpi intercept\n"); | |
1088 | break; | |
1eecf41b | 1089 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
1090 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
1091 | run->s390_sieic.ipb); | |
09b99878 | 1092 | break; |
1eecf41b | 1093 | case PRIV_B2_RSCH: |
5d9bf1c0 | 1094 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 1095 | break; |
1eecf41b | 1096 | case PRIV_B2_RCHP: |
5d9bf1c0 | 1097 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 1098 | break; |
1eecf41b | 1099 | case PRIV_B2_STCPS: |
09b99878 | 1100 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 1101 | break; |
1eecf41b | 1102 | case PRIV_B2_SAL: |
5d9bf1c0 | 1103 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 1104 | break; |
1eecf41b | 1105 | case PRIV_B2_SIGA: |
c1e8dfb5 | 1106 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 1107 | setcc(cpu, 3); |
09b99878 | 1108 | break; |
1eecf41b FB |
1109 | case PRIV_B2_SCLP_CALL: |
1110 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
1111 | break; | |
c1e8dfb5 | 1112 | default: |
1eecf41b FB |
1113 | rc = -1; |
1114 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
1115 | break; | |
09b99878 CH |
1116 | } |
1117 | ||
1eecf41b | 1118 | return rc; |
09b99878 CH |
1119 | } |
1120 | ||
6cb1e49d AY |
1121 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run, |
1122 | uint8_t *ar) | |
863f6f52 FB |
1123 | { |
1124 | CPUS390XState *env = &cpu->env; | |
1125 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
1126 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1127 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1128 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1129 | ||
1130 | if (disp2 & 0x80000) { | |
1131 | disp2 += 0xfff00000; | |
1132 | } | |
6cb1e49d AY |
1133 | if (ar) { |
1134 | *ar = base2; | |
1135 | } | |
863f6f52 FB |
1136 | |
1137 | return (base2 ? env->regs[base2] : 0) + | |
1138 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
1139 | } | |
1140 | ||
6cb1e49d AY |
1141 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run, |
1142 | uint8_t *ar) | |
863f6f52 FB |
1143 | { |
1144 | CPUS390XState *env = &cpu->env; | |
1145 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1146 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1147 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1148 | ||
1149 | if (disp2 & 0x80000) { | |
1150 | disp2 += 0xfff00000; | |
1151 | } | |
6cb1e49d AY |
1152 | if (ar) { |
1153 | *ar = base2; | |
1154 | } | |
863f6f52 FB |
1155 | |
1156 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
1157 | } | |
1158 | ||
1159 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
1160 | { | |
1161 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1162 | ||
1163 | return clp_service_call(cpu, r2); | |
1164 | } | |
1165 | ||
1166 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1167 | { | |
1168 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1169 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1170 | ||
1171 | return pcilg_service_call(cpu, r1, r2); | |
1172 | } | |
1173 | ||
1174 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1175 | { | |
1176 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1177 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1178 | ||
1179 | return pcistg_service_call(cpu, r1, r2); | |
1180 | } | |
1181 | ||
1182 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1183 | { | |
1184 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1185 | uint64_t fiba; | |
6cb1e49d | 1186 | uint8_t ar; |
863f6f52 FB |
1187 | |
1188 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1189 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1190 | |
6cb1e49d | 1191 | return stpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1192 | } |
1193 | ||
1194 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
1195 | { | |
1196 | /* NOOP */ | |
1197 | return 0; | |
1198 | } | |
1199 | ||
1200 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
1201 | { | |
1202 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1203 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1204 | ||
1205 | return rpcit_service_call(cpu, r1, r2); | |
1206 | } | |
1207 | ||
1208 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
1209 | { | |
1210 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1211 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1212 | uint64_t gaddr; | |
6cb1e49d | 1213 | uint8_t ar; |
863f6f52 FB |
1214 | |
1215 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1216 | gaddr = get_base_disp_rsy(cpu, run, &ar); |
863f6f52 | 1217 | |
6cb1e49d | 1218 | return pcistb_service_call(cpu, r1, r3, gaddr, ar); |
863f6f52 FB |
1219 | } |
1220 | ||
1221 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1222 | { | |
1223 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1224 | uint64_t fiba; | |
6cb1e49d | 1225 | uint8_t ar; |
863f6f52 FB |
1226 | |
1227 | cpu_synchronize_state(CPU(cpu)); | |
6cb1e49d | 1228 | fiba = get_base_disp_rxy(cpu, run, &ar); |
863f6f52 | 1229 | |
6cb1e49d | 1230 | return mpcifc_service_call(cpu, r1, fiba, ar); |
863f6f52 FB |
1231 | } |
1232 | ||
1eecf41b | 1233 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
1234 | { |
1235 | int r = 0; | |
0e60a699 | 1236 | |
0e60a699 | 1237 | switch (ipa1) { |
863f6f52 FB |
1238 | case PRIV_B9_CLP: |
1239 | r = kvm_clp_service_call(cpu, run); | |
1240 | break; | |
1241 | case PRIV_B9_PCISTG: | |
1242 | r = kvm_pcistg_service_call(cpu, run); | |
1243 | break; | |
1244 | case PRIV_B9_PCILG: | |
1245 | r = kvm_pcilg_service_call(cpu, run); | |
1246 | break; | |
1247 | case PRIV_B9_RPCIT: | |
1248 | r = kvm_rpcit_service_call(cpu, run); | |
1249 | break; | |
1eecf41b FB |
1250 | case PRIV_B9_EQBS: |
1251 | /* just inject exception */ | |
1252 | r = -1; | |
1253 | break; | |
1254 | default: | |
1255 | r = -1; | |
1256 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
1257 | break; | |
1258 | } | |
1259 | ||
1260 | return r; | |
1261 | } | |
1262 | ||
80765f07 | 1263 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1264 | { |
1265 | int r = 0; | |
1266 | ||
80765f07 | 1267 | switch (ipbl) { |
863f6f52 FB |
1268 | case PRIV_EB_PCISTB: |
1269 | r = kvm_pcistb_service_call(cpu, run); | |
1270 | break; | |
1271 | case PRIV_EB_SIC: | |
1272 | r = kvm_sic_service_call(cpu, run); | |
1273 | break; | |
1eecf41b FB |
1274 | case PRIV_EB_SQBS: |
1275 | /* just inject exception */ | |
1276 | r = -1; | |
1277 | break; | |
1278 | default: | |
1279 | r = -1; | |
80765f07 | 1280 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1281 | break; |
0e60a699 AG |
1282 | } |
1283 | ||
1284 | return r; | |
1285 | } | |
1286 | ||
863f6f52 FB |
1287 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1288 | { | |
1289 | int r = 0; | |
1290 | ||
1291 | switch (ipbl) { | |
1292 | case PRIV_E3_MPCIFC: | |
1293 | r = kvm_mpcifc_service_call(cpu, run); | |
1294 | break; | |
1295 | case PRIV_E3_STPCIFC: | |
1296 | r = kvm_stpcifc_service_call(cpu, run); | |
1297 | break; | |
1298 | default: | |
1299 | r = -1; | |
1300 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1301 | break; | |
1302 | } | |
1303 | ||
1304 | return r; | |
1305 | } | |
1306 | ||
4fd6dd06 | 1307 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1308 | { |
4fd6dd06 | 1309 | CPUS390XState *env = &cpu->env; |
77319f22 | 1310 | int ret; |
3474b679 | 1311 | |
44c68de0 | 1312 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1313 | ret = s390_virtio_hypercall(env); |
1314 | if (ret == -EINVAL) { | |
1315 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1316 | return 0; | |
1317 | } | |
0e60a699 | 1318 | |
77319f22 | 1319 | return ret; |
0e60a699 AG |
1320 | } |
1321 | ||
8fc639af XW |
1322 | static void kvm_handle_diag_288(S390CPU *cpu, struct kvm_run *run) |
1323 | { | |
1324 | uint64_t r1, r3; | |
1325 | int rc; | |
1326 | ||
1327 | cpu_synchronize_state(CPU(cpu)); | |
1328 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1329 | r3 = run->s390_sieic.ipa & 0x000f; | |
1330 | rc = handle_diag_288(&cpu->env, r1, r3); | |
1331 | if (rc) { | |
1332 | enter_pgmcheck(cpu, PGM_SPECIFICATION); | |
1333 | } | |
1334 | } | |
1335 | ||
268846ba ED |
1336 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1337 | { | |
1338 | uint64_t r1, r3; | |
1339 | ||
1340 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1341 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1342 | r3 = run->s390_sieic.ipa & 0x000f; |
1343 | handle_diag_308(&cpu->env, r1, r3); | |
1344 | } | |
1345 | ||
b30f4dfb DH |
1346 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1347 | { | |
1348 | CPUS390XState *env = &cpu->env; | |
1349 | unsigned long pc; | |
1350 | ||
1351 | cpu_synchronize_state(CPU(cpu)); | |
1352 | ||
b60fae32 | 1353 | pc = env->psw.addr - sw_bp_ilen; |
b30f4dfb DH |
1354 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { |
1355 | env->psw.addr = pc; | |
1356 | return EXCP_DEBUG; | |
1357 | } | |
1358 | ||
1359 | return -ENOENT; | |
1360 | } | |
1361 | ||
638129ff CH |
1362 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1363 | ||
1364 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1365 | { |
1366 | int r = 0; | |
638129ff CH |
1367 | uint16_t func_code; |
1368 | ||
1369 | /* | |
1370 | * For any diagnose call we support, bits 48-63 of the resulting | |
1371 | * address specify the function code; the remainder is ignored. | |
1372 | */ | |
6cb1e49d | 1373 | func_code = decode_basedisp_rs(&cpu->env, ipb, NULL) & DIAG_KVM_CODE_MASK; |
638129ff | 1374 | switch (func_code) { |
8fc639af XW |
1375 | case DIAG_TIMEREVENT: |
1376 | kvm_handle_diag_288(cpu, run); | |
1377 | break; | |
268846ba ED |
1378 | case DIAG_IPL: |
1379 | kvm_handle_diag_308(cpu, run); | |
1380 | break; | |
39fbc5c6 CB |
1381 | case DIAG_KVM_HYPERCALL: |
1382 | r = handle_hypercall(cpu, run); | |
1383 | break; | |
1384 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1385 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1386 | break; |
1387 | default: | |
638129ff | 1388 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
68540b1a | 1389 | enter_pgmcheck(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1390 | break; |
0e60a699 AG |
1391 | } |
1392 | ||
1393 | return r; | |
1394 | } | |
1395 | ||
6eb8f212 | 1396 | typedef struct SigpInfo { |
22740e3f | 1397 | uint64_t param; |
6eb8f212 DH |
1398 | int cc; |
1399 | uint64_t *status_reg; | |
1400 | } SigpInfo; | |
1401 | ||
36b5c845 | 1402 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
b20a461f | 1403 | { |
36b5c845 DH |
1404 | *si->status_reg &= 0xffffffff00000000ULL; |
1405 | *si->status_reg |= status; | |
1406 | si->cc = SIGP_CC_STATUS_STORED; | |
1407 | } | |
6e6ad8db | 1408 | |
0ea3eb65 | 1409 | static void sigp_start(CPUState *cs, run_on_cpu_data arg) |
b20a461f | 1410 | { |
e0eeb4a2 | 1411 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1412 | SigpInfo *si = arg.host_ptr; |
6e6ad8db | 1413 | |
e0eeb4a2 | 1414 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
4f2b55d1 DH |
1415 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
1416 | return; | |
1417 | } | |
1418 | ||
e0eeb4a2 | 1419 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); |
6eb8f212 | 1420 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
b20a461f TH |
1421 | } |
1422 | ||
0ea3eb65 | 1423 | static void sigp_stop(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1424 | { |
e0eeb4a2 | 1425 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1426 | SigpInfo *si = arg.host_ptr; |
18ff9494 DH |
1427 | struct kvm_s390_irq irq = { |
1428 | .type = KVM_S390_SIGP_STOP, | |
1429 | }; | |
1430 | ||
e0eeb4a2 | 1431 | if (s390_cpu_get_state(cpu) != CPU_STATE_OPERATING) { |
18ff9494 DH |
1432 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
1433 | return; | |
1434 | } | |
1435 | ||
1436 | /* disabled wait - sleeping in user space */ | |
e0eeb4a2 AB |
1437 | if (cs->halted) { |
1438 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); | |
18ff9494 DH |
1439 | } else { |
1440 | /* execute the stop function */ | |
e0eeb4a2 AB |
1441 | cpu->env.sigp_order = SIGP_STOP; |
1442 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
18ff9494 DH |
1443 | } |
1444 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1445 | } | |
1446 | ||
abec5356 EF |
1447 | #define ADTL_SAVE_AREA_SIZE 1024 |
1448 | static int kvm_s390_store_adtl_status(S390CPU *cpu, hwaddr addr) | |
1449 | { | |
1450 | void *mem; | |
1451 | hwaddr len = ADTL_SAVE_AREA_SIZE; | |
1452 | ||
1453 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1454 | if (!mem) { | |
1455 | return -EFAULT; | |
1456 | } | |
1457 | if (len != ADTL_SAVE_AREA_SIZE) { | |
1458 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1459 | return -EFAULT; | |
1460 | } | |
1461 | ||
1462 | memcpy(mem, &cpu->env.vregs, 512); | |
1463 | ||
1464 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1465 | ||
1466 | return 0; | |
1467 | } | |
1468 | ||
18ff9494 DH |
1469 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) |
1470 | #define SAVE_AREA_SIZE 512 | |
1471 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1472 | { | |
1473 | static const uint8_t ar_id = 1; | |
1474 | uint64_t ckc = cpu->env.ckc >> 8; | |
1475 | void *mem; | |
c498d8e3 | 1476 | int i; |
18ff9494 DH |
1477 | hwaddr len = SAVE_AREA_SIZE; |
1478 | ||
1479 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1480 | if (!mem) { | |
1481 | return -EFAULT; | |
1482 | } | |
1483 | if (len != SAVE_AREA_SIZE) { | |
1484 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1485 | return -EFAULT; | |
1486 | } | |
1487 | ||
1488 | if (store_arch) { | |
1489 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1490 | } | |
c498d8e3 | 1491 | for (i = 0; i < 16; ++i) { |
182f42fd | 1492 | *((uint64_t *)mem + i) = get_freg(&cpu->env, i)->ll; |
c498d8e3 | 1493 | } |
18ff9494 DH |
1494 | memcpy(mem + 128, &cpu->env.regs, 128); |
1495 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1496 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1497 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1498 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1499 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1500 | memcpy(mem + 304, &ckc, 8); | |
1501 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1502 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1503 | ||
1504 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1505 | ||
1506 | return 0; | |
1507 | } | |
1508 | ||
0ea3eb65 | 1509 | static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg) |
18ff9494 | 1510 | { |
e0eeb4a2 | 1511 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1512 | SigpInfo *si = arg.host_ptr; |
18ff9494 DH |
1513 | struct kvm_s390_irq irq = { |
1514 | .type = KVM_S390_SIGP_STOP, | |
1515 | }; | |
1516 | ||
1517 | /* disabled wait - sleeping in user space */ | |
e0eeb4a2 AB |
1518 | if (s390_cpu_get_state(cpu) == CPU_STATE_OPERATING && cs->halted) { |
1519 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); | |
18ff9494 DH |
1520 | } |
1521 | ||
e0eeb4a2 | 1522 | switch (s390_cpu_get_state(cpu)) { |
18ff9494 | 1523 | case CPU_STATE_OPERATING: |
e0eeb4a2 AB |
1524 | cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; |
1525 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
18ff9494 DH |
1526 | /* store will be performed when handling the stop intercept */ |
1527 | break; | |
1528 | case CPU_STATE_STOPPED: | |
1529 | /* already stopped, just store the status */ | |
e0eeb4a2 AB |
1530 | cpu_synchronize_state(cs); |
1531 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
18ff9494 DH |
1532 | break; |
1533 | } | |
1534 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1535 | } | |
1536 | ||
0ea3eb65 | 1537 | static void sigp_store_status_at_address(CPUState *cs, run_on_cpu_data arg) |
18ff9494 | 1538 | { |
e0eeb4a2 | 1539 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1540 | SigpInfo *si = arg.host_ptr; |
18ff9494 DH |
1541 | uint32_t address = si->param & 0x7ffffe00u; |
1542 | ||
1543 | /* cpu has to be stopped */ | |
e0eeb4a2 | 1544 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
18ff9494 DH |
1545 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); |
1546 | return; | |
1547 | } | |
1548 | ||
e0eeb4a2 | 1549 | cpu_synchronize_state(cs); |
18ff9494 | 1550 | |
e0eeb4a2 | 1551 | if (kvm_s390_store_status(cpu, address, false)) { |
18ff9494 DH |
1552 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); |
1553 | return; | |
1554 | } | |
1555 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1556 | } | |
1557 | ||
0ea3eb65 | 1558 | static void sigp_store_adtl_status(CPUState *cs, run_on_cpu_data arg) |
abec5356 | 1559 | { |
e0eeb4a2 | 1560 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1561 | SigpInfo *si = arg.host_ptr; |
abec5356 | 1562 | |
7c72ac49 | 1563 | if (!s390_has_feat(S390_FEAT_VECTOR)) { |
abec5356 EF |
1564 | set_sigp_status(si, SIGP_STAT_INVALID_ORDER); |
1565 | return; | |
1566 | } | |
1567 | ||
1568 | /* cpu has to be stopped */ | |
e0eeb4a2 | 1569 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
abec5356 EF |
1570 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); |
1571 | return; | |
1572 | } | |
1573 | ||
1574 | /* parameter must be aligned to 1024-byte boundary */ | |
1575 | if (si->param & 0x3ff) { | |
1576 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1577 | return; | |
1578 | } | |
1579 | ||
e0eeb4a2 | 1580 | cpu_synchronize_state(cs); |
abec5356 | 1581 | |
e0eeb4a2 | 1582 | if (kvm_s390_store_adtl_status(cpu, si->param)) { |
abec5356 EF |
1583 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); |
1584 | return; | |
1585 | } | |
1586 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1587 | } | |
1588 | ||
0ea3eb65 | 1589 | static void sigp_restart(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1590 | { |
e0eeb4a2 | 1591 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1592 | SigpInfo *si = arg.host_ptr; |
de13d216 CH |
1593 | struct kvm_s390_irq irq = { |
1594 | .type = KVM_S390_RESTART, | |
1595 | }; | |
1596 | ||
e0eeb4a2 | 1597 | switch (s390_cpu_get_state(cpu)) { |
e3b7b578 DH |
1598 | case CPU_STATE_STOPPED: |
1599 | /* the restart irq has to be delivered prior to any other pending irq */ | |
e0eeb4a2 AB |
1600 | cpu_synchronize_state(cs); |
1601 | do_restart_interrupt(&cpu->env); | |
1602 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); | |
e3b7b578 DH |
1603 | break; |
1604 | case CPU_STATE_OPERATING: | |
e0eeb4a2 | 1605 | kvm_s390_vcpu_interrupt(cpu, &irq); |
e3b7b578 DH |
1606 | break; |
1607 | } | |
6eb8f212 | 1608 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1609 | } |
1610 | ||
1611 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1612 | { | |
e0eeb4a2 | 1613 | SigpInfo si = {}; |
6eb8f212 | 1614 | |
14e6fe12 | 1615 | run_on_cpu(CPU(cpu), sigp_restart, RUN_ON_CPU_HOST_PTR(&si)); |
7f7f9752 | 1616 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1617 | return 0; |
1618 | } | |
1619 | ||
0ea3eb65 | 1620 | static void sigp_initial_cpu_reset(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1621 | { |
e0eeb4a2 AB |
1622 | S390CPU *cpu = S390_CPU(cs); |
1623 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
0ea3eb65 | 1624 | SigpInfo *si = arg.host_ptr; |
d5900813 | 1625 | |
6eb8f212 DH |
1626 | cpu_synchronize_state(cs); |
1627 | scc->initial_cpu_reset(cs); | |
1628 | cpu_synchronize_post_reset(cs); | |
1629 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1630 | } |
1631 | ||
0ea3eb65 | 1632 | static void sigp_cpu_reset(CPUState *cs, run_on_cpu_data arg) |
04c2b516 | 1633 | { |
e0eeb4a2 AB |
1634 | S390CPU *cpu = S390_CPU(cs); |
1635 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
0ea3eb65 | 1636 | SigpInfo *si = arg.host_ptr; |
04c2b516 | 1637 | |
6eb8f212 DH |
1638 | cpu_synchronize_state(cs); |
1639 | scc->cpu_reset(cs); | |
1640 | cpu_synchronize_post_reset(cs); | |
1641 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
04c2b516 TH |
1642 | } |
1643 | ||
0ea3eb65 | 1644 | static void sigp_set_prefix(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1645 | { |
e0eeb4a2 | 1646 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1647 | SigpInfo *si = arg.host_ptr; |
18ff9494 | 1648 | uint32_t addr = si->param & 0x7fffe000u; |
0e60a699 | 1649 | |
e0eeb4a2 | 1650 | cpu_synchronize_state(cs); |
0e60a699 | 1651 | |
18ff9494 DH |
1652 | if (!address_space_access_valid(&address_space_memory, addr, |
1653 | sizeof(struct LowCore), false)) { | |
1654 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1655 | return; | |
1656 | } | |
0e60a699 | 1657 | |
18ff9494 | 1658 | /* cpu has to be stopped */ |
e0eeb4a2 | 1659 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
18ff9494 DH |
1660 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); |
1661 | return; | |
0e60a699 AG |
1662 | } |
1663 | ||
e0eeb4a2 AB |
1664 | cpu->env.psa = addr; |
1665 | cpu_synchronize_post_init(cs); | |
18ff9494 DH |
1666 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
1667 | } | |
1668 | ||
6eb8f212 | 1669 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1670 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1671 | { |
1672 | SigpInfo si = { | |
22740e3f | 1673 | .param = param, |
6eb8f212 DH |
1674 | .status_reg = status_reg, |
1675 | }; | |
1676 | ||
1677 | /* cpu available? */ | |
1678 | if (dst_cpu == NULL) { | |
1679 | return SIGP_CC_NOT_OPERATIONAL; | |
1680 | } | |
1681 | ||
18ff9494 DH |
1682 | /* only resets can break pending orders */ |
1683 | if (dst_cpu->env.sigp_order != 0 && | |
1684 | order != SIGP_CPU_RESET && | |
1685 | order != SIGP_INITIAL_CPU_RESET) { | |
1686 | return SIGP_CC_BUSY; | |
1687 | } | |
1688 | ||
6eb8f212 | 1689 | switch (order) { |
b20a461f | 1690 | case SIGP_START: |
14e6fe12 | 1691 | run_on_cpu(CPU(dst_cpu), sigp_start, RUN_ON_CPU_HOST_PTR(&si)); |
6eb8f212 | 1692 | break; |
18ff9494 | 1693 | case SIGP_STOP: |
14e6fe12 | 1694 | run_on_cpu(CPU(dst_cpu), sigp_stop, RUN_ON_CPU_HOST_PTR(&si)); |
b20a461f | 1695 | break; |
0b9972a2 | 1696 | case SIGP_RESTART: |
14e6fe12 | 1697 | run_on_cpu(CPU(dst_cpu), sigp_restart, RUN_ON_CPU_HOST_PTR(&si)); |
0b9972a2 | 1698 | break; |
18ff9494 | 1699 | case SIGP_STOP_STORE_STATUS: |
14e6fe12 | 1700 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, RUN_ON_CPU_HOST_PTR(&si)); |
18ff9494 DH |
1701 | break; |
1702 | case SIGP_STORE_STATUS_ADDR: | |
14e6fe12 | 1703 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, RUN_ON_CPU_HOST_PTR(&si)); |
18ff9494 | 1704 | break; |
abec5356 | 1705 | case SIGP_STORE_ADTL_STATUS: |
14e6fe12 | 1706 | run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, RUN_ON_CPU_HOST_PTR(&si)); |
abec5356 | 1707 | break; |
18ff9494 | 1708 | case SIGP_SET_PREFIX: |
14e6fe12 | 1709 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, RUN_ON_CPU_HOST_PTR(&si)); |
0788082a | 1710 | break; |
0b9972a2 | 1711 | case SIGP_INITIAL_CPU_RESET: |
14e6fe12 | 1712 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, RUN_ON_CPU_HOST_PTR(&si)); |
0b9972a2 | 1713 | break; |
04c2b516 | 1714 | case SIGP_CPU_RESET: |
14e6fe12 | 1715 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, RUN_ON_CPU_HOST_PTR(&si)); |
04c2b516 | 1716 | break; |
0b9972a2 | 1717 | default: |
6eb8f212 | 1718 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); |
36b5c845 | 1719 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1720 | } |
04c2b516 | 1721 | |
6eb8f212 | 1722 | return si.cc; |
04c2b516 TH |
1723 | } |
1724 | ||
18ff9494 DH |
1725 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1726 | uint64_t *status_reg) | |
1727 | { | |
1728 | CPUState *cur_cs; | |
1729 | S390CPU *cur_cpu; | |
1730 | ||
1731 | /* due to the BQL, we are the only active cpu */ | |
1732 | CPU_FOREACH(cur_cs) { | |
1733 | cur_cpu = S390_CPU(cur_cs); | |
1734 | if (cur_cpu->env.sigp_order != 0) { | |
1735 | return SIGP_CC_BUSY; | |
1736 | } | |
1737 | cpu_synchronize_state(cur_cs); | |
1738 | /* all but the current one have to be stopped */ | |
1739 | if (cur_cpu != cpu && | |
1740 | s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { | |
1741 | *status_reg &= 0xffffffff00000000ULL; | |
1742 | *status_reg |= SIGP_STAT_INCORRECT_STATE; | |
1743 | return SIGP_CC_STATUS_STORED; | |
1744 | } | |
1745 | } | |
1746 | ||
1747 | switch (param & 0xff) { | |
1748 | case SIGP_MODE_ESA_S390: | |
1749 | /* not supported */ | |
1750 | return SIGP_CC_NOT_OPERATIONAL; | |
1751 | case SIGP_MODE_Z_ARCH_TRANS_ALL_PSW: | |
1752 | case SIGP_MODE_Z_ARCH_TRANS_CUR_PSW: | |
1753 | CPU_FOREACH(cur_cs) { | |
1754 | cur_cpu = S390_CPU(cur_cs); | |
1755 | cur_cpu->env.pfault_token = -1UL; | |
1756 | } | |
0b9972a2 | 1757 | break; |
18ff9494 DH |
1758 | default: |
1759 | *status_reg &= 0xffffffff00000000ULL; | |
1760 | *status_reg |= SIGP_STAT_INVALID_PARAMETER; | |
1761 | return SIGP_CC_STATUS_STORED; | |
0e60a699 AG |
1762 | } |
1763 | ||
18ff9494 DH |
1764 | return SIGP_CC_ORDER_CODE_ACCEPTED; |
1765 | } | |
1766 | ||
f7575c96 | 1767 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1768 | { |
f7575c96 | 1769 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1770 | const uint8_t r1 = ipa1 >> 4; |
1771 | const uint8_t r3 = ipa1 & 0x0f; | |
1772 | int ret; | |
1773 | uint8_t order; | |
1774 | uint64_t *status_reg; | |
22740e3f | 1775 | uint64_t param; |
6eb8f212 | 1776 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1777 | |
cb446eca | 1778 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1779 | |
1780 | /* get order code */ | |
6cb1e49d AY |
1781 | order = decode_basedisp_rs(env, run->s390_sieic.ipb, NULL) |
1782 | & SIGP_ORDER_MASK; | |
6eb8f212 | 1783 | status_reg = &env->regs[r1]; |
22740e3f | 1784 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1785 | |
f9530c32 CB |
1786 | if (qemu_mutex_trylock(&qemu_sigp_mutex)) { |
1787 | ret = SIGP_CC_BUSY; | |
1788 | goto out; | |
1789 | } | |
1790 | ||
6eb8f212 | 1791 | switch (order) { |
0b9972a2 | 1792 | case SIGP_SET_ARCH: |
18ff9494 | 1793 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1794 | break; |
0b9972a2 | 1795 | default: |
6eb8f212 DH |
1796 | /* all other sigp orders target a single vcpu */ |
1797 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1798 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 | 1799 | } |
f9530c32 | 1800 | qemu_mutex_unlock(&qemu_sigp_mutex); |
0e60a699 | 1801 | |
f9530c32 | 1802 | out: |
56dba22b DH |
1803 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1804 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1805 | ||
6eb8f212 DH |
1806 | if (ret >= 0) { |
1807 | setcc(cpu, ret); | |
1808 | return 0; | |
1809 | } | |
1810 | ||
1811 | return ret; | |
0e60a699 AG |
1812 | } |
1813 | ||
b30f4dfb | 1814 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1815 | { |
1816 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1817 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1818 | int r = -1; |
0e60a699 | 1819 | |
e67137c6 PM |
1820 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1821 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1822 | switch (ipa0) { |
09b99878 | 1823 | case IPA0_B2: |
1eecf41b FB |
1824 | r = handle_b2(cpu, run, ipa1); |
1825 | break; | |
09b99878 | 1826 | case IPA0_B9: |
1eecf41b FB |
1827 | r = handle_b9(cpu, run, ipa1); |
1828 | break; | |
09b99878 | 1829 | case IPA0_EB: |
80765f07 | 1830 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1831 | break; |
863f6f52 FB |
1832 | case IPA0_E3: |
1833 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1834 | break; | |
09b99878 | 1835 | case IPA0_DIAG: |
638129ff | 1836 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1837 | break; |
1838 | case IPA0_SIGP: | |
1839 | r = handle_sigp(cpu, run, ipa1); | |
1840 | break; | |
0e60a699 AG |
1841 | } |
1842 | ||
1843 | if (r < 0) { | |
b30f4dfb | 1844 | r = 0; |
1bc22652 | 1845 | enter_pgmcheck(cpu, 0x0001); |
0e60a699 | 1846 | } |
b30f4dfb DH |
1847 | |
1848 | return r; | |
0e60a699 AG |
1849 | } |
1850 | ||
f7575c96 | 1851 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1852 | { |
1853 | /* signal quiesce */ | |
f7575c96 | 1854 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1855 | } |
1856 | ||
a2689242 TH |
1857 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) |
1858 | { | |
1859 | CPUState *cs = CPU(cpu); | |
1860 | ||
1861 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1862 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1863 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1864 | s390_cpu_halt(cpu); |
c86f106b | 1865 | qemu_system_guest_panicked(NULL); |
a2689242 TH |
1866 | } |
1867 | ||
409422cd CB |
1868 | /* try to detect pgm check loops */ |
1869 | static int handle_oper_loop(S390CPU *cpu, struct kvm_run *run) | |
1870 | { | |
1871 | CPUState *cs = CPU(cpu); | |
1872 | PSW oldpsw, newpsw; | |
1873 | ||
1874 | cpu_synchronize_state(cs); | |
1875 | newpsw.mask = ldq_phys(cs->as, cpu->env.psa + | |
1876 | offsetof(LowCore, program_new_psw)); | |
1877 | newpsw.addr = ldq_phys(cs->as, cpu->env.psa + | |
1878 | offsetof(LowCore, program_new_psw) + 8); | |
1879 | oldpsw.mask = run->psw_mask; | |
1880 | oldpsw.addr = run->psw_addr; | |
1881 | /* | |
1882 | * Avoid endless loops of operation exceptions, if the pgm new | |
1883 | * PSW will cause a new operation exception. | |
1884 | * The heuristic checks if the pgm new psw is within 6 bytes before | |
1885 | * the faulting psw address (with same DAT, AS settings) and the | |
1886 | * new psw is not a wait psw and the fault was not triggered by | |
1887 | * problem state. In that case go into crashed state. | |
1888 | */ | |
1889 | ||
1890 | if (oldpsw.addr - newpsw.addr <= 6 && | |
1891 | !(newpsw.mask & PSW_MASK_WAIT) && | |
1892 | !(oldpsw.mask & PSW_MASK_PSTATE) && | |
1893 | (newpsw.mask & PSW_MASK_ASC) == (oldpsw.mask & PSW_MASK_ASC) && | |
1894 | (newpsw.mask & PSW_MASK_DAT) == (oldpsw.mask & PSW_MASK_DAT)) { | |
1895 | unmanageable_intercept(cpu, "operation exception loop", | |
1896 | offsetof(LowCore, program_new_psw)); | |
1897 | return EXCP_HALTED; | |
1898 | } | |
1899 | return 0; | |
1900 | } | |
1901 | ||
1bc22652 | 1902 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1903 | { |
f7575c96 AF |
1904 | CPUState *cs = CPU(cpu); |
1905 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1906 | int icpt_code = run->s390_sieic.icptcode; |
1907 | int r = 0; | |
1908 | ||
e67137c6 | 1909 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1910 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1911 | switch (icpt_code) { |
1912 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1913 | r = handle_instruction(cpu, run); |
0e60a699 | 1914 | break; |
6449a41a TH |
1915 | case ICPT_PROGRAM: |
1916 | unmanageable_intercept(cpu, "program interrupt", | |
1917 | offsetof(LowCore, program_new_psw)); | |
1918 | r = EXCP_HALTED; | |
1919 | break; | |
a2689242 TH |
1920 | case ICPT_EXT_INT: |
1921 | unmanageable_intercept(cpu, "external interrupt", | |
1922 | offsetof(LowCore, external_new_psw)); | |
1923 | r = EXCP_HALTED; | |
1924 | break; | |
0e60a699 | 1925 | case ICPT_WAITPSW: |
08eb8c85 | 1926 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
1927 | cpu_synchronize_state(cs); |
1928 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 | 1929 | if (is_special_wait_psw(cs)) { |
cf83f140 | 1930 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
08eb8c85 | 1931 | } else { |
c86f106b | 1932 | qemu_system_guest_panicked(NULL); |
08eb8c85 | 1933 | } |
eca3ed03 CB |
1934 | } |
1935 | r = EXCP_HALTED; | |
1936 | break; | |
854e42f3 | 1937 | case ICPT_CPU_STOP: |
eb24f7c6 | 1938 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
cf83f140 | 1939 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
854e42f3 | 1940 | } |
18ff9494 DH |
1941 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
1942 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
1943 | true); | |
1944 | } | |
1945 | cpu->env.sigp_order = 0; | |
854e42f3 | 1946 | r = EXCP_HALTED; |
0e60a699 | 1947 | break; |
b60fae32 | 1948 | case ICPT_OPEREXC: |
409422cd | 1949 | /* check for break points */ |
b60fae32 DH |
1950 | r = handle_sw_breakpoint(cpu, run); |
1951 | if (r == -ENOENT) { | |
409422cd CB |
1952 | /* Then check for potential pgm check loops */ |
1953 | r = handle_oper_loop(cpu, run); | |
1954 | if (r == 0) { | |
1955 | enter_pgmcheck(cpu, PGM_OPERATION); | |
1956 | } | |
b60fae32 DH |
1957 | } |
1958 | break; | |
0e60a699 AG |
1959 | case ICPT_SOFT_INTERCEPT: |
1960 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
1961 | exit(1); | |
1962 | break; | |
0e60a699 AG |
1963 | case ICPT_IO: |
1964 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
1965 | exit(1); | |
1966 | break; | |
1967 | default: | |
1968 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
1969 | exit(1); | |
1970 | break; | |
1971 | } | |
1972 | ||
1973 | return r; | |
1974 | } | |
1975 | ||
09b99878 CH |
1976 | static int handle_tsch(S390CPU *cpu) |
1977 | { | |
09b99878 CH |
1978 | CPUState *cs = CPU(cpu); |
1979 | struct kvm_run *run = cs->kvm_run; | |
1980 | int ret; | |
1981 | ||
44c68de0 | 1982 | cpu_synchronize_state(cs); |
3474b679 | 1983 | |
653b0809 TH |
1984 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
1985 | if (ret < 0) { | |
09b99878 CH |
1986 | /* |
1987 | * Failure. | |
1988 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
1989 | */ | |
1990 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
1991 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
1992 | run->s390_tsch.subchannel_nr, | |
1993 | run->s390_tsch.io_int_parm, | |
1994 | run->s390_tsch.io_int_word); | |
09b99878 CH |
1995 | } |
1996 | ret = 0; | |
1997 | } | |
1998 | return ret; | |
1999 | } | |
2000 | ||
6cb1e49d | 2001 | static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr, uint8_t ar) |
f07177a5 ET |
2002 | { |
2003 | struct sysib_322 sysib; | |
2004 | int del; | |
2005 | ||
6cb1e49d | 2006 | if (s390_cpu_virt_mem_read(cpu, addr, ar, &sysib, sizeof(sysib))) { |
f07177a5 ET |
2007 | return; |
2008 | } | |
2009 | /* Shift the stack of Extended Names to prepare for our own data */ | |
2010 | memmove(&sysib.ext_names[1], &sysib.ext_names[0], | |
2011 | sizeof(sysib.ext_names[0]) * (sysib.count - 1)); | |
2012 | /* First virt level, that doesn't provide Ext Names delimits stack. It is | |
2013 | * assumed it's not capable of managing Extended Names for lower levels. | |
2014 | */ | |
2015 | for (del = 1; del < sysib.count; del++) { | |
2016 | if (!sysib.vm[del].ext_name_encoding || !sysib.ext_names[del][0]) { | |
2017 | break; | |
2018 | } | |
2019 | } | |
2020 | if (del < sysib.count) { | |
2021 | memset(sysib.ext_names[del], 0, | |
2022 | sizeof(sysib.ext_names[0]) * (sysib.count - del)); | |
2023 | } | |
2024 | /* Insert short machine name in EBCDIC, padded with blanks */ | |
2025 | if (qemu_name) { | |
2026 | memset(sysib.vm[0].name, 0x40, sizeof(sysib.vm[0].name)); | |
2027 | ebcdic_put(sysib.vm[0].name, qemu_name, MIN(sizeof(sysib.vm[0].name), | |
2028 | strlen(qemu_name))); | |
2029 | } | |
2030 | sysib.vm[0].ext_name_encoding = 2; /* 2 = UTF-8 */ | |
2031 | memset(sysib.ext_names[0], 0, sizeof(sysib.ext_names[0])); | |
2032 | /* If hypervisor specifies zero Extended Name in STSI322 SYSIB, it's | |
2033 | * considered by s390 as not capable of providing any Extended Name. | |
2034 | * Therefore if no name was specified on qemu invocation, we go with the | |
2035 | * same "KVMguest" default, which KVM has filled into short name field. | |
2036 | */ | |
2037 | if (qemu_name) { | |
2038 | strncpy((char *)sysib.ext_names[0], qemu_name, | |
2039 | sizeof(sysib.ext_names[0])); | |
2040 | } else { | |
2041 | strcpy((char *)sysib.ext_names[0], "KVMguest"); | |
2042 | } | |
2043 | /* Insert UUID */ | |
794afd70 | 2044 | memcpy(sysib.vm[0].uuid, &qemu_uuid, sizeof(sysib.vm[0].uuid)); |
f07177a5 | 2045 | |
6cb1e49d | 2046 | s390_cpu_virt_mem_write(cpu, addr, ar, &sysib, sizeof(sysib)); |
f07177a5 ET |
2047 | } |
2048 | ||
2049 | static int handle_stsi(S390CPU *cpu) | |
2050 | { | |
2051 | CPUState *cs = CPU(cpu); | |
2052 | struct kvm_run *run = cs->kvm_run; | |
2053 | ||
2054 | switch (run->s390_stsi.fc) { | |
2055 | case 3: | |
2056 | if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) { | |
2057 | return 0; | |
2058 | } | |
2059 | /* Only sysib 3.2.2 needs post-handling for now. */ | |
6cb1e49d | 2060 | insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); |
f07177a5 ET |
2061 | return 0; |
2062 | default: | |
2063 | return 0; | |
2064 | } | |
2065 | } | |
2066 | ||
8c012449 DH |
2067 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
2068 | { | |
770a6379 DH |
2069 | CPUState *cs = CPU(cpu); |
2070 | struct kvm_run *run = cs->kvm_run; | |
2071 | ||
2072 | int ret = 0; | |
2073 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
2074 | ||
2075 | switch (arch_info->type) { | |
2076 | case KVM_HW_WP_WRITE: | |
2077 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
2078 | cs->watchpoint_hit = &hw_watchpoint; | |
2079 | hw_watchpoint.vaddr = arch_info->addr; | |
2080 | hw_watchpoint.flags = BP_MEM_WRITE; | |
2081 | ret = EXCP_DEBUG; | |
2082 | } | |
2083 | break; | |
2084 | case KVM_HW_BP: | |
2085 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
2086 | ret = EXCP_DEBUG; | |
2087 | } | |
2088 | break; | |
2089 | case KVM_SINGLESTEP: | |
2090 | if (cs->singlestep_enabled) { | |
2091 | ret = EXCP_DEBUG; | |
2092 | } | |
2093 | break; | |
2094 | default: | |
2095 | ret = -ENOSYS; | |
2096 | } | |
2097 | ||
2098 | return ret; | |
8c012449 DH |
2099 | } |
2100 | ||
20d695a9 | 2101 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 2102 | { |
20d695a9 | 2103 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
2104 | int ret = 0; |
2105 | ||
4b8523ee JK |
2106 | qemu_mutex_lock_iothread(); |
2107 | ||
0e60a699 AG |
2108 | switch (run->exit_reason) { |
2109 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 2110 | ret = handle_intercept(cpu); |
0e60a699 AG |
2111 | break; |
2112 | case KVM_EXIT_S390_RESET: | |
e91e972c | 2113 | s390_reipl_request(); |
0e60a699 | 2114 | break; |
09b99878 CH |
2115 | case KVM_EXIT_S390_TSCH: |
2116 | ret = handle_tsch(cpu); | |
2117 | break; | |
f07177a5 ET |
2118 | case KVM_EXIT_S390_STSI: |
2119 | ret = handle_stsi(cpu); | |
2120 | break; | |
8c012449 DH |
2121 | case KVM_EXIT_DEBUG: |
2122 | ret = kvm_arch_handle_debug_exit(cpu); | |
2123 | break; | |
0e60a699 AG |
2124 | default: |
2125 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
2126 | break; | |
2127 | } | |
4b8523ee | 2128 | qemu_mutex_unlock_iothread(); |
0e60a699 | 2129 | |
bb4ea393 JK |
2130 | if (ret == 0) { |
2131 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 2132 | } |
0e60a699 AG |
2133 | return ret; |
2134 | } | |
4513d923 | 2135 | |
20d695a9 | 2136 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
2137 | { |
2138 | return true; | |
2139 | } | |
a1b87fe0 | 2140 | |
de13d216 | 2141 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
2142 | uint16_t subchannel_nr, uint32_t io_int_parm, |
2143 | uint32_t io_int_word) | |
2144 | { | |
de13d216 CH |
2145 | struct kvm_s390_irq irq = { |
2146 | .u.io.subchannel_id = subchannel_id, | |
2147 | .u.io.subchannel_nr = subchannel_nr, | |
2148 | .u.io.io_int_parm = io_int_parm, | |
2149 | .u.io.io_int_word = io_int_word, | |
2150 | }; | |
09b99878 | 2151 | |
7e749462 | 2152 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 2153 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 2154 | } else { |
393ad2a4 CB |
2155 | irq.type = KVM_S390_INT_IO(0, (subchannel_id & 0xff00) >> 8, |
2156 | (subchannel_id & 0x0006), | |
2157 | subchannel_nr); | |
7e749462 | 2158 | } |
de13d216 | 2159 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
2160 | } |
2161 | ||
b080364a CH |
2162 | static uint64_t build_channel_report_mcic(void) |
2163 | { | |
2164 | uint64_t mcic; | |
2165 | ||
2166 | /* subclass: indicate channel report pending */ | |
2167 | mcic = MCIC_SC_CP | | |
2168 | /* subclass modifiers: none */ | |
2169 | /* storage errors: none */ | |
2170 | /* validity bits: no damage */ | |
2171 | MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP | | |
2172 | MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR | | |
2173 | MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC; | |
7c72ac49 | 2174 | if (s390_has_feat(S390_FEAT_VECTOR)) { |
b080364a CH |
2175 | mcic |= MCIC_VB_VR; |
2176 | } | |
2177 | return mcic; | |
2178 | } | |
2179 | ||
de13d216 | 2180 | void kvm_s390_crw_mchk(void) |
09b99878 | 2181 | { |
de13d216 CH |
2182 | struct kvm_s390_irq irq = { |
2183 | .type = KVM_S390_MCHK, | |
2184 | .u.mchk.cr14 = 1 << 28, | |
b080364a | 2185 | .u.mchk.mcic = build_channel_report_mcic(), |
de13d216 CH |
2186 | }; |
2187 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
2188 | } |
2189 | ||
2190 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
2191 | { | |
09b99878 CH |
2192 | int r; |
2193 | ||
2194 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 2195 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
2196 | assert(r == 0); |
2197 | } | |
48475e14 AK |
2198 | |
2199 | void kvm_arch_init_irq_routing(KVMState *s) | |
2200 | { | |
d426d9fb CH |
2201 | /* |
2202 | * Note that while irqchip capabilities generally imply that cpustates | |
2203 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
2204 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
2205 | */ | |
2206 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
2207 | kvm_gsi_routing_allowed = true; |
2208 | kvm_halt_in_kernel_allowed = false; | |
2209 | } | |
48475e14 | 2210 | } |
b4436a0b | 2211 | |
cc3ac9c4 CH |
2212 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
2213 | int vq, bool assign) | |
b4436a0b CH |
2214 | { |
2215 | struct kvm_ioeventfd kick = { | |
2216 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
2217 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 2218 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
2219 | .datamatch = vq, |
2220 | .addr = sch, | |
2221 | .len = 8, | |
2222 | }; | |
2223 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
2224 | return -ENOSYS; | |
2225 | } | |
2226 | if (!assign) { | |
2227 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
2228 | } | |
2229 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
2230 | } | |
1def6656 MR |
2231 | |
2232 | int kvm_s390_get_memslot_count(KVMState *s) | |
2233 | { | |
2234 | return kvm_check_extension(s, KVM_CAP_NR_MEMSLOTS); | |
2235 | } | |
c9e659c9 | 2236 | |
9700230b FZ |
2237 | int kvm_s390_get_ri(void) |
2238 | { | |
2239 | return cap_ri; | |
2240 | } | |
2241 | ||
c9e659c9 DH |
2242 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) |
2243 | { | |
2244 | struct kvm_mp_state mp_state = {}; | |
2245 | int ret; | |
2246 | ||
2247 | /* the kvm part might not have been initialized yet */ | |
2248 | if (CPU(cpu)->kvm_state == NULL) { | |
2249 | return 0; | |
2250 | } | |
2251 | ||
2252 | switch (cpu_state) { | |
2253 | case CPU_STATE_STOPPED: | |
2254 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
2255 | break; | |
2256 | case CPU_STATE_CHECK_STOP: | |
2257 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
2258 | break; | |
2259 | case CPU_STATE_OPERATING: | |
2260 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
2261 | break; | |
2262 | case CPU_STATE_LOAD: | |
2263 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
2264 | break; | |
2265 | default: | |
2266 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
2267 | cpu_state); | |
2268 | exit(1); | |
2269 | } | |
2270 | ||
2271 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
2272 | if (ret) { | |
2273 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
2274 | strerror(-ret)); | |
2275 | } | |
2276 | ||
2277 | return ret; | |
2278 | } | |
9e03a040 | 2279 | |
3cda44f7 JF |
2280 | void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu) |
2281 | { | |
2282 | struct kvm_s390_irq_state irq_state; | |
2283 | CPUState *cs = CPU(cpu); | |
2284 | int32_t bytes; | |
2285 | ||
2286 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { | |
2287 | return; | |
2288 | } | |
2289 | ||
2290 | irq_state.buf = (uint64_t) cpu->irqstate; | |
2291 | irq_state.len = VCPU_IRQ_BUF_SIZE; | |
2292 | ||
2293 | bytes = kvm_vcpu_ioctl(cs, KVM_S390_GET_IRQ_STATE, &irq_state); | |
2294 | if (bytes < 0) { | |
2295 | cpu->irqstate_saved_size = 0; | |
2296 | error_report("Migration of interrupt state failed"); | |
2297 | return; | |
2298 | } | |
2299 | ||
2300 | cpu->irqstate_saved_size = bytes; | |
2301 | } | |
2302 | ||
2303 | int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu) | |
2304 | { | |
2305 | CPUState *cs = CPU(cpu); | |
2306 | struct kvm_s390_irq_state irq_state; | |
2307 | int r; | |
2308 | ||
b853d4cb SS |
2309 | if (cpu->irqstate_saved_size == 0) { |
2310 | return 0; | |
2311 | } | |
2312 | ||
3cda44f7 JF |
2313 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { |
2314 | return -ENOSYS; | |
2315 | } | |
2316 | ||
3cda44f7 JF |
2317 | irq_state.buf = (uint64_t) cpu->irqstate; |
2318 | irq_state.len = cpu->irqstate_saved_size; | |
2319 | ||
2320 | r = kvm_vcpu_ioctl(cs, KVM_S390_SET_IRQ_STATE, &irq_state); | |
2321 | if (r) { | |
2322 | error_report("Setting interrupt state failed %d", r); | |
2323 | } | |
2324 | return r; | |
2325 | } | |
2326 | ||
9e03a040 | 2327 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
dc9f06ca | 2328 | uint64_t address, uint32_t data, PCIDevice *dev) |
9e03a040 FB |
2329 | { |
2330 | S390PCIBusDevice *pbdev; | |
cdd85eb2 | 2331 | uint32_t idx = data >> ZPCI_MSI_VEC_BITS; |
9e03a040 FB |
2332 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; |
2333 | ||
a975a24a | 2334 | pbdev = s390_pci_find_dev_by_idx(s390_get_phb(), idx); |
9e03a040 FB |
2335 | if (!pbdev) { |
2336 | DPRINTF("add_msi_route no dev\n"); | |
2337 | return -ENODEV; | |
2338 | } | |
2339 | ||
2340 | pbdev->routes.adapter.ind_offset = vec; | |
2341 | ||
2342 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
2343 | route->flags = 0; | |
2344 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
2345 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
2346 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
2347 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
2348 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
2349 | return 0; | |
2350 | } | |
1850b6b7 | 2351 | |
38d87493 PX |
2352 | int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, |
2353 | int vector, PCIDevice *dev) | |
2354 | { | |
2355 | return 0; | |
2356 | } | |
2357 | ||
2358 | int kvm_arch_release_virq_post(int virq) | |
2359 | { | |
2360 | return 0; | |
2361 | } | |
2362 | ||
1850b6b7 EA |
2363 | int kvm_arch_msi_data_to_gsi(uint32_t data) |
2364 | { | |
2365 | abort(); | |
2366 | } | |
3b84c25c DH |
2367 | |
2368 | static inline int test_bit_inv(long nr, const unsigned long *addr) | |
2369 | { | |
2370 | return test_bit(BE_BIT_NR(nr), addr); | |
2371 | } | |
2372 | ||
2373 | static inline void set_bit_inv(long nr, unsigned long *addr) | |
2374 | { | |
2375 | set_bit(BE_BIT_NR(nr), addr); | |
2376 | } | |
2377 | ||
2378 | static int query_cpu_subfunc(S390FeatBitmap features) | |
2379 | { | |
2380 | struct kvm_s390_vm_cpu_subfunc prop; | |
2381 | struct kvm_device_attr attr = { | |
2382 | .group = KVM_S390_VM_CPU_MODEL, | |
2383 | .attr = KVM_S390_VM_CPU_MACHINE_SUBFUNC, | |
2384 | .addr = (uint64_t) &prop, | |
2385 | }; | |
2386 | int rc; | |
2387 | ||
2388 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2389 | if (rc) { | |
2390 | return rc; | |
2391 | } | |
2392 | ||
2393 | /* | |
2394 | * We're going to add all subfunctions now, if the corresponding feature | |
2395 | * is available that unlocks the query functions. | |
2396 | */ | |
2397 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PLO, prop.plo); | |
2398 | if (test_bit(S390_FEAT_TOD_CLOCK_STEERING, features)) { | |
2399 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PTFF, prop.ptff); | |
2400 | } | |
2401 | if (test_bit(S390_FEAT_MSA, features)) { | |
2402 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMAC, prop.kmac); | |
2403 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMC, prop.kmc); | |
2404 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KM, prop.km); | |
2405 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KIMD, prop.kimd); | |
2406 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KLMD, prop.klmd); | |
2407 | } | |
2408 | if (test_bit(S390_FEAT_MSA_EXT_3, features)) { | |
2409 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PCKMO, prop.pckmo); | |
2410 | } | |
2411 | if (test_bit(S390_FEAT_MSA_EXT_4, features)) { | |
2412 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMCTR, prop.kmctr); | |
2413 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMF, prop.kmf); | |
2414 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMO, prop.kmo); | |
2415 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PCC, prop.pcc); | |
2416 | } | |
2417 | if (test_bit(S390_FEAT_MSA_EXT_5, features)) { | |
2418 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PPNO, prop.ppno); | |
2419 | } | |
2420 | return 0; | |
2421 | } | |
2422 | ||
2423 | static int configure_cpu_subfunc(const S390FeatBitmap features) | |
2424 | { | |
2425 | struct kvm_s390_vm_cpu_subfunc prop = {}; | |
2426 | struct kvm_device_attr attr = { | |
2427 | .group = KVM_S390_VM_CPU_MODEL, | |
2428 | .attr = KVM_S390_VM_CPU_PROCESSOR_SUBFUNC, | |
2429 | .addr = (uint64_t) &prop, | |
2430 | }; | |
2431 | ||
2432 | if (!kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2433 | KVM_S390_VM_CPU_PROCESSOR_SUBFUNC)) { | |
2434 | /* hardware support might be missing, IBC will handle most of this */ | |
2435 | return 0; | |
2436 | } | |
2437 | ||
2438 | s390_fill_feat_block(features, S390_FEAT_TYPE_PLO, prop.plo); | |
2439 | if (test_bit(S390_FEAT_TOD_CLOCK_STEERING, features)) { | |
2440 | s390_fill_feat_block(features, S390_FEAT_TYPE_PTFF, prop.ptff); | |
2441 | prop.ptff[0] |= 0x80; /* query is always available */ | |
2442 | } | |
2443 | if (test_bit(S390_FEAT_MSA, features)) { | |
2444 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMAC, prop.kmac); | |
2445 | prop.kmac[0] |= 0x80; /* query is always available */ | |
2446 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMC, prop.kmc); | |
2447 | prop.kmc[0] |= 0x80; /* query is always available */ | |
2448 | s390_fill_feat_block(features, S390_FEAT_TYPE_KM, prop.km); | |
2449 | prop.km[0] |= 0x80; /* query is always available */ | |
2450 | s390_fill_feat_block(features, S390_FEAT_TYPE_KIMD, prop.kimd); | |
2451 | prop.kimd[0] |= 0x80; /* query is always available */ | |
2452 | s390_fill_feat_block(features, S390_FEAT_TYPE_KLMD, prop.klmd); | |
2453 | prop.klmd[0] |= 0x80; /* query is always available */ | |
2454 | } | |
2455 | if (test_bit(S390_FEAT_MSA_EXT_3, features)) { | |
2456 | s390_fill_feat_block(features, S390_FEAT_TYPE_PCKMO, prop.pckmo); | |
2457 | prop.pckmo[0] |= 0x80; /* query is always available */ | |
2458 | } | |
2459 | if (test_bit(S390_FEAT_MSA_EXT_4, features)) { | |
2460 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMCTR, prop.kmctr); | |
2461 | prop.kmctr[0] |= 0x80; /* query is always available */ | |
2462 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMF, prop.kmf); | |
2463 | prop.kmf[0] |= 0x80; /* query is always available */ | |
2464 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMO, prop.kmo); | |
2465 | prop.kmo[0] |= 0x80; /* query is always available */ | |
2466 | s390_fill_feat_block(features, S390_FEAT_TYPE_PCC, prop.pcc); | |
2467 | prop.pcc[0] |= 0x80; /* query is always available */ | |
2468 | } | |
2469 | if (test_bit(S390_FEAT_MSA_EXT_5, features)) { | |
2470 | s390_fill_feat_block(features, S390_FEAT_TYPE_PPNO, prop.ppno); | |
2471 | prop.ppno[0] |= 0x80; /* query is always available */ | |
2472 | } | |
2473 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2474 | } | |
2475 | ||
2476 | static int kvm_to_feat[][2] = { | |
2477 | { KVM_S390_VM_CPU_FEAT_ESOP, S390_FEAT_ESOP }, | |
2478 | { KVM_S390_VM_CPU_FEAT_SIEF2, S390_FEAT_SIE_F2 }, | |
2479 | { KVM_S390_VM_CPU_FEAT_64BSCAO , S390_FEAT_SIE_64BSCAO }, | |
2480 | { KVM_S390_VM_CPU_FEAT_SIIF, S390_FEAT_SIE_SIIF }, | |
2481 | { KVM_S390_VM_CPU_FEAT_GPERE, S390_FEAT_SIE_GPERE }, | |
2482 | { KVM_S390_VM_CPU_FEAT_GSLS, S390_FEAT_SIE_GSLS }, | |
2483 | { KVM_S390_VM_CPU_FEAT_IB, S390_FEAT_SIE_IB }, | |
2484 | { KVM_S390_VM_CPU_FEAT_CEI, S390_FEAT_SIE_CEI }, | |
2485 | { KVM_S390_VM_CPU_FEAT_IBS, S390_FEAT_SIE_IBS }, | |
2486 | { KVM_S390_VM_CPU_FEAT_SKEY, S390_FEAT_SIE_SKEY }, | |
2487 | { KVM_S390_VM_CPU_FEAT_CMMA, S390_FEAT_SIE_CMMA }, | |
2488 | { KVM_S390_VM_CPU_FEAT_PFMFI, S390_FEAT_SIE_PFMFI}, | |
2489 | { KVM_S390_VM_CPU_FEAT_SIGPIF, S390_FEAT_SIE_SIGPIF}, | |
2490 | }; | |
2491 | ||
2492 | static int query_cpu_feat(S390FeatBitmap features) | |
2493 | { | |
2494 | struct kvm_s390_vm_cpu_feat prop; | |
2495 | struct kvm_device_attr attr = { | |
2496 | .group = KVM_S390_VM_CPU_MODEL, | |
2497 | .attr = KVM_S390_VM_CPU_MACHINE_FEAT, | |
2498 | .addr = (uint64_t) &prop, | |
2499 | }; | |
2500 | int rc; | |
2501 | int i; | |
2502 | ||
2503 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2504 | if (rc) { | |
2505 | return rc; | |
2506 | } | |
2507 | ||
2508 | for (i = 0; i < ARRAY_SIZE(kvm_to_feat); i++) { | |
2509 | if (test_bit_inv(kvm_to_feat[i][0], (unsigned long *)prop.feat)) { | |
2510 | set_bit(kvm_to_feat[i][1], features); | |
2511 | } | |
2512 | } | |
2513 | return 0; | |
2514 | } | |
2515 | ||
2516 | static int configure_cpu_feat(const S390FeatBitmap features) | |
2517 | { | |
2518 | struct kvm_s390_vm_cpu_feat prop = {}; | |
2519 | struct kvm_device_attr attr = { | |
2520 | .group = KVM_S390_VM_CPU_MODEL, | |
2521 | .attr = KVM_S390_VM_CPU_PROCESSOR_FEAT, | |
2522 | .addr = (uint64_t) &prop, | |
2523 | }; | |
2524 | int i; | |
2525 | ||
2526 | for (i = 0; i < ARRAY_SIZE(kvm_to_feat); i++) { | |
2527 | if (test_bit(kvm_to_feat[i][1], features)) { | |
2528 | set_bit_inv(kvm_to_feat[i][0], (unsigned long *)prop.feat); | |
2529 | } | |
2530 | } | |
2531 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2532 | } | |
2533 | ||
2534 | bool kvm_s390_cpu_models_supported(void) | |
2535 | { | |
e73316d5 | 2536 | if (!cpu_model_allowed()) { |
34821036 DH |
2537 | /* compatibility machines interfere with the cpu model */ |
2538 | return false; | |
2539 | } | |
3b84c25c DH |
2540 | return kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, |
2541 | KVM_S390_VM_CPU_MACHINE) && | |
2542 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2543 | KVM_S390_VM_CPU_PROCESSOR) && | |
2544 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2545 | KVM_S390_VM_CPU_MACHINE_FEAT) && | |
2546 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2547 | KVM_S390_VM_CPU_PROCESSOR_FEAT) && | |
2548 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2549 | KVM_S390_VM_CPU_MACHINE_SUBFUNC); | |
2550 | } | |
2551 | ||
2552 | void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp) | |
2553 | { | |
2554 | struct kvm_s390_vm_cpu_machine prop = {}; | |
2555 | struct kvm_device_attr attr = { | |
2556 | .group = KVM_S390_VM_CPU_MODEL, | |
2557 | .attr = KVM_S390_VM_CPU_MACHINE, | |
2558 | .addr = (uint64_t) &prop, | |
2559 | }; | |
2560 | uint16_t unblocked_ibc = 0, cpu_type = 0; | |
2561 | int rc; | |
2562 | ||
2563 | memset(model, 0, sizeof(*model)); | |
2564 | ||
2565 | if (!kvm_s390_cpu_models_supported()) { | |
2566 | error_setg(errp, "KVM doesn't support CPU models"); | |
2567 | return; | |
2568 | } | |
2569 | ||
2570 | /* query the basic cpu model properties */ | |
2571 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2572 | if (rc) { | |
2573 | error_setg(errp, "KVM: Error querying host CPU model: %d", rc); | |
2574 | return; | |
2575 | } | |
2576 | ||
2577 | cpu_type = cpuid_type(prop.cpuid); | |
2578 | if (has_ibc(prop.ibc)) { | |
2579 | model->lowest_ibc = lowest_ibc(prop.ibc); | |
2580 | unblocked_ibc = unblocked_ibc(prop.ibc); | |
2581 | } | |
2582 | model->cpu_id = cpuid_id(prop.cpuid); | |
2583 | model->cpu_ver = 0xff; | |
2584 | ||
2585 | /* get supported cpu features indicated via STFL(E) */ | |
2586 | s390_add_from_feat_block(model->features, S390_FEAT_TYPE_STFL, | |
2587 | (uint8_t *) prop.fac_mask); | |
2588 | /* dat-enhancement facility 2 has no bit but was introduced with stfle */ | |
2589 | if (test_bit(S390_FEAT_STFLE, model->features)) { | |
2590 | set_bit(S390_FEAT_DAT_ENH_2, model->features); | |
2591 | } | |
2592 | /* get supported cpu features indicated e.g. via SCLP */ | |
2593 | rc = query_cpu_feat(model->features); | |
2594 | if (rc) { | |
2595 | error_setg(errp, "KVM: Error querying CPU features: %d", rc); | |
2596 | return; | |
2597 | } | |
2598 | /* get supported cpu subfunctions indicated via query / test bit */ | |
2599 | rc = query_cpu_subfunc(model->features); | |
2600 | if (rc) { | |
2601 | error_setg(errp, "KVM: Error querying CPU subfunctions: %d", rc); | |
2602 | return; | |
2603 | } | |
2604 | ||
07059eff DH |
2605 | /* with cpu model support, CMM is only indicated if really available */ |
2606 | if (kvm_s390_cmma_available()) { | |
2607 | set_bit(S390_FEAT_CMM, model->features); | |
2608 | } | |
2609 | ||
3b84c25c DH |
2610 | if (s390_known_cpu_type(cpu_type)) { |
2611 | /* we want the exact model, even if some features are missing */ | |
2612 | model->def = s390_find_cpu_def(cpu_type, ibc_gen(unblocked_ibc), | |
2613 | ibc_ec_ga(unblocked_ibc), NULL); | |
2614 | } else { | |
2615 | /* model unknown, e.g. too new - search using features */ | |
2616 | model->def = s390_find_cpu_def(0, ibc_gen(unblocked_ibc), | |
2617 | ibc_ec_ga(unblocked_ibc), | |
2618 | model->features); | |
2619 | } | |
2620 | if (!model->def) { | |
2621 | error_setg(errp, "KVM: host CPU model could not be identified"); | |
2622 | return; | |
2623 | } | |
2624 | /* strip of features that are not part of the maximum model */ | |
2625 | bitmap_and(model->features, model->features, model->def->full_feat, | |
2626 | S390_FEAT_MAX); | |
2627 | } | |
2628 | ||
2629 | void kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp) | |
2630 | { | |
2631 | struct kvm_s390_vm_cpu_processor prop = { | |
2632 | .fac_list = { 0 }, | |
2633 | }; | |
2634 | struct kvm_device_attr attr = { | |
2635 | .group = KVM_S390_VM_CPU_MODEL, | |
2636 | .attr = KVM_S390_VM_CPU_PROCESSOR, | |
2637 | .addr = (uint64_t) &prop, | |
2638 | }; | |
2639 | int rc; | |
2640 | ||
2641 | if (!model) { | |
07059eff DH |
2642 | /* compatibility handling if cpu models are disabled */ |
2643 | if (kvm_s390_cmma_available() && !mem_path) { | |
2644 | kvm_s390_enable_cmma(); | |
2645 | } | |
3b84c25c DH |
2646 | return; |
2647 | } | |
2648 | if (!kvm_s390_cpu_models_supported()) { | |
2649 | error_setg(errp, "KVM doesn't support CPU models"); | |
2650 | return; | |
2651 | } | |
2652 | prop.cpuid = s390_cpuid_from_cpu_model(model); | |
2653 | prop.ibc = s390_ibc_from_cpu_model(model); | |
2654 | /* configure cpu features indicated via STFL(e) */ | |
2655 | s390_fill_feat_block(model->features, S390_FEAT_TYPE_STFL, | |
2656 | (uint8_t *) prop.fac_list); | |
2657 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2658 | if (rc) { | |
2659 | error_setg(errp, "KVM: Error configuring the CPU model: %d", rc); | |
2660 | return; | |
2661 | } | |
2662 | /* configure cpu features indicated e.g. via SCLP */ | |
2663 | rc = configure_cpu_feat(model->features); | |
2664 | if (rc) { | |
2665 | error_setg(errp, "KVM: Error configuring CPU features: %d", rc); | |
2666 | return; | |
2667 | } | |
2668 | /* configure cpu subfunctions indicated via query / test bit */ | |
2669 | rc = configure_cpu_subfunc(model->features); | |
2670 | if (rc) { | |
2671 | error_setg(errp, "KVM: Error configuring CPU subfunctions: %d", rc); | |
2672 | return; | |
2673 | } | |
07059eff DH |
2674 | /* enable CMM via CMMA - disable on hugetlbfs */ |
2675 | if (test_bit(S390_FEAT_CMM, model->features)) { | |
2676 | if (mem_path) { | |
2677 | error_report("Warning: CMM will not be enabled because it is not " | |
2678 | "compatible to hugetlbfs."); | |
2679 | } else { | |
2680 | kvm_s390_enable_cmma(); | |
2681 | } | |
2682 | } | |
3b84c25c | 2683 | } |