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0e60a699 AG |
1 | /* |
2 | * QEMU S390x KVM implementation | |
3 | * | |
4 | * Copyright (c) 2009 Alexander Graf <agraf@suse.de> | |
ccb084d3 | 5 | * Copyright IBM Corp. 2012 |
0e60a699 AG |
6 | * |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
ccb084d3 CB |
17 | * Contributions after 2012-10-29 are licensed under the terms of the |
18 | * GNU GPL, version 2 or (at your option) any later version. | |
19 | * | |
20 | * You should have received a copy of the GNU (Lesser) General Public | |
0e60a699 AG |
21 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
22 | */ | |
23 | ||
9615495a | 24 | #include "qemu/osdep.h" |
0e60a699 | 25 | #include <sys/ioctl.h> |
0e60a699 AG |
26 | |
27 | #include <linux/kvm.h> | |
28 | #include <asm/ptrace.h> | |
29 | ||
30 | #include "qemu-common.h" | |
33c11879 | 31 | #include "cpu.h" |
d49b6836 | 32 | #include "qemu/error-report.h" |
1de7afc9 | 33 | #include "qemu/timer.h" |
9c17d615 | 34 | #include "sysemu/sysemu.h" |
8195d899 | 35 | #include "sysemu/hw_accel.h" |
4cb88c3c | 36 | #include "hw/hw.h" |
9c17d615 | 37 | #include "sysemu/device_tree.h" |
08eb8c85 | 38 | #include "qapi/qmp/qjson.h" |
770a6379 | 39 | #include "exec/gdbstub.h" |
18ff9494 | 40 | #include "exec/address-spaces.h" |
860643bc | 41 | #include "trace.h" |
3a449690 | 42 | #include "qapi-event.h" |
863f6f52 | 43 | #include "hw/s390x/s390-pci-inst.h" |
9e03a040 | 44 | #include "hw/s390x/s390-pci-bus.h" |
e91e972c | 45 | #include "hw/s390x/ipl.h" |
f07177a5 | 46 | #include "hw/s390x/ebcdic.h" |
4c663752 | 47 | #include "exec/memattrs.h" |
9700230b | 48 | #include "hw/s390x/s390-virtio-ccw.h" |
0e60a699 | 49 | |
08564ecd DA |
50 | #ifndef DEBUG_KVM |
51 | #define DEBUG_KVM 0 | |
0e60a699 AG |
52 | #endif |
53 | ||
08564ecd DA |
54 | #define DPRINTF(fmt, ...) do { \ |
55 | if (DEBUG_KVM) { \ | |
56 | fprintf(stderr, fmt, ## __VA_ARGS__); \ | |
57 | } \ | |
58 | } while (0); | |
59 | ||
2b147555 DD |
60 | #define kvm_vm_check_mem_attr(s, attr) \ |
61 | kvm_vm_check_attr(s, KVM_S390_VM_MEM_CTRL, attr) | |
62 | ||
0e60a699 AG |
63 | #define IPA0_DIAG 0x8300 |
64 | #define IPA0_SIGP 0xae00 | |
09b99878 CH |
65 | #define IPA0_B2 0xb200 |
66 | #define IPA0_B9 0xb900 | |
67 | #define IPA0_EB 0xeb00 | |
863f6f52 | 68 | #define IPA0_E3 0xe300 |
0e60a699 | 69 | |
1eecf41b FB |
70 | #define PRIV_B2_SCLP_CALL 0x20 |
71 | #define PRIV_B2_CSCH 0x30 | |
72 | #define PRIV_B2_HSCH 0x31 | |
73 | #define PRIV_B2_MSCH 0x32 | |
74 | #define PRIV_B2_SSCH 0x33 | |
75 | #define PRIV_B2_STSCH 0x34 | |
76 | #define PRIV_B2_TSCH 0x35 | |
77 | #define PRIV_B2_TPI 0x36 | |
78 | #define PRIV_B2_SAL 0x37 | |
79 | #define PRIV_B2_RSCH 0x38 | |
80 | #define PRIV_B2_STCRW 0x39 | |
81 | #define PRIV_B2_STCPS 0x3a | |
82 | #define PRIV_B2_RCHP 0x3b | |
83 | #define PRIV_B2_SCHM 0x3c | |
84 | #define PRIV_B2_CHSC 0x5f | |
85 | #define PRIV_B2_SIGA 0x74 | |
86 | #define PRIV_B2_XSCH 0x76 | |
87 | ||
88 | #define PRIV_EB_SQBS 0x8a | |
863f6f52 FB |
89 | #define PRIV_EB_PCISTB 0xd0 |
90 | #define PRIV_EB_SIC 0xd1 | |
1eecf41b FB |
91 | |
92 | #define PRIV_B9_EQBS 0x9c | |
863f6f52 FB |
93 | #define PRIV_B9_CLP 0xa0 |
94 | #define PRIV_B9_PCISTG 0xd0 | |
95 | #define PRIV_B9_PCILG 0xd2 | |
96 | #define PRIV_B9_RPCIT 0xd3 | |
97 | ||
98 | #define PRIV_E3_MPCIFC 0xd0 | |
99 | #define PRIV_E3_STPCIFC 0xd4 | |
1eecf41b | 100 | |
8fc639af | 101 | #define DIAG_TIMEREVENT 0x288 |
268846ba | 102 | #define DIAG_IPL 0x308 |
0e60a699 AG |
103 | #define DIAG_KVM_HYPERCALL 0x500 |
104 | #define DIAG_KVM_BREAKPOINT 0x501 | |
105 | ||
0e60a699 | 106 | #define ICPT_INSTRUCTION 0x04 |
6449a41a | 107 | #define ICPT_PROGRAM 0x08 |
a2689242 | 108 | #define ICPT_EXT_INT 0x14 |
0e60a699 AG |
109 | #define ICPT_WAITPSW 0x1c |
110 | #define ICPT_SOFT_INTERCEPT 0x24 | |
111 | #define ICPT_CPU_STOP 0x28 | |
b60fae32 | 112 | #define ICPT_OPEREXC 0x2c |
0e60a699 AG |
113 | #define ICPT_IO 0x40 |
114 | ||
3cda44f7 JF |
115 | #define NR_LOCAL_IRQS 32 |
116 | /* | |
117 | * Needs to be big enough to contain max_cpus emergency signals | |
118 | * and in addition NR_LOCAL_IRQS interrupts | |
119 | */ | |
120 | #define VCPU_IRQ_BUF_SIZE (sizeof(struct kvm_s390_irq) * \ | |
121 | (max_cpus + NR_LOCAL_IRQS)) | |
122 | ||
770a6379 DH |
123 | static CPUWatchpoint hw_watchpoint; |
124 | /* | |
125 | * We don't use a list because this structure is also used to transmit the | |
126 | * hardware breakpoints to the kernel. | |
127 | */ | |
128 | static struct kvm_hw_breakpoint *hw_breakpoints; | |
129 | static int nb_hw_breakpoints; | |
130 | ||
94a8d39a JK |
131 | const KVMCapabilityInfo kvm_arch_required_capabilities[] = { |
132 | KVM_CAP_LAST_INFO | |
133 | }; | |
134 | ||
f9530c32 CB |
135 | static QemuMutex qemu_sigp_mutex; |
136 | ||
5b08b344 | 137 | static int cap_sync_regs; |
819bd309 | 138 | static int cap_async_pf; |
a9bcd1b8 | 139 | static int cap_mem_op; |
1191c949 | 140 | static int cap_s390_irq; |
9700230b | 141 | static int cap_ri; |
62deb62d | 142 | static int cap_gs; |
5b08b344 | 143 | |
03f47ee4 JF |
144 | static int active_cmma; |
145 | ||
dc622deb | 146 | static void *legacy_s390_alloc(size_t size, uint64_t *align); |
91138037 | 147 | |
708f99c3 | 148 | static int kvm_s390_query_mem_limit(uint64_t *memory_limit) |
a310b283 DD |
149 | { |
150 | struct kvm_device_attr attr = { | |
151 | .group = KVM_S390_VM_MEM_CTRL, | |
152 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
153 | .addr = (uint64_t) memory_limit, | |
154 | }; | |
155 | ||
708f99c3 | 156 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); |
a310b283 DD |
157 | } |
158 | ||
708f99c3 | 159 | int kvm_s390_set_mem_limit(uint64_t new_limit, uint64_t *hw_limit) |
a310b283 DD |
160 | { |
161 | int rc; | |
162 | ||
163 | struct kvm_device_attr attr = { | |
164 | .group = KVM_S390_VM_MEM_CTRL, | |
165 | .attr = KVM_S390_VM_MEM_LIMIT_SIZE, | |
166 | .addr = (uint64_t) &new_limit, | |
167 | }; | |
168 | ||
708f99c3 | 169 | if (!kvm_vm_check_mem_attr(kvm_state, KVM_S390_VM_MEM_LIMIT_SIZE)) { |
a310b283 DD |
170 | return 0; |
171 | } | |
172 | ||
708f99c3 | 173 | rc = kvm_s390_query_mem_limit(hw_limit); |
a310b283 DD |
174 | if (rc) { |
175 | return rc; | |
176 | } else if (*hw_limit < new_limit) { | |
177 | return -E2BIG; | |
178 | } | |
179 | ||
708f99c3 | 180 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
a310b283 DD |
181 | } |
182 | ||
03f47ee4 JF |
183 | int kvm_s390_cmma_active(void) |
184 | { | |
185 | return active_cmma; | |
186 | } | |
187 | ||
07059eff DH |
188 | static bool kvm_s390_cmma_available(void) |
189 | { | |
190 | static bool initialized, value; | |
191 | ||
192 | if (!initialized) { | |
193 | initialized = true; | |
194 | value = kvm_vm_check_mem_attr(kvm_state, KVM_S390_VM_MEM_ENABLE_CMMA) && | |
195 | kvm_vm_check_mem_attr(kvm_state, KVM_S390_VM_MEM_CLR_CMMA); | |
196 | } | |
197 | return value; | |
198 | } | |
199 | ||
1cd4e0f6 | 200 | void kvm_s390_cmma_reset(void) |
4cb88c3c DD |
201 | { |
202 | int rc; | |
4cb88c3c DD |
203 | struct kvm_device_attr attr = { |
204 | .group = KVM_S390_VM_MEM_CTRL, | |
205 | .attr = KVM_S390_VM_MEM_CLR_CMMA, | |
206 | }; | |
207 | ||
03f47ee4 | 208 | if (!kvm_s390_cmma_active()) { |
07059eff DH |
209 | return; |
210 | } | |
211 | ||
1cd4e0f6 | 212 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
4cb88c3c DD |
213 | trace_kvm_clear_cmma(rc); |
214 | } | |
215 | ||
07059eff | 216 | static void kvm_s390_enable_cmma(void) |
4cb88c3c DD |
217 | { |
218 | int rc; | |
219 | struct kvm_device_attr attr = { | |
220 | .group = KVM_S390_VM_MEM_CTRL, | |
221 | .attr = KVM_S390_VM_MEM_ENABLE_CMMA, | |
222 | }; | |
223 | ||
03f47ee4 JF |
224 | if (mem_path) { |
225 | error_report("Warning: CMM will not be enabled because it is not " | |
226 | "compatible to hugetlbfs."); | |
227 | return; | |
228 | } | |
07059eff | 229 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
03f47ee4 | 230 | active_cmma = !rc; |
4cb88c3c DD |
231 | trace_kvm_enable_cmma(rc); |
232 | } | |
233 | ||
2eb1cd07 TK |
234 | static void kvm_s390_set_attr(uint64_t attr) |
235 | { | |
236 | struct kvm_device_attr attribute = { | |
237 | .group = KVM_S390_VM_CRYPTO, | |
238 | .attr = attr, | |
239 | }; | |
240 | ||
241 | int ret = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attribute); | |
242 | ||
243 | if (ret) { | |
244 | error_report("Failed to set crypto device attribute %lu: %s", | |
245 | attr, strerror(-ret)); | |
246 | } | |
247 | } | |
248 | ||
249 | static void kvm_s390_init_aes_kw(void) | |
250 | { | |
251 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_AES_KW; | |
252 | ||
253 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "aes-key-wrap", | |
254 | NULL)) { | |
255 | attr = KVM_S390_VM_CRYPTO_ENABLE_AES_KW; | |
256 | } | |
257 | ||
258 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
259 | kvm_s390_set_attr(attr); | |
260 | } | |
261 | } | |
262 | ||
263 | static void kvm_s390_init_dea_kw(void) | |
264 | { | |
265 | uint64_t attr = KVM_S390_VM_CRYPTO_DISABLE_DEA_KW; | |
266 | ||
267 | if (object_property_get_bool(OBJECT(qdev_get_machine()), "dea-key-wrap", | |
268 | NULL)) { | |
269 | attr = KVM_S390_VM_CRYPTO_ENABLE_DEA_KW; | |
270 | } | |
271 | ||
272 | if (kvm_vm_check_attr(kvm_state, KVM_S390_VM_CRYPTO, attr)) { | |
273 | kvm_s390_set_attr(attr); | |
274 | } | |
275 | } | |
276 | ||
4ab72920 | 277 | void kvm_s390_crypto_reset(void) |
2eb1cd07 | 278 | { |
c85d21c7 DH |
279 | if (s390_has_feat(S390_FEAT_MSA_EXT_3)) { |
280 | kvm_s390_init_aes_kw(); | |
281 | kvm_s390_init_dea_kw(); | |
282 | } | |
2eb1cd07 TK |
283 | } |
284 | ||
b16565b3 | 285 | int kvm_arch_init(MachineState *ms, KVMState *s) |
0e60a699 | 286 | { |
5b08b344 | 287 | cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); |
819bd309 | 288 | cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); |
a9bcd1b8 | 289 | cap_mem_op = kvm_check_extension(s, KVM_CAP_S390_MEM_OP); |
1191c949 | 290 | cap_s390_irq = kvm_check_extension(s, KVM_CAP_S390_INJECT_IRQ); |
4cb88c3c | 291 | |
91138037 MA |
292 | if (!kvm_check_extension(s, KVM_CAP_S390_GMAP) |
293 | || !kvm_check_extension(s, KVM_CAP_S390_COW)) { | |
294 | phys_mem_set_alloc(legacy_s390_alloc); | |
295 | } | |
f16d3f58 DH |
296 | |
297 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); | |
46ca6b3b | 298 | kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0); |
f07177a5 | 299 | kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); |
9700230b FZ |
300 | if (ri_allowed()) { |
301 | if (kvm_vm_enable_cap(s, KVM_CAP_S390_RI, 0) == 0) { | |
302 | cap_ri = 1; | |
303 | } | |
304 | } | |
62deb62d FZ |
305 | if (gs_allowed()) { |
306 | if (kvm_vm_enable_cap(s, KVM_CAP_S390_GS, 0) == 0) { | |
307 | cap_gs = 1; | |
308 | } | |
309 | } | |
f16d3f58 | 310 | |
3b00f702 YMZ |
311 | /* Try to enable AIS facility */ |
312 | kvm_vm_enable_cap(s, KVM_CAP_S390_AIS, 0); | |
313 | ||
f9530c32 CB |
314 | qemu_mutex_init(&qemu_sigp_mutex); |
315 | ||
0e60a699 AG |
316 | return 0; |
317 | } | |
318 | ||
d525ffab PB |
319 | int kvm_arch_irqchip_create(MachineState *ms, KVMState *s) |
320 | { | |
321 | return 0; | |
322 | } | |
323 | ||
b164e48e EH |
324 | unsigned long kvm_arch_vcpu_id(CPUState *cpu) |
325 | { | |
326 | return cpu->cpu_index; | |
327 | } | |
328 | ||
c9e659c9 | 329 | int kvm_arch_init_vcpu(CPUState *cs) |
0e60a699 | 330 | { |
c9e659c9 DH |
331 | S390CPU *cpu = S390_CPU(cs); |
332 | kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state); | |
3cda44f7 | 333 | cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE); |
1c9d2a1d | 334 | return 0; |
0e60a699 AG |
335 | } |
336 | ||
50a2c6e5 | 337 | void kvm_s390_reset_vcpu(S390CPU *cpu) |
0e60a699 | 338 | { |
50a2c6e5 PB |
339 | CPUState *cs = CPU(cpu); |
340 | ||
419831d7 AG |
341 | /* The initial reset call is needed here to reset in-kernel |
342 | * vcpu data that we can't access directly from QEMU | |
343 | * (i.e. with older kernels which don't support sync_regs/ONE_REG). | |
344 | * Before this ioctl cpu_synchronize_state() is called in common kvm | |
345 | * code (kvm-all) */ | |
50a2c6e5 | 346 | if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL)) { |
81b07353 | 347 | error_report("Initial CPU reset failed on CPU %i", cs->cpu_index); |
70bada03 | 348 | } |
0e60a699 AG |
349 | } |
350 | ||
fdb78ec0 DH |
351 | static int can_sync_regs(CPUState *cs, int regs) |
352 | { | |
353 | return cap_sync_regs && (cs->kvm_run->kvm_valid_regs & regs) == regs; | |
354 | } | |
355 | ||
20d695a9 | 356 | int kvm_arch_put_registers(CPUState *cs, int level) |
0e60a699 | 357 | { |
20d695a9 AF |
358 | S390CPU *cpu = S390_CPU(cs); |
359 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 360 | struct kvm_sregs sregs; |
0e60a699 | 361 | struct kvm_regs regs; |
e6eef7c2 | 362 | struct kvm_fpu fpu = {}; |
860643bc | 363 | int r; |
0e60a699 AG |
364 | int i; |
365 | ||
5b08b344 | 366 | /* always save the PSW and the GPRS*/ |
f7575c96 AF |
367 | cs->kvm_run->psw_addr = env->psw.addr; |
368 | cs->kvm_run->psw_mask = env->psw.mask; | |
0e60a699 | 369 | |
fdb78ec0 | 370 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 371 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
372 | cs->kvm_run->s.regs.gprs[i] = env->regs[i]; |
373 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GPRS; | |
5b08b344 CB |
374 | } |
375 | } else { | |
376 | for (i = 0; i < 16; i++) { | |
377 | regs.gprs[i] = env->regs[i]; | |
378 | } | |
860643bc CB |
379 | r = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); |
380 | if (r < 0) { | |
381 | return r; | |
5b08b344 | 382 | } |
0e60a699 AG |
383 | } |
384 | ||
fcb79802 EF |
385 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { |
386 | for (i = 0; i < 32; i++) { | |
387 | cs->kvm_run->s.regs.vrs[i][0] = env->vregs[i][0].ll; | |
388 | cs->kvm_run->s.regs.vrs[i][1] = env->vregs[i][1].ll; | |
389 | } | |
390 | cs->kvm_run->s.regs.fpc = env->fpc; | |
391 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_VRS; | |
5ab0e547 DH |
392 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
393 | for (i = 0; i < 16; i++) { | |
394 | cs->kvm_run->s.regs.fprs[i] = get_freg(env, i)->ll; | |
395 | } | |
396 | cs->kvm_run->s.regs.fpc = env->fpc; | |
397 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_FPRS; | |
fcb79802 EF |
398 | } else { |
399 | /* Floating point */ | |
400 | for (i = 0; i < 16; i++) { | |
401 | fpu.fprs[i] = get_freg(env, i)->ll; | |
402 | } | |
403 | fpu.fpc = env->fpc; | |
85ad6230 | 404 | |
fcb79802 EF |
405 | r = kvm_vcpu_ioctl(cs, KVM_SET_FPU, &fpu); |
406 | if (r < 0) { | |
407 | return r; | |
408 | } | |
85ad6230 JH |
409 | } |
410 | ||
44c68de0 DD |
411 | /* Do we need to save more than that? */ |
412 | if (level == KVM_PUT_RUNTIME_STATE) { | |
413 | return 0; | |
414 | } | |
420840e5 | 415 | |
59ac1532 DH |
416 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
417 | cs->kvm_run->s.regs.cputm = env->cputm; | |
418 | cs->kvm_run->s.regs.ckc = env->ckc; | |
419 | cs->kvm_run->s.regs.todpr = env->todpr; | |
420 | cs->kvm_run->s.regs.gbea = env->gbea; | |
421 | cs->kvm_run->s.regs.pp = env->pp; | |
422 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ARCH0; | |
423 | } else { | |
424 | /* | |
425 | * These ONE_REGS are not protected by a capability. As they are only | |
426 | * necessary for migration we just trace a possible error, but don't | |
427 | * return with an error return code. | |
428 | */ | |
429 | kvm_set_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
430 | kvm_set_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
431 | kvm_set_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
432 | kvm_set_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
433 | kvm_set_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
434 | } | |
435 | ||
9700230b FZ |
436 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
437 | memcpy(cs->kvm_run->s.regs.riccb, env->riccb, 64); | |
438 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_RICCB; | |
439 | } | |
440 | ||
59ac1532 DH |
441 | /* pfault parameters */ |
442 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
443 | cs->kvm_run->s.regs.pft = env->pfault_token; | |
444 | cs->kvm_run->s.regs.pfs = env->pfault_select; | |
445 | cs->kvm_run->s.regs.pfc = env->pfault_compare; | |
446 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PFAULT; | |
447 | } else if (cap_async_pf) { | |
860643bc CB |
448 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
449 | if (r < 0) { | |
450 | return r; | |
819bd309 | 451 | } |
860643bc CB |
452 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
453 | if (r < 0) { | |
454 | return r; | |
819bd309 | 455 | } |
860643bc CB |
456 | r = kvm_set_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
457 | if (r < 0) { | |
458 | return r; | |
819bd309 DD |
459 | } |
460 | } | |
461 | ||
fdb78ec0 DH |
462 | /* access registers and control registers*/ |
463 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { | |
5b08b344 | 464 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
465 | cs->kvm_run->s.regs.acrs[i] = env->aregs[i]; |
466 | cs->kvm_run->s.regs.crs[i] = env->cregs[i]; | |
5b08b344 | 467 | } |
f7575c96 AF |
468 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_ACRS; |
469 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_CRS; | |
5b08b344 CB |
470 | } else { |
471 | for (i = 0; i < 16; i++) { | |
472 | sregs.acrs[i] = env->aregs[i]; | |
473 | sregs.crs[i] = env->cregs[i]; | |
474 | } | |
860643bc CB |
475 | r = kvm_vcpu_ioctl(cs, KVM_SET_SREGS, &sregs); |
476 | if (r < 0) { | |
477 | return r; | |
5b08b344 CB |
478 | } |
479 | } | |
0e60a699 | 480 | |
62deb62d FZ |
481 | if (can_sync_regs(cs, KVM_SYNC_GSCB)) { |
482 | memcpy(cs->kvm_run->s.regs.gscb, env->gscb, 32); | |
483 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_GSCB; | |
484 | } | |
485 | ||
5b08b344 | 486 | /* Finally the prefix */ |
fdb78ec0 | 487 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 AF |
488 | cs->kvm_run->s.regs.prefix = env->psa; |
489 | cs->kvm_run->kvm_dirty_regs |= KVM_SYNC_PREFIX; | |
5b08b344 CB |
490 | } else { |
491 | /* prefix is only supported via sync regs */ | |
492 | } | |
493 | return 0; | |
0e60a699 AG |
494 | } |
495 | ||
20d695a9 | 496 | int kvm_arch_get_registers(CPUState *cs) |
420840e5 JH |
497 | { |
498 | S390CPU *cpu = S390_CPU(cs); | |
499 | CPUS390XState *env = &cpu->env; | |
5b08b344 | 500 | struct kvm_sregs sregs; |
0e60a699 | 501 | struct kvm_regs regs; |
85ad6230 | 502 | struct kvm_fpu fpu; |
44c68de0 | 503 | int i, r; |
420840e5 | 504 | |
5b08b344 | 505 | /* get the PSW */ |
f7575c96 AF |
506 | env->psw.addr = cs->kvm_run->psw_addr; |
507 | env->psw.mask = cs->kvm_run->psw_mask; | |
5b08b344 CB |
508 | |
509 | /* the GPRS */ | |
fdb78ec0 | 510 | if (can_sync_regs(cs, KVM_SYNC_GPRS)) { |
5b08b344 | 511 | for (i = 0; i < 16; i++) { |
f7575c96 | 512 | env->regs[i] = cs->kvm_run->s.regs.gprs[i]; |
5b08b344 CB |
513 | } |
514 | } else { | |
44c68de0 DD |
515 | r = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); |
516 | if (r < 0) { | |
517 | return r; | |
5b08b344 CB |
518 | } |
519 | for (i = 0; i < 16; i++) { | |
520 | env->regs[i] = regs.gprs[i]; | |
521 | } | |
0e60a699 AG |
522 | } |
523 | ||
5b08b344 | 524 | /* The ACRS and CRS */ |
fdb78ec0 | 525 | if (can_sync_regs(cs, KVM_SYNC_ACRS | KVM_SYNC_CRS)) { |
5b08b344 | 526 | for (i = 0; i < 16; i++) { |
f7575c96 AF |
527 | env->aregs[i] = cs->kvm_run->s.regs.acrs[i]; |
528 | env->cregs[i] = cs->kvm_run->s.regs.crs[i]; | |
5b08b344 CB |
529 | } |
530 | } else { | |
44c68de0 DD |
531 | r = kvm_vcpu_ioctl(cs, KVM_GET_SREGS, &sregs); |
532 | if (r < 0) { | |
533 | return r; | |
5b08b344 CB |
534 | } |
535 | for (i = 0; i < 16; i++) { | |
536 | env->aregs[i] = sregs.acrs[i]; | |
537 | env->cregs[i] = sregs.crs[i]; | |
538 | } | |
0e60a699 AG |
539 | } |
540 | ||
fcb79802 EF |
541 | /* Floating point and vector registers */ |
542 | if (can_sync_regs(cs, KVM_SYNC_VRS)) { | |
543 | for (i = 0; i < 32; i++) { | |
544 | env->vregs[i][0].ll = cs->kvm_run->s.regs.vrs[i][0]; | |
545 | env->vregs[i][1].ll = cs->kvm_run->s.regs.vrs[i][1]; | |
546 | } | |
547 | env->fpc = cs->kvm_run->s.regs.fpc; | |
5ab0e547 DH |
548 | } else if (can_sync_regs(cs, KVM_SYNC_FPRS)) { |
549 | for (i = 0; i < 16; i++) { | |
550 | get_freg(env, i)->ll = cs->kvm_run->s.regs.fprs[i]; | |
551 | } | |
552 | env->fpc = cs->kvm_run->s.regs.fpc; | |
fcb79802 EF |
553 | } else { |
554 | r = kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); | |
555 | if (r < 0) { | |
556 | return r; | |
557 | } | |
558 | for (i = 0; i < 16; i++) { | |
559 | get_freg(env, i)->ll = fpu.fprs[i]; | |
560 | } | |
561 | env->fpc = fpu.fpc; | |
85ad6230 | 562 | } |
85ad6230 | 563 | |
44c68de0 | 564 | /* The prefix */ |
fdb78ec0 | 565 | if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { |
f7575c96 | 566 | env->psa = cs->kvm_run->s.regs.prefix; |
5b08b344 | 567 | } |
0e60a699 | 568 | |
59ac1532 DH |
569 | if (can_sync_regs(cs, KVM_SYNC_ARCH0)) { |
570 | env->cputm = cs->kvm_run->s.regs.cputm; | |
571 | env->ckc = cs->kvm_run->s.regs.ckc; | |
572 | env->todpr = cs->kvm_run->s.regs.todpr; | |
573 | env->gbea = cs->kvm_run->s.regs.gbea; | |
574 | env->pp = cs->kvm_run->s.regs.pp; | |
575 | } else { | |
576 | /* | |
577 | * These ONE_REGS are not protected by a capability. As they are only | |
578 | * necessary for migration we just trace a possible error, but don't | |
579 | * return with an error return code. | |
580 | */ | |
581 | kvm_get_one_reg(cs, KVM_REG_S390_CPU_TIMER, &env->cputm); | |
582 | kvm_get_one_reg(cs, KVM_REG_S390_CLOCK_COMP, &env->ckc); | |
583 | kvm_get_one_reg(cs, KVM_REG_S390_TODPR, &env->todpr); | |
584 | kvm_get_one_reg(cs, KVM_REG_S390_GBEA, &env->gbea); | |
585 | kvm_get_one_reg(cs, KVM_REG_S390_PP, &env->pp); | |
586 | } | |
587 | ||
9700230b FZ |
588 | if (can_sync_regs(cs, KVM_SYNC_RICCB)) { |
589 | memcpy(env->riccb, cs->kvm_run->s.regs.riccb, 64); | |
590 | } | |
591 | ||
62deb62d FZ |
592 | if (can_sync_regs(cs, KVM_SYNC_GSCB)) { |
593 | memcpy(env->gscb, cs->kvm_run->s.regs.gscb, 32); | |
594 | } | |
595 | ||
59ac1532 DH |
596 | /* pfault parameters */ |
597 | if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { | |
598 | env->pfault_token = cs->kvm_run->s.regs.pft; | |
599 | env->pfault_select = cs->kvm_run->s.regs.pfs; | |
600 | env->pfault_compare = cs->kvm_run->s.regs.pfc; | |
601 | } else if (cap_async_pf) { | |
860643bc | 602 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFTOKEN, &env->pfault_token); |
819bd309 DD |
603 | if (r < 0) { |
604 | return r; | |
605 | } | |
860643bc | 606 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFCOMPARE, &env->pfault_compare); |
819bd309 DD |
607 | if (r < 0) { |
608 | return r; | |
609 | } | |
860643bc | 610 | r = kvm_get_one_reg(cs, KVM_REG_S390_PFSELECT, &env->pfault_select); |
819bd309 DD |
611 | if (r < 0) { |
612 | return r; | |
613 | } | |
614 | } | |
615 | ||
0e60a699 AG |
616 | return 0; |
617 | } | |
618 | ||
3f9e59bb JH |
619 | int kvm_s390_get_clock(uint8_t *tod_high, uint64_t *tod_low) |
620 | { | |
621 | int r; | |
622 | struct kvm_device_attr attr = { | |
623 | .group = KVM_S390_VM_TOD, | |
624 | .attr = KVM_S390_VM_TOD_LOW, | |
625 | .addr = (uint64_t)tod_low, | |
626 | }; | |
627 | ||
628 | r = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
629 | if (r) { | |
630 | return r; | |
631 | } | |
632 | ||
633 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
634 | attr.addr = (uint64_t)tod_high; | |
635 | return kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
636 | } | |
637 | ||
638 | int kvm_s390_set_clock(uint8_t *tod_high, uint64_t *tod_low) | |
639 | { | |
640 | int r; | |
641 | ||
642 | struct kvm_device_attr attr = { | |
643 | .group = KVM_S390_VM_TOD, | |
644 | .attr = KVM_S390_VM_TOD_LOW, | |
645 | .addr = (uint64_t)tod_low, | |
646 | }; | |
647 | ||
648 | r = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
649 | if (r) { | |
650 | return r; | |
651 | } | |
652 | ||
653 | attr.attr = KVM_S390_VM_TOD_HIGH; | |
654 | attr.addr = (uint64_t)tod_high; | |
655 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
656 | } | |
657 | ||
a9bcd1b8 TH |
658 | /** |
659 | * kvm_s390_mem_op: | |
660 | * @addr: the logical start address in guest memory | |
6cb1e49d | 661 | * @ar: the access register number |
a9bcd1b8 | 662 | * @hostbuf: buffer in host memory. NULL = do only checks w/o copying |
67cc32eb | 663 | * @len: length that should be transferred |
a9bcd1b8 | 664 | * @is_write: true = write, false = read |
67cc32eb | 665 | * Returns: 0 on success, non-zero if an exception or error occurred |
a9bcd1b8 TH |
666 | * |
667 | * Use KVM ioctl to read/write from/to guest memory. An access exception | |
668 | * is injected into the vCPU in case of translation errors. | |
669 | */ | |
6cb1e49d AY |
670 | int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, uint8_t ar, void *hostbuf, |
671 | int len, bool is_write) | |
a9bcd1b8 TH |
672 | { |
673 | struct kvm_s390_mem_op mem_op = { | |
674 | .gaddr = addr, | |
675 | .flags = KVM_S390_MEMOP_F_INJECT_EXCEPTION, | |
676 | .size = len, | |
677 | .op = is_write ? KVM_S390_MEMOP_LOGICAL_WRITE | |
678 | : KVM_S390_MEMOP_LOGICAL_READ, | |
679 | .buf = (uint64_t)hostbuf, | |
6cb1e49d | 680 | .ar = ar, |
a9bcd1b8 TH |
681 | }; |
682 | int ret; | |
683 | ||
684 | if (!cap_mem_op) { | |
685 | return -ENOSYS; | |
686 | } | |
687 | if (!hostbuf) { | |
688 | mem_op.flags |= KVM_S390_MEMOP_F_CHECK_ONLY; | |
689 | } | |
690 | ||
691 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); | |
692 | if (ret < 0) { | |
693 | error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); | |
694 | } | |
695 | return ret; | |
696 | } | |
697 | ||
fdec9918 CB |
698 | /* |
699 | * Legacy layout for s390: | |
700 | * Older S390 KVM requires the topmost vma of the RAM to be | |
701 | * smaller than an system defined value, which is at least 256GB. | |
702 | * Larger systems have larger values. We put the guest between | |
703 | * the end of data segment (system break) and this value. We | |
704 | * use 32GB as a base to have enough room for the system break | |
705 | * to grow. We also have to use MAP parameters that avoid | |
706 | * read-only mapping of guest pages. | |
707 | */ | |
dc622deb | 708 | static void *legacy_s390_alloc(size_t size, uint64_t *align) |
fdec9918 CB |
709 | { |
710 | void *mem; | |
711 | ||
712 | mem = mmap((void *) 0x800000000ULL, size, | |
713 | PROT_EXEC|PROT_READ|PROT_WRITE, | |
714 | MAP_SHARED | MAP_ANONYMOUS | MAP_FIXED, -1, 0); | |
39228250 | 715 | return mem == MAP_FAILED ? NULL : mem; |
fdec9918 CB |
716 | } |
717 | ||
b60fae32 DH |
718 | static uint8_t const *sw_bp_inst; |
719 | static uint8_t sw_bp_ilen; | |
720 | ||
721 | static void determine_sw_breakpoint_instr(void) | |
722 | { | |
723 | /* DIAG 501 is used for sw breakpoints with old kernels */ | |
724 | static const uint8_t diag_501[] = {0x83, 0x24, 0x05, 0x01}; | |
725 | /* Instruction 0x0000 is used for sw breakpoints with recent kernels */ | |
726 | static const uint8_t instr_0x0000[] = {0x00, 0x00}; | |
727 | ||
728 | if (sw_bp_inst) { | |
729 | return; | |
730 | } | |
731 | if (kvm_vm_enable_cap(kvm_state, KVM_CAP_S390_USER_INSTR0, 0)) { | |
732 | sw_bp_inst = diag_501; | |
733 | sw_bp_ilen = sizeof(diag_501); | |
734 | DPRINTF("KVM: will use 4-byte sw breakpoints.\n"); | |
735 | } else { | |
736 | sw_bp_inst = instr_0x0000; | |
737 | sw_bp_ilen = sizeof(instr_0x0000); | |
738 | DPRINTF("KVM: will use 2-byte sw breakpoints.\n"); | |
739 | } | |
740 | } | |
8e4e86af | 741 | |
20d695a9 | 742 | int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 743 | { |
b60fae32 | 744 | determine_sw_breakpoint_instr(); |
0e60a699 | 745 | |
8e4e86af | 746 | if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
b60fae32 DH |
747 | sw_bp_ilen, 0) || |
748 | cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)sw_bp_inst, sw_bp_ilen, 1)) { | |
0e60a699 AG |
749 | return -EINVAL; |
750 | } | |
751 | return 0; | |
752 | } | |
753 | ||
20d695a9 | 754 | int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp) |
0e60a699 | 755 | { |
b60fae32 | 756 | uint8_t t[MAX_ILEN]; |
0e60a699 | 757 | |
b60fae32 | 758 | if (cpu_memory_rw_debug(cs, bp->pc, t, sw_bp_ilen, 0)) { |
0e60a699 | 759 | return -EINVAL; |
b60fae32 | 760 | } else if (memcmp(t, sw_bp_inst, sw_bp_ilen)) { |
0e60a699 | 761 | return -EINVAL; |
8e4e86af | 762 | } else if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, |
b60fae32 | 763 | sw_bp_ilen, 1)) { |
0e60a699 AG |
764 | return -EINVAL; |
765 | } | |
766 | ||
767 | return 0; | |
768 | } | |
769 | ||
770a6379 DH |
770 | static struct kvm_hw_breakpoint *find_hw_breakpoint(target_ulong addr, |
771 | int len, int type) | |
772 | { | |
773 | int n; | |
774 | ||
775 | for (n = 0; n < nb_hw_breakpoints; n++) { | |
776 | if (hw_breakpoints[n].addr == addr && hw_breakpoints[n].type == type && | |
777 | (hw_breakpoints[n].len == len || len == -1)) { | |
778 | return &hw_breakpoints[n]; | |
779 | } | |
780 | } | |
781 | ||
782 | return NULL; | |
783 | } | |
784 | ||
785 | static int insert_hw_breakpoint(target_ulong addr, int len, int type) | |
786 | { | |
787 | int size; | |
788 | ||
789 | if (find_hw_breakpoint(addr, len, type)) { | |
790 | return -EEXIST; | |
791 | } | |
792 | ||
793 | size = (nb_hw_breakpoints + 1) * sizeof(struct kvm_hw_breakpoint); | |
794 | ||
795 | if (!hw_breakpoints) { | |
796 | nb_hw_breakpoints = 0; | |
797 | hw_breakpoints = (struct kvm_hw_breakpoint *)g_try_malloc(size); | |
798 | } else { | |
799 | hw_breakpoints = | |
800 | (struct kvm_hw_breakpoint *)g_try_realloc(hw_breakpoints, size); | |
801 | } | |
802 | ||
803 | if (!hw_breakpoints) { | |
804 | nb_hw_breakpoints = 0; | |
805 | return -ENOMEM; | |
806 | } | |
807 | ||
808 | hw_breakpoints[nb_hw_breakpoints].addr = addr; | |
809 | hw_breakpoints[nb_hw_breakpoints].len = len; | |
810 | hw_breakpoints[nb_hw_breakpoints].type = type; | |
811 | ||
812 | nb_hw_breakpoints++; | |
813 | ||
814 | return 0; | |
815 | } | |
816 | ||
8c012449 DH |
817 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
818 | target_ulong len, int type) | |
819 | { | |
770a6379 DH |
820 | switch (type) { |
821 | case GDB_BREAKPOINT_HW: | |
822 | type = KVM_HW_BP; | |
823 | break; | |
824 | case GDB_WATCHPOINT_WRITE: | |
825 | if (len < 1) { | |
826 | return -EINVAL; | |
827 | } | |
828 | type = KVM_HW_WP_WRITE; | |
829 | break; | |
830 | default: | |
831 | return -ENOSYS; | |
832 | } | |
833 | return insert_hw_breakpoint(addr, len, type); | |
8c012449 DH |
834 | } |
835 | ||
836 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
837 | target_ulong len, int type) | |
838 | { | |
770a6379 DH |
839 | int size; |
840 | struct kvm_hw_breakpoint *bp = find_hw_breakpoint(addr, len, type); | |
841 | ||
842 | if (bp == NULL) { | |
843 | return -ENOENT; | |
844 | } | |
845 | ||
846 | nb_hw_breakpoints--; | |
847 | if (nb_hw_breakpoints > 0) { | |
848 | /* | |
849 | * In order to trim the array, move the last element to the position to | |
850 | * be removed - if necessary. | |
851 | */ | |
852 | if (bp != &hw_breakpoints[nb_hw_breakpoints]) { | |
853 | *bp = hw_breakpoints[nb_hw_breakpoints]; | |
854 | } | |
855 | size = nb_hw_breakpoints * sizeof(struct kvm_hw_breakpoint); | |
856 | hw_breakpoints = | |
857 | (struct kvm_hw_breakpoint *)g_realloc(hw_breakpoints, size); | |
858 | } else { | |
859 | g_free(hw_breakpoints); | |
860 | hw_breakpoints = NULL; | |
861 | } | |
862 | ||
863 | return 0; | |
8c012449 DH |
864 | } |
865 | ||
866 | void kvm_arch_remove_all_hw_breakpoints(void) | |
867 | { | |
770a6379 DH |
868 | nb_hw_breakpoints = 0; |
869 | g_free(hw_breakpoints); | |
870 | hw_breakpoints = NULL; | |
8c012449 DH |
871 | } |
872 | ||
873 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) | |
874 | { | |
770a6379 DH |
875 | int i; |
876 | ||
877 | if (nb_hw_breakpoints > 0) { | |
878 | dbg->arch.nr_hw_bp = nb_hw_breakpoints; | |
879 | dbg->arch.hw_bp = hw_breakpoints; | |
880 | ||
881 | for (i = 0; i < nb_hw_breakpoints; ++i) { | |
882 | hw_breakpoints[i].phys_addr = s390_cpu_get_phys_addr_debug(cpu, | |
883 | hw_breakpoints[i].addr); | |
884 | } | |
885 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; | |
886 | } else { | |
887 | dbg->arch.nr_hw_bp = 0; | |
888 | dbg->arch.hw_bp = NULL; | |
889 | } | |
8c012449 DH |
890 | } |
891 | ||
20d695a9 | 892 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) |
0e60a699 | 893 | { |
0e60a699 AG |
894 | } |
895 | ||
4c663752 | 896 | MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) |
0e60a699 | 897 | { |
4c663752 | 898 | return MEMTXATTRS_UNSPECIFIED; |
0e60a699 AG |
899 | } |
900 | ||
20d695a9 | 901 | int kvm_arch_process_async_events(CPUState *cs) |
0af691d7 | 902 | { |
225dc991 | 903 | return cs->halted; |
0af691d7 MT |
904 | } |
905 | ||
66ad0893 CH |
906 | static int s390_kvm_irq_to_interrupt(struct kvm_s390_irq *irq, |
907 | struct kvm_s390_interrupt *interrupt) | |
908 | { | |
909 | int r = 0; | |
910 | ||
911 | interrupt->type = irq->type; | |
912 | switch (irq->type) { | |
913 | case KVM_S390_INT_VIRTIO: | |
914 | interrupt->parm = irq->u.ext.ext_params; | |
915 | /* fall through */ | |
916 | case KVM_S390_INT_PFAULT_INIT: | |
917 | case KVM_S390_INT_PFAULT_DONE: | |
918 | interrupt->parm64 = irq->u.ext.ext_params2; | |
919 | break; | |
920 | case KVM_S390_PROGRAM_INT: | |
921 | interrupt->parm = irq->u.pgm.code; | |
922 | break; | |
923 | case KVM_S390_SIGP_SET_PREFIX: | |
924 | interrupt->parm = irq->u.prefix.address; | |
925 | break; | |
926 | case KVM_S390_INT_SERVICE: | |
927 | interrupt->parm = irq->u.ext.ext_params; | |
928 | break; | |
929 | case KVM_S390_MCHK: | |
930 | interrupt->parm = irq->u.mchk.cr14; | |
931 | interrupt->parm64 = irq->u.mchk.mcic; | |
932 | break; | |
933 | case KVM_S390_INT_EXTERNAL_CALL: | |
934 | interrupt->parm = irq->u.extcall.code; | |
935 | break; | |
936 | case KVM_S390_INT_EMERGENCY: | |
937 | interrupt->parm = irq->u.emerg.code; | |
938 | break; | |
939 | case KVM_S390_SIGP_STOP: | |
940 | case KVM_S390_RESTART: | |
941 | break; /* These types have no parameters */ | |
942 | case KVM_S390_INT_IO_MIN...KVM_S390_INT_IO_MAX: | |
943 | interrupt->parm = irq->u.io.subchannel_id << 16; | |
944 | interrupt->parm |= irq->u.io.subchannel_nr; | |
945 | interrupt->parm64 = (uint64_t)irq->u.io.io_int_parm << 32; | |
946 | interrupt->parm64 |= irq->u.io.io_int_word; | |
947 | break; | |
948 | default: | |
949 | r = -EINVAL; | |
950 | break; | |
951 | } | |
952 | return r; | |
953 | } | |
954 | ||
1191c949 | 955 | static void inject_vcpu_irq_legacy(CPUState *cs, struct kvm_s390_irq *irq) |
66ad0893 CH |
956 | { |
957 | struct kvm_s390_interrupt kvmint = {}; | |
66ad0893 CH |
958 | int r; |
959 | ||
960 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
961 | if (r < 0) { | |
962 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
963 | exit(1); | |
964 | } | |
965 | ||
966 | r = kvm_vcpu_ioctl(cs, KVM_S390_INTERRUPT, &kvmint); | |
967 | if (r < 0) { | |
968 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
969 | exit(1); | |
970 | } | |
971 | } | |
972 | ||
1191c949 JF |
973 | void kvm_s390_vcpu_interrupt(S390CPU *cpu, struct kvm_s390_irq *irq) |
974 | { | |
975 | CPUState *cs = CPU(cpu); | |
976 | int r; | |
977 | ||
978 | if (cap_s390_irq) { | |
979 | r = kvm_vcpu_ioctl(cs, KVM_S390_IRQ, irq); | |
980 | if (!r) { | |
981 | return; | |
982 | } | |
983 | error_report("KVM failed to inject interrupt %llx", irq->type); | |
984 | exit(1); | |
985 | } | |
986 | ||
987 | inject_vcpu_irq_legacy(cs, irq); | |
988 | } | |
989 | ||
bbd8bb8e | 990 | static void __kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
66ad0893 CH |
991 | { |
992 | struct kvm_s390_interrupt kvmint = {}; | |
993 | int r; | |
994 | ||
995 | r = s390_kvm_irq_to_interrupt(irq, &kvmint); | |
996 | if (r < 0) { | |
997 | fprintf(stderr, "%s called with bogus interrupt\n", __func__); | |
998 | exit(1); | |
999 | } | |
1000 | ||
1001 | r = kvm_vm_ioctl(kvm_state, KVM_S390_INTERRUPT, &kvmint); | |
1002 | if (r < 0) { | |
1003 | fprintf(stderr, "KVM failed to inject interrupt\n"); | |
1004 | exit(1); | |
1005 | } | |
1006 | } | |
1007 | ||
bbd8bb8e CH |
1008 | void kvm_s390_floating_interrupt(struct kvm_s390_irq *irq) |
1009 | { | |
1010 | static bool use_flic = true; | |
1011 | int r; | |
1012 | ||
1013 | if (use_flic) { | |
1014 | r = kvm_s390_inject_flic(irq); | |
1015 | if (r == -ENOSYS) { | |
1016 | use_flic = false; | |
1017 | } | |
1018 | if (!r) { | |
1019 | return; | |
1020 | } | |
1021 | } | |
1022 | __kvm_s390_floating_interrupt(irq); | |
1023 | } | |
1024 | ||
de13d216 | 1025 | void kvm_s390_service_interrupt(uint32_t parm) |
0e60a699 | 1026 | { |
de13d216 CH |
1027 | struct kvm_s390_irq irq = { |
1028 | .type = KVM_S390_INT_SERVICE, | |
1029 | .u.ext.ext_params = parm, | |
1030 | }; | |
0e60a699 | 1031 | |
de13d216 | 1032 | kvm_s390_floating_interrupt(&irq); |
79afc36d CH |
1033 | } |
1034 | ||
e3cfd926 | 1035 | void kvm_s390_program_interrupt(S390CPU *cpu, uint16_t code) |
0e60a699 | 1036 | { |
de13d216 CH |
1037 | struct kvm_s390_irq irq = { |
1038 | .type = KVM_S390_PROGRAM_INT, | |
1039 | .u.pgm.code = code, | |
1040 | }; | |
1041 | ||
1042 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
0e60a699 AG |
1043 | } |
1044 | ||
801cdd35 TH |
1045 | void kvm_s390_access_exception(S390CPU *cpu, uint16_t code, uint64_t te_code) |
1046 | { | |
1047 | struct kvm_s390_irq irq = { | |
1048 | .type = KVM_S390_PROGRAM_INT, | |
1049 | .u.pgm.code = code, | |
1050 | .u.pgm.trans_exc_code = te_code, | |
1051 | .u.pgm.exc_access_id = te_code & 3, | |
1052 | }; | |
1053 | ||
1054 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
1055 | } | |
1056 | ||
1bc22652 | 1057 | static int kvm_sclp_service_call(S390CPU *cpu, struct kvm_run *run, |
bcec36ea | 1058 | uint16_t ipbh0) |
0e60a699 | 1059 | { |
1bc22652 | 1060 | CPUS390XState *env = &cpu->env; |
a0fa2cb8 TH |
1061 | uint64_t sccb; |
1062 | uint32_t code; | |
0e60a699 AG |
1063 | int r = 0; |
1064 | ||
cb446eca | 1065 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1066 | sccb = env->regs[ipbh0 & 0xf]; |
1067 | code = env->regs[(ipbh0 & 0xf0) >> 4]; | |
1068 | ||
6e252802 | 1069 | r = sclp_service_call(env, sccb, code); |
9abf567d | 1070 | if (r < 0) { |
e3cfd926 | 1071 | kvm_s390_program_interrupt(cpu, -r); |
e8803d93 TH |
1072 | } else { |
1073 | setcc(cpu, r); | |
0e60a699 | 1074 | } |
81f7c56c | 1075 | |
0e60a699 AG |
1076 | return 0; |
1077 | } | |
1078 | ||
1eecf41b | 1079 | static int handle_b2(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
09b99878 | 1080 | { |
09b99878 | 1081 | CPUS390XState *env = &cpu->env; |
1eecf41b FB |
1082 | int rc = 0; |
1083 | uint16_t ipbh0 = (run->s390_sieic.ipb & 0xffff0000) >> 16; | |
3474b679 | 1084 | |
44c68de0 | 1085 | cpu_synchronize_state(CPU(cpu)); |
3474b679 | 1086 | |
09b99878 | 1087 | switch (ipa1) { |
1eecf41b | 1088 | case PRIV_B2_XSCH: |
5d9bf1c0 | 1089 | ioinst_handle_xsch(cpu, env->regs[1]); |
09b99878 | 1090 | break; |
1eecf41b | 1091 | case PRIV_B2_CSCH: |
5d9bf1c0 | 1092 | ioinst_handle_csch(cpu, env->regs[1]); |
09b99878 | 1093 | break; |
1eecf41b | 1094 | case PRIV_B2_HSCH: |
5d9bf1c0 | 1095 | ioinst_handle_hsch(cpu, env->regs[1]); |
09b99878 | 1096 | break; |
1eecf41b | 1097 | case PRIV_B2_MSCH: |
5d9bf1c0 | 1098 | ioinst_handle_msch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1099 | break; |
1eecf41b | 1100 | case PRIV_B2_SSCH: |
5d9bf1c0 | 1101 | ioinst_handle_ssch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1102 | break; |
1eecf41b | 1103 | case PRIV_B2_STCRW: |
5d9bf1c0 | 1104 | ioinst_handle_stcrw(cpu, run->s390_sieic.ipb); |
09b99878 | 1105 | break; |
1eecf41b | 1106 | case PRIV_B2_STSCH: |
5d9bf1c0 | 1107 | ioinst_handle_stsch(cpu, env->regs[1], run->s390_sieic.ipb); |
09b99878 | 1108 | break; |
1eecf41b | 1109 | case PRIV_B2_TSCH: |
09b99878 CH |
1110 | /* We should only get tsch via KVM_EXIT_S390_TSCH. */ |
1111 | fprintf(stderr, "Spurious tsch intercept\n"); | |
1112 | break; | |
1eecf41b | 1113 | case PRIV_B2_CHSC: |
5d9bf1c0 | 1114 | ioinst_handle_chsc(cpu, run->s390_sieic.ipb); |
09b99878 | 1115 | break; |
1eecf41b | 1116 | case PRIV_B2_TPI: |
09b99878 CH |
1117 | /* This should have been handled by kvm already. */ |
1118 | fprintf(stderr, "Spurious tpi intercept\n"); | |
1119 | break; | |
1eecf41b | 1120 | case PRIV_B2_SCHM: |
5d9bf1c0 TH |
1121 | ioinst_handle_schm(cpu, env->regs[1], env->regs[2], |
1122 | run->s390_sieic.ipb); | |
09b99878 | 1123 | break; |
1eecf41b | 1124 | case PRIV_B2_RSCH: |
5d9bf1c0 | 1125 | ioinst_handle_rsch(cpu, env->regs[1]); |
09b99878 | 1126 | break; |
1eecf41b | 1127 | case PRIV_B2_RCHP: |
5d9bf1c0 | 1128 | ioinst_handle_rchp(cpu, env->regs[1]); |
09b99878 | 1129 | break; |
1eecf41b | 1130 | case PRIV_B2_STCPS: |
09b99878 | 1131 | /* We do not provide this instruction, it is suppressed. */ |
09b99878 | 1132 | break; |
1eecf41b | 1133 | case PRIV_B2_SAL: |
5d9bf1c0 | 1134 | ioinst_handle_sal(cpu, env->regs[1]); |
09b99878 | 1135 | break; |
1eecf41b | 1136 | case PRIV_B2_SIGA: |
c1e8dfb5 | 1137 | /* Not provided, set CC = 3 for subchannel not operational */ |
5d9bf1c0 | 1138 | setcc(cpu, 3); |
09b99878 | 1139 | break; |
1eecf41b FB |
1140 | case PRIV_B2_SCLP_CALL: |
1141 | rc = kvm_sclp_service_call(cpu, run, ipbh0); | |
1142 | break; | |
c1e8dfb5 | 1143 | default: |
1eecf41b FB |
1144 | rc = -1; |
1145 | DPRINTF("KVM: unhandled PRIV: 0xb2%x\n", ipa1); | |
1146 | break; | |
09b99878 CH |
1147 | } |
1148 | ||
1eecf41b | 1149 | return rc; |
09b99878 CH |
1150 | } |
1151 | ||
6cb1e49d AY |
1152 | static uint64_t get_base_disp_rxy(S390CPU *cpu, struct kvm_run *run, |
1153 | uint8_t *ar) | |
863f6f52 FB |
1154 | { |
1155 | CPUS390XState *env = &cpu->env; | |
1156 | uint32_t x2 = (run->s390_sieic.ipa & 0x000f); | |
1157 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1158 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1159 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1160 | ||
1161 | if (disp2 & 0x80000) { | |
1162 | disp2 += 0xfff00000; | |
1163 | } | |
6cb1e49d AY |
1164 | if (ar) { |
1165 | *ar = base2; | |
1166 | } | |
863f6f52 FB |
1167 | |
1168 | return (base2 ? env->regs[base2] : 0) + | |
1169 | (x2 ? env->regs[x2] : 0) + (long)(int)disp2; | |
1170 | } | |
1171 | ||
6cb1e49d AY |
1172 | static uint64_t get_base_disp_rsy(S390CPU *cpu, struct kvm_run *run, |
1173 | uint8_t *ar) | |
863f6f52 FB |
1174 | { |
1175 | CPUS390XState *env = &cpu->env; | |
1176 | uint32_t base2 = run->s390_sieic.ipb >> 28; | |
1177 | uint32_t disp2 = ((run->s390_sieic.ipb & 0x0fff0000) >> 16) + | |
1178 | ((run->s390_sieic.ipb & 0xff00) << 4); | |
1179 | ||
1180 | if (disp2 & 0x80000) { | |
1181 | disp2 += 0xfff00000; | |
1182 | } | |
6cb1e49d AY |
1183 | if (ar) { |
1184 | *ar = base2; | |
1185 | } | |
863f6f52 FB |
1186 | |
1187 | return (base2 ? env->regs[base2] : 0) + (long)(int)disp2; | |
1188 | } | |
1189 | ||
1190 | static int kvm_clp_service_call(S390CPU *cpu, struct kvm_run *run) | |
1191 | { | |
1192 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1193 | ||
42f865da CH |
1194 | if (s390_has_feat(S390_FEAT_ZPCI)) { |
1195 | return clp_service_call(cpu, r2); | |
1196 | } else { | |
1197 | return -1; | |
1198 | } | |
863f6f52 FB |
1199 | } |
1200 | ||
1201 | static int kvm_pcilg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1202 | { | |
1203 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1204 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1205 | ||
42f865da CH |
1206 | if (s390_has_feat(S390_FEAT_ZPCI)) { |
1207 | return pcilg_service_call(cpu, r1, r2); | |
1208 | } else { | |
1209 | return -1; | |
1210 | } | |
863f6f52 FB |
1211 | } |
1212 | ||
1213 | static int kvm_pcistg_service_call(S390CPU *cpu, struct kvm_run *run) | |
1214 | { | |
1215 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1216 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1217 | ||
42f865da CH |
1218 | if (s390_has_feat(S390_FEAT_ZPCI)) { |
1219 | return pcistg_service_call(cpu, r1, r2); | |
1220 | } else { | |
1221 | return -1; | |
1222 | } | |
863f6f52 FB |
1223 | } |
1224 | ||
1225 | static int kvm_stpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1226 | { | |
1227 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1228 | uint64_t fiba; | |
6cb1e49d | 1229 | uint8_t ar; |
863f6f52 | 1230 | |
42f865da CH |
1231 | if (s390_has_feat(S390_FEAT_ZPCI)) { |
1232 | cpu_synchronize_state(CPU(cpu)); | |
1233 | fiba = get_base_disp_rxy(cpu, run, &ar); | |
863f6f52 | 1234 | |
42f865da CH |
1235 | return stpcifc_service_call(cpu, r1, fiba, ar); |
1236 | } else { | |
1237 | return -1; | |
1238 | } | |
863f6f52 FB |
1239 | } |
1240 | ||
1241 | static int kvm_sic_service_call(S390CPU *cpu, struct kvm_run *run) | |
1242 | { | |
2283f4d6 FL |
1243 | CPUS390XState *env = &cpu->env; |
1244 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1245 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1246 | uint8_t isc; | |
1247 | uint16_t mode; | |
1248 | int r; | |
1249 | ||
1250 | cpu_synchronize_state(CPU(cpu)); | |
1251 | mode = env->regs[r1] & 0xffff; | |
1252 | isc = (env->regs[r3] >> 27) & 0x7; | |
1253 | r = css_do_sic(env, isc, mode); | |
1254 | if (r) { | |
e3cfd926 | 1255 | kvm_s390_program_interrupt(cpu, -r); |
2283f4d6 FL |
1256 | } |
1257 | ||
863f6f52 FB |
1258 | return 0; |
1259 | } | |
1260 | ||
1261 | static int kvm_rpcit_service_call(S390CPU *cpu, struct kvm_run *run) | |
1262 | { | |
1263 | uint8_t r1 = (run->s390_sieic.ipb & 0x00f00000) >> 20; | |
1264 | uint8_t r2 = (run->s390_sieic.ipb & 0x000f0000) >> 16; | |
1265 | ||
42f865da CH |
1266 | if (s390_has_feat(S390_FEAT_ZPCI)) { |
1267 | return rpcit_service_call(cpu, r1, r2); | |
1268 | } else { | |
1269 | return -1; | |
1270 | } | |
863f6f52 FB |
1271 | } |
1272 | ||
1273 | static int kvm_pcistb_service_call(S390CPU *cpu, struct kvm_run *run) | |
1274 | { | |
1275 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1276 | uint8_t r3 = run->s390_sieic.ipa & 0x000f; | |
1277 | uint64_t gaddr; | |
6cb1e49d | 1278 | uint8_t ar; |
863f6f52 | 1279 | |
42f865da CH |
1280 | if (s390_has_feat(S390_FEAT_ZPCI)) { |
1281 | cpu_synchronize_state(CPU(cpu)); | |
1282 | gaddr = get_base_disp_rsy(cpu, run, &ar); | |
863f6f52 | 1283 | |
42f865da CH |
1284 | return pcistb_service_call(cpu, r1, r3, gaddr, ar); |
1285 | } else { | |
1286 | return -1; | |
1287 | } | |
863f6f52 FB |
1288 | } |
1289 | ||
1290 | static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) | |
1291 | { | |
1292 | uint8_t r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1293 | uint64_t fiba; | |
6cb1e49d | 1294 | uint8_t ar; |
863f6f52 | 1295 | |
42f865da CH |
1296 | if (s390_has_feat(S390_FEAT_ZPCI)) { |
1297 | cpu_synchronize_state(CPU(cpu)); | |
1298 | fiba = get_base_disp_rxy(cpu, run, &ar); | |
863f6f52 | 1299 | |
42f865da CH |
1300 | return mpcifc_service_call(cpu, r1, fiba, ar); |
1301 | } else { | |
1302 | return -1; | |
1303 | } | |
863f6f52 FB |
1304 | } |
1305 | ||
1eecf41b | 1306 | static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 AG |
1307 | { |
1308 | int r = 0; | |
0e60a699 | 1309 | |
0e60a699 | 1310 | switch (ipa1) { |
863f6f52 FB |
1311 | case PRIV_B9_CLP: |
1312 | r = kvm_clp_service_call(cpu, run); | |
1313 | break; | |
1314 | case PRIV_B9_PCISTG: | |
1315 | r = kvm_pcistg_service_call(cpu, run); | |
1316 | break; | |
1317 | case PRIV_B9_PCILG: | |
1318 | r = kvm_pcilg_service_call(cpu, run); | |
1319 | break; | |
1320 | case PRIV_B9_RPCIT: | |
1321 | r = kvm_rpcit_service_call(cpu, run); | |
1322 | break; | |
1eecf41b FB |
1323 | case PRIV_B9_EQBS: |
1324 | /* just inject exception */ | |
1325 | r = -1; | |
1326 | break; | |
1327 | default: | |
1328 | r = -1; | |
1329 | DPRINTF("KVM: unhandled PRIV: 0xb9%x\n", ipa1); | |
1330 | break; | |
1331 | } | |
1332 | ||
1333 | return r; | |
1334 | } | |
1335 | ||
80765f07 | 1336 | static int handle_eb(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1eecf41b FB |
1337 | { |
1338 | int r = 0; | |
1339 | ||
80765f07 | 1340 | switch (ipbl) { |
863f6f52 FB |
1341 | case PRIV_EB_PCISTB: |
1342 | r = kvm_pcistb_service_call(cpu, run); | |
1343 | break; | |
1344 | case PRIV_EB_SIC: | |
1345 | r = kvm_sic_service_call(cpu, run); | |
1346 | break; | |
1eecf41b FB |
1347 | case PRIV_EB_SQBS: |
1348 | /* just inject exception */ | |
1349 | r = -1; | |
1350 | break; | |
1351 | default: | |
1352 | r = -1; | |
80765f07 | 1353 | DPRINTF("KVM: unhandled PRIV: 0xeb%x\n", ipbl); |
1eecf41b | 1354 | break; |
0e60a699 AG |
1355 | } |
1356 | ||
1357 | return r; | |
1358 | } | |
1359 | ||
863f6f52 FB |
1360 | static int handle_e3(S390CPU *cpu, struct kvm_run *run, uint8_t ipbl) |
1361 | { | |
1362 | int r = 0; | |
1363 | ||
1364 | switch (ipbl) { | |
1365 | case PRIV_E3_MPCIFC: | |
1366 | r = kvm_mpcifc_service_call(cpu, run); | |
1367 | break; | |
1368 | case PRIV_E3_STPCIFC: | |
1369 | r = kvm_stpcifc_service_call(cpu, run); | |
1370 | break; | |
1371 | default: | |
1372 | r = -1; | |
1373 | DPRINTF("KVM: unhandled PRIV: 0xe3%x\n", ipbl); | |
1374 | break; | |
1375 | } | |
1376 | ||
1377 | return r; | |
1378 | } | |
1379 | ||
4fd6dd06 | 1380 | static int handle_hypercall(S390CPU *cpu, struct kvm_run *run) |
0e60a699 | 1381 | { |
4fd6dd06 | 1382 | CPUS390XState *env = &cpu->env; |
77319f22 | 1383 | int ret; |
3474b679 | 1384 | |
44c68de0 | 1385 | cpu_synchronize_state(CPU(cpu)); |
77319f22 TH |
1386 | ret = s390_virtio_hypercall(env); |
1387 | if (ret == -EINVAL) { | |
e3cfd926 | 1388 | kvm_s390_program_interrupt(cpu, PGM_SPECIFICATION); |
77319f22 TH |
1389 | return 0; |
1390 | } | |
0e60a699 | 1391 | |
77319f22 | 1392 | return ret; |
0e60a699 AG |
1393 | } |
1394 | ||
8fc639af XW |
1395 | static void kvm_handle_diag_288(S390CPU *cpu, struct kvm_run *run) |
1396 | { | |
1397 | uint64_t r1, r3; | |
1398 | int rc; | |
1399 | ||
1400 | cpu_synchronize_state(CPU(cpu)); | |
1401 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; | |
1402 | r3 = run->s390_sieic.ipa & 0x000f; | |
1403 | rc = handle_diag_288(&cpu->env, r1, r3); | |
1404 | if (rc) { | |
e3cfd926 | 1405 | kvm_s390_program_interrupt(cpu, PGM_SPECIFICATION); |
8fc639af XW |
1406 | } |
1407 | } | |
1408 | ||
268846ba ED |
1409 | static void kvm_handle_diag_308(S390CPU *cpu, struct kvm_run *run) |
1410 | { | |
1411 | uint64_t r1, r3; | |
1412 | ||
1413 | cpu_synchronize_state(CPU(cpu)); | |
20dd25bb | 1414 | r1 = (run->s390_sieic.ipa & 0x00f0) >> 4; |
268846ba ED |
1415 | r3 = run->s390_sieic.ipa & 0x000f; |
1416 | handle_diag_308(&cpu->env, r1, r3); | |
1417 | } | |
1418 | ||
b30f4dfb DH |
1419 | static int handle_sw_breakpoint(S390CPU *cpu, struct kvm_run *run) |
1420 | { | |
1421 | CPUS390XState *env = &cpu->env; | |
1422 | unsigned long pc; | |
1423 | ||
1424 | cpu_synchronize_state(CPU(cpu)); | |
1425 | ||
b60fae32 | 1426 | pc = env->psw.addr - sw_bp_ilen; |
b30f4dfb DH |
1427 | if (kvm_find_sw_breakpoint(CPU(cpu), pc)) { |
1428 | env->psw.addr = pc; | |
1429 | return EXCP_DEBUG; | |
1430 | } | |
1431 | ||
1432 | return -ENOENT; | |
1433 | } | |
1434 | ||
638129ff CH |
1435 | #define DIAG_KVM_CODE_MASK 0x000000000000ffff |
1436 | ||
1437 | static int handle_diag(S390CPU *cpu, struct kvm_run *run, uint32_t ipb) | |
0e60a699 AG |
1438 | { |
1439 | int r = 0; | |
638129ff CH |
1440 | uint16_t func_code; |
1441 | ||
1442 | /* | |
1443 | * For any diagnose call we support, bits 48-63 of the resulting | |
1444 | * address specify the function code; the remainder is ignored. | |
1445 | */ | |
6cb1e49d | 1446 | func_code = decode_basedisp_rs(&cpu->env, ipb, NULL) & DIAG_KVM_CODE_MASK; |
638129ff | 1447 | switch (func_code) { |
8fc639af XW |
1448 | case DIAG_TIMEREVENT: |
1449 | kvm_handle_diag_288(cpu, run); | |
1450 | break; | |
268846ba ED |
1451 | case DIAG_IPL: |
1452 | kvm_handle_diag_308(cpu, run); | |
1453 | break; | |
39fbc5c6 CB |
1454 | case DIAG_KVM_HYPERCALL: |
1455 | r = handle_hypercall(cpu, run); | |
1456 | break; | |
1457 | case DIAG_KVM_BREAKPOINT: | |
b30f4dfb | 1458 | r = handle_sw_breakpoint(cpu, run); |
39fbc5c6 CB |
1459 | break; |
1460 | default: | |
638129ff | 1461 | DPRINTF("KVM: unknown DIAG: 0x%x\n", func_code); |
e3cfd926 | 1462 | kvm_s390_program_interrupt(cpu, PGM_SPECIFICATION); |
39fbc5c6 | 1463 | break; |
0e60a699 AG |
1464 | } |
1465 | ||
1466 | return r; | |
1467 | } | |
1468 | ||
6eb8f212 | 1469 | typedef struct SigpInfo { |
22740e3f | 1470 | uint64_t param; |
6eb8f212 DH |
1471 | int cc; |
1472 | uint64_t *status_reg; | |
1473 | } SigpInfo; | |
1474 | ||
36b5c845 | 1475 | static void set_sigp_status(SigpInfo *si, uint64_t status) |
b20a461f | 1476 | { |
36b5c845 DH |
1477 | *si->status_reg &= 0xffffffff00000000ULL; |
1478 | *si->status_reg |= status; | |
1479 | si->cc = SIGP_CC_STATUS_STORED; | |
1480 | } | |
6e6ad8db | 1481 | |
0ea3eb65 | 1482 | static void sigp_start(CPUState *cs, run_on_cpu_data arg) |
b20a461f | 1483 | { |
e0eeb4a2 | 1484 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1485 | SigpInfo *si = arg.host_ptr; |
6e6ad8db | 1486 | |
e0eeb4a2 | 1487 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
4f2b55d1 DH |
1488 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
1489 | return; | |
1490 | } | |
1491 | ||
e0eeb4a2 | 1492 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); |
6eb8f212 | 1493 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
b20a461f TH |
1494 | } |
1495 | ||
0ea3eb65 | 1496 | static void sigp_stop(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1497 | { |
e0eeb4a2 | 1498 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1499 | SigpInfo *si = arg.host_ptr; |
18ff9494 DH |
1500 | struct kvm_s390_irq irq = { |
1501 | .type = KVM_S390_SIGP_STOP, | |
1502 | }; | |
1503 | ||
e0eeb4a2 | 1504 | if (s390_cpu_get_state(cpu) != CPU_STATE_OPERATING) { |
18ff9494 DH |
1505 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
1506 | return; | |
1507 | } | |
1508 | ||
1509 | /* disabled wait - sleeping in user space */ | |
e0eeb4a2 AB |
1510 | if (cs->halted) { |
1511 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); | |
18ff9494 DH |
1512 | } else { |
1513 | /* execute the stop function */ | |
e0eeb4a2 AB |
1514 | cpu->env.sigp_order = SIGP_STOP; |
1515 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
18ff9494 DH |
1516 | } |
1517 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1518 | } | |
1519 | ||
62deb62d FZ |
1520 | #define ADTL_GS_OFFSET 1024 /* offset of GS data in adtl save area */ |
1521 | #define ADTL_GS_MIN_SIZE 2048 /* minimal size of adtl save area for GS */ | |
1522 | static int do_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len) | |
abec5356 | 1523 | { |
62deb62d | 1524 | hwaddr save = len; |
abec5356 | 1525 | void *mem; |
abec5356 | 1526 | |
62deb62d | 1527 | mem = cpu_physical_memory_map(addr, &save, 1); |
abec5356 EF |
1528 | if (!mem) { |
1529 | return -EFAULT; | |
1530 | } | |
62deb62d | 1531 | if (save != len) { |
abec5356 EF |
1532 | cpu_physical_memory_unmap(mem, len, 1, 0); |
1533 | return -EFAULT; | |
1534 | } | |
1535 | ||
62deb62d FZ |
1536 | if (s390_has_feat(S390_FEAT_VECTOR)) { |
1537 | memcpy(mem, &cpu->env.vregs, 512); | |
1538 | } | |
1539 | if (s390_has_feat(S390_FEAT_GUARDED_STORAGE) && len >= ADTL_GS_MIN_SIZE) { | |
1540 | memcpy(mem + ADTL_GS_OFFSET, &cpu->env.gscb, 32); | |
1541 | } | |
abec5356 EF |
1542 | |
1543 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1544 | ||
1545 | return 0; | |
1546 | } | |
1547 | ||
18ff9494 DH |
1548 | #define KVM_S390_STORE_STATUS_DEF_ADDR offsetof(LowCore, floating_pt_save_area) |
1549 | #define SAVE_AREA_SIZE 512 | |
1550 | static int kvm_s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch) | |
1551 | { | |
1552 | static const uint8_t ar_id = 1; | |
1553 | uint64_t ckc = cpu->env.ckc >> 8; | |
1554 | void *mem; | |
c498d8e3 | 1555 | int i; |
18ff9494 DH |
1556 | hwaddr len = SAVE_AREA_SIZE; |
1557 | ||
1558 | mem = cpu_physical_memory_map(addr, &len, 1); | |
1559 | if (!mem) { | |
1560 | return -EFAULT; | |
1561 | } | |
1562 | if (len != SAVE_AREA_SIZE) { | |
1563 | cpu_physical_memory_unmap(mem, len, 1, 0); | |
1564 | return -EFAULT; | |
1565 | } | |
1566 | ||
1567 | if (store_arch) { | |
1568 | cpu_physical_memory_write(offsetof(LowCore, ar_access_id), &ar_id, 1); | |
1569 | } | |
c498d8e3 | 1570 | for (i = 0; i < 16; ++i) { |
182f42fd | 1571 | *((uint64_t *)mem + i) = get_freg(&cpu->env, i)->ll; |
c498d8e3 | 1572 | } |
18ff9494 DH |
1573 | memcpy(mem + 128, &cpu->env.regs, 128); |
1574 | memcpy(mem + 256, &cpu->env.psw, 16); | |
1575 | memcpy(mem + 280, &cpu->env.psa, 4); | |
1576 | memcpy(mem + 284, &cpu->env.fpc, 4); | |
1577 | memcpy(mem + 292, &cpu->env.todpr, 4); | |
1578 | memcpy(mem + 296, &cpu->env.cputm, 8); | |
1579 | memcpy(mem + 304, &ckc, 8); | |
1580 | memcpy(mem + 320, &cpu->env.aregs, 64); | |
1581 | memcpy(mem + 384, &cpu->env.cregs, 128); | |
1582 | ||
1583 | cpu_physical_memory_unmap(mem, len, 1, len); | |
1584 | ||
1585 | return 0; | |
1586 | } | |
1587 | ||
0ea3eb65 | 1588 | static void sigp_stop_and_store_status(CPUState *cs, run_on_cpu_data arg) |
18ff9494 | 1589 | { |
e0eeb4a2 | 1590 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1591 | SigpInfo *si = arg.host_ptr; |
18ff9494 DH |
1592 | struct kvm_s390_irq irq = { |
1593 | .type = KVM_S390_SIGP_STOP, | |
1594 | }; | |
1595 | ||
1596 | /* disabled wait - sleeping in user space */ | |
e0eeb4a2 AB |
1597 | if (s390_cpu_get_state(cpu) == CPU_STATE_OPERATING && cs->halted) { |
1598 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); | |
18ff9494 DH |
1599 | } |
1600 | ||
e0eeb4a2 | 1601 | switch (s390_cpu_get_state(cpu)) { |
18ff9494 | 1602 | case CPU_STATE_OPERATING: |
e0eeb4a2 AB |
1603 | cpu->env.sigp_order = SIGP_STOP_STORE_STATUS; |
1604 | kvm_s390_vcpu_interrupt(cpu, &irq); | |
18ff9494 DH |
1605 | /* store will be performed when handling the stop intercept */ |
1606 | break; | |
1607 | case CPU_STATE_STOPPED: | |
1608 | /* already stopped, just store the status */ | |
e0eeb4a2 AB |
1609 | cpu_synchronize_state(cs); |
1610 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, true); | |
18ff9494 DH |
1611 | break; |
1612 | } | |
1613 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1614 | } | |
1615 | ||
0ea3eb65 | 1616 | static void sigp_store_status_at_address(CPUState *cs, run_on_cpu_data arg) |
18ff9494 | 1617 | { |
e0eeb4a2 | 1618 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1619 | SigpInfo *si = arg.host_ptr; |
18ff9494 DH |
1620 | uint32_t address = si->param & 0x7ffffe00u; |
1621 | ||
1622 | /* cpu has to be stopped */ | |
e0eeb4a2 | 1623 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
18ff9494 DH |
1624 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); |
1625 | return; | |
1626 | } | |
1627 | ||
e0eeb4a2 | 1628 | cpu_synchronize_state(cs); |
18ff9494 | 1629 | |
e0eeb4a2 | 1630 | if (kvm_s390_store_status(cpu, address, false)) { |
18ff9494 DH |
1631 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); |
1632 | return; | |
1633 | } | |
1634 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1635 | } | |
1636 | ||
62deb62d | 1637 | #define ADTL_SAVE_LC_MASK 0xfUL |
0ea3eb65 | 1638 | static void sigp_store_adtl_status(CPUState *cs, run_on_cpu_data arg) |
abec5356 | 1639 | { |
e0eeb4a2 | 1640 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1641 | SigpInfo *si = arg.host_ptr; |
62deb62d FZ |
1642 | uint8_t lc = si->param & ADTL_SAVE_LC_MASK; |
1643 | hwaddr addr = si->param & ~ADTL_SAVE_LC_MASK; | |
1644 | hwaddr len = 1UL << (lc ? lc : 10); | |
abec5356 | 1645 | |
62deb62d FZ |
1646 | if (!s390_has_feat(S390_FEAT_VECTOR) && |
1647 | !s390_has_feat(S390_FEAT_GUARDED_STORAGE)) { | |
abec5356 EF |
1648 | set_sigp_status(si, SIGP_STAT_INVALID_ORDER); |
1649 | return; | |
1650 | } | |
1651 | ||
1652 | /* cpu has to be stopped */ | |
e0eeb4a2 | 1653 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
abec5356 EF |
1654 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); |
1655 | return; | |
1656 | } | |
1657 | ||
62deb62d FZ |
1658 | /* address must be aligned to length */ |
1659 | if (addr & (len - 1)) { | |
1660 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1661 | return; | |
1662 | } | |
1663 | ||
1664 | /* no GS: only lc == 0 is valid */ | |
1665 | if (!s390_has_feat(S390_FEAT_GUARDED_STORAGE) && | |
1666 | lc != 0) { | |
1667 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1668 | return; | |
1669 | } | |
1670 | ||
1671 | /* GS: 0, 10, 11, 12 are valid */ | |
1672 | if (s390_has_feat(S390_FEAT_GUARDED_STORAGE) && | |
1673 | lc != 0 && | |
1674 | lc != 10 && | |
1675 | lc != 11 && | |
1676 | lc != 12) { | |
abec5356 EF |
1677 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); |
1678 | return; | |
1679 | } | |
1680 | ||
e0eeb4a2 | 1681 | cpu_synchronize_state(cs); |
abec5356 | 1682 | |
62deb62d | 1683 | if (do_store_adtl_status(cpu, addr, len)) { |
abec5356 EF |
1684 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); |
1685 | return; | |
1686 | } | |
1687 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
1688 | } | |
1689 | ||
0ea3eb65 | 1690 | static void sigp_restart(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1691 | { |
e0eeb4a2 | 1692 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1693 | SigpInfo *si = arg.host_ptr; |
de13d216 CH |
1694 | struct kvm_s390_irq irq = { |
1695 | .type = KVM_S390_RESTART, | |
1696 | }; | |
1697 | ||
e0eeb4a2 | 1698 | switch (s390_cpu_get_state(cpu)) { |
e3b7b578 DH |
1699 | case CPU_STATE_STOPPED: |
1700 | /* the restart irq has to be delivered prior to any other pending irq */ | |
e0eeb4a2 AB |
1701 | cpu_synchronize_state(cs); |
1702 | do_restart_interrupt(&cpu->env); | |
1703 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); | |
e3b7b578 DH |
1704 | break; |
1705 | case CPU_STATE_OPERATING: | |
e0eeb4a2 | 1706 | kvm_s390_vcpu_interrupt(cpu, &irq); |
e3b7b578 DH |
1707 | break; |
1708 | } | |
6eb8f212 | 1709 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
6e6ad8db DH |
1710 | } |
1711 | ||
1712 | int kvm_s390_cpu_restart(S390CPU *cpu) | |
1713 | { | |
e0eeb4a2 | 1714 | SigpInfo si = {}; |
6eb8f212 | 1715 | |
14e6fe12 | 1716 | run_on_cpu(CPU(cpu), sigp_restart, RUN_ON_CPU_HOST_PTR(&si)); |
7f7f9752 | 1717 | DPRINTF("DONE: KVM cpu restart: %p\n", &cpu->env); |
0e60a699 AG |
1718 | return 0; |
1719 | } | |
1720 | ||
0ea3eb65 | 1721 | static void sigp_initial_cpu_reset(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1722 | { |
e0eeb4a2 AB |
1723 | S390CPU *cpu = S390_CPU(cs); |
1724 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
0ea3eb65 | 1725 | SigpInfo *si = arg.host_ptr; |
d5900813 | 1726 | |
6eb8f212 DH |
1727 | cpu_synchronize_state(cs); |
1728 | scc->initial_cpu_reset(cs); | |
1729 | cpu_synchronize_post_reset(cs); | |
1730 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
0e60a699 AG |
1731 | } |
1732 | ||
0ea3eb65 | 1733 | static void sigp_cpu_reset(CPUState *cs, run_on_cpu_data arg) |
04c2b516 | 1734 | { |
e0eeb4a2 AB |
1735 | S390CPU *cpu = S390_CPU(cs); |
1736 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
0ea3eb65 | 1737 | SigpInfo *si = arg.host_ptr; |
04c2b516 | 1738 | |
6eb8f212 DH |
1739 | cpu_synchronize_state(cs); |
1740 | scc->cpu_reset(cs); | |
1741 | cpu_synchronize_post_reset(cs); | |
1742 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; | |
04c2b516 TH |
1743 | } |
1744 | ||
0ea3eb65 | 1745 | static void sigp_set_prefix(CPUState *cs, run_on_cpu_data arg) |
0e60a699 | 1746 | { |
e0eeb4a2 | 1747 | S390CPU *cpu = S390_CPU(cs); |
0ea3eb65 | 1748 | SigpInfo *si = arg.host_ptr; |
18ff9494 | 1749 | uint32_t addr = si->param & 0x7fffe000u; |
0e60a699 | 1750 | |
e0eeb4a2 | 1751 | cpu_synchronize_state(cs); |
0e60a699 | 1752 | |
18ff9494 DH |
1753 | if (!address_space_access_valid(&address_space_memory, addr, |
1754 | sizeof(struct LowCore), false)) { | |
1755 | set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER); | |
1756 | return; | |
1757 | } | |
0e60a699 | 1758 | |
18ff9494 | 1759 | /* cpu has to be stopped */ |
e0eeb4a2 | 1760 | if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) { |
18ff9494 DH |
1761 | set_sigp_status(si, SIGP_STAT_INCORRECT_STATE); |
1762 | return; | |
0e60a699 AG |
1763 | } |
1764 | ||
e0eeb4a2 AB |
1765 | cpu->env.psa = addr; |
1766 | cpu_synchronize_post_init(cs); | |
18ff9494 DH |
1767 | si->cc = SIGP_CC_ORDER_CODE_ACCEPTED; |
1768 | } | |
1769 | ||
6eb8f212 | 1770 | static int handle_sigp_single_dst(S390CPU *dst_cpu, uint8_t order, |
22740e3f | 1771 | uint64_t param, uint64_t *status_reg) |
6eb8f212 DH |
1772 | { |
1773 | SigpInfo si = { | |
22740e3f | 1774 | .param = param, |
6eb8f212 DH |
1775 | .status_reg = status_reg, |
1776 | }; | |
1777 | ||
1778 | /* cpu available? */ | |
1779 | if (dst_cpu == NULL) { | |
1780 | return SIGP_CC_NOT_OPERATIONAL; | |
1781 | } | |
1782 | ||
18ff9494 DH |
1783 | /* only resets can break pending orders */ |
1784 | if (dst_cpu->env.sigp_order != 0 && | |
1785 | order != SIGP_CPU_RESET && | |
1786 | order != SIGP_INITIAL_CPU_RESET) { | |
1787 | return SIGP_CC_BUSY; | |
1788 | } | |
1789 | ||
6eb8f212 | 1790 | switch (order) { |
b20a461f | 1791 | case SIGP_START: |
14e6fe12 | 1792 | run_on_cpu(CPU(dst_cpu), sigp_start, RUN_ON_CPU_HOST_PTR(&si)); |
6eb8f212 | 1793 | break; |
18ff9494 | 1794 | case SIGP_STOP: |
14e6fe12 | 1795 | run_on_cpu(CPU(dst_cpu), sigp_stop, RUN_ON_CPU_HOST_PTR(&si)); |
b20a461f | 1796 | break; |
0b9972a2 | 1797 | case SIGP_RESTART: |
14e6fe12 | 1798 | run_on_cpu(CPU(dst_cpu), sigp_restart, RUN_ON_CPU_HOST_PTR(&si)); |
0b9972a2 | 1799 | break; |
18ff9494 | 1800 | case SIGP_STOP_STORE_STATUS: |
14e6fe12 | 1801 | run_on_cpu(CPU(dst_cpu), sigp_stop_and_store_status, RUN_ON_CPU_HOST_PTR(&si)); |
18ff9494 DH |
1802 | break; |
1803 | case SIGP_STORE_STATUS_ADDR: | |
14e6fe12 | 1804 | run_on_cpu(CPU(dst_cpu), sigp_store_status_at_address, RUN_ON_CPU_HOST_PTR(&si)); |
18ff9494 | 1805 | break; |
abec5356 | 1806 | case SIGP_STORE_ADTL_STATUS: |
14e6fe12 | 1807 | run_on_cpu(CPU(dst_cpu), sigp_store_adtl_status, RUN_ON_CPU_HOST_PTR(&si)); |
abec5356 | 1808 | break; |
18ff9494 | 1809 | case SIGP_SET_PREFIX: |
14e6fe12 | 1810 | run_on_cpu(CPU(dst_cpu), sigp_set_prefix, RUN_ON_CPU_HOST_PTR(&si)); |
0788082a | 1811 | break; |
0b9972a2 | 1812 | case SIGP_INITIAL_CPU_RESET: |
14e6fe12 | 1813 | run_on_cpu(CPU(dst_cpu), sigp_initial_cpu_reset, RUN_ON_CPU_HOST_PTR(&si)); |
0b9972a2 | 1814 | break; |
04c2b516 | 1815 | case SIGP_CPU_RESET: |
14e6fe12 | 1816 | run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, RUN_ON_CPU_HOST_PTR(&si)); |
04c2b516 | 1817 | break; |
0b9972a2 | 1818 | default: |
6eb8f212 | 1819 | DPRINTF("KVM: unknown SIGP: 0x%x\n", order); |
36b5c845 | 1820 | set_sigp_status(&si, SIGP_STAT_INVALID_ORDER); |
6eb8f212 | 1821 | } |
04c2b516 | 1822 | |
6eb8f212 | 1823 | return si.cc; |
04c2b516 TH |
1824 | } |
1825 | ||
18ff9494 DH |
1826 | static int sigp_set_architecture(S390CPU *cpu, uint32_t param, |
1827 | uint64_t *status_reg) | |
1828 | { | |
1829 | CPUState *cur_cs; | |
1830 | S390CPU *cur_cpu; | |
075e52b8 | 1831 | bool all_stopped = true; |
18ff9494 | 1832 | |
18ff9494 DH |
1833 | CPU_FOREACH(cur_cs) { |
1834 | cur_cpu = S390_CPU(cur_cs); | |
075e52b8 JH |
1835 | |
1836 | if (cur_cpu == cpu) { | |
1837 | continue; | |
18ff9494 | 1838 | } |
075e52b8 JH |
1839 | if (s390_cpu_get_state(cur_cpu) != CPU_STATE_STOPPED) { |
1840 | all_stopped = false; | |
18ff9494 DH |
1841 | } |
1842 | } | |
1843 | ||
075e52b8 | 1844 | *status_reg &= 0xffffffff00000000ULL; |
0e60a699 | 1845 | |
075e52b8 JH |
1846 | /* Reject set arch order, with czam we're always in z/Arch mode. */ |
1847 | *status_reg |= (all_stopped ? SIGP_STAT_INVALID_PARAMETER : | |
1848 | SIGP_STAT_INCORRECT_STATE); | |
1849 | return SIGP_CC_STATUS_STORED; | |
18ff9494 DH |
1850 | } |
1851 | ||
f7575c96 | 1852 | static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) |
0e60a699 | 1853 | { |
f7575c96 | 1854 | CPUS390XState *env = &cpu->env; |
6eb8f212 DH |
1855 | const uint8_t r1 = ipa1 >> 4; |
1856 | const uint8_t r3 = ipa1 & 0x0f; | |
1857 | int ret; | |
1858 | uint8_t order; | |
1859 | uint64_t *status_reg; | |
22740e3f | 1860 | uint64_t param; |
6eb8f212 | 1861 | S390CPU *dst_cpu = NULL; |
0e60a699 | 1862 | |
cb446eca | 1863 | cpu_synchronize_state(CPU(cpu)); |
0e60a699 AG |
1864 | |
1865 | /* get order code */ | |
6cb1e49d AY |
1866 | order = decode_basedisp_rs(env, run->s390_sieic.ipb, NULL) |
1867 | & SIGP_ORDER_MASK; | |
6eb8f212 | 1868 | status_reg = &env->regs[r1]; |
22740e3f | 1869 | param = (r1 % 2) ? env->regs[r1] : env->regs[r1 + 1]; |
0e60a699 | 1870 | |
f9530c32 CB |
1871 | if (qemu_mutex_trylock(&qemu_sigp_mutex)) { |
1872 | ret = SIGP_CC_BUSY; | |
1873 | goto out; | |
1874 | } | |
1875 | ||
6eb8f212 | 1876 | switch (order) { |
0b9972a2 | 1877 | case SIGP_SET_ARCH: |
18ff9494 | 1878 | ret = sigp_set_architecture(cpu, param, status_reg); |
04c2b516 | 1879 | break; |
0b9972a2 | 1880 | default: |
6eb8f212 DH |
1881 | /* all other sigp orders target a single vcpu */ |
1882 | dst_cpu = s390_cpu_addr2state(env->regs[r3]); | |
22740e3f | 1883 | ret = handle_sigp_single_dst(dst_cpu, order, param, status_reg); |
0e60a699 | 1884 | } |
f9530c32 | 1885 | qemu_mutex_unlock(&qemu_sigp_mutex); |
0e60a699 | 1886 | |
f9530c32 | 1887 | out: |
56dba22b DH |
1888 | trace_kvm_sigp_finished(order, CPU(cpu)->cpu_index, |
1889 | dst_cpu ? CPU(dst_cpu)->cpu_index : -1, ret); | |
1890 | ||
6eb8f212 DH |
1891 | if (ret >= 0) { |
1892 | setcc(cpu, ret); | |
1893 | return 0; | |
1894 | } | |
1895 | ||
1896 | return ret; | |
0e60a699 AG |
1897 | } |
1898 | ||
b30f4dfb | 1899 | static int handle_instruction(S390CPU *cpu, struct kvm_run *run) |
0e60a699 AG |
1900 | { |
1901 | unsigned int ipa0 = (run->s390_sieic.ipa & 0xff00); | |
1902 | uint8_t ipa1 = run->s390_sieic.ipa & 0x00ff; | |
d7963c43 | 1903 | int r = -1; |
0e60a699 | 1904 | |
e67137c6 PM |
1905 | DPRINTF("handle_instruction 0x%x 0x%x\n", |
1906 | run->s390_sieic.ipa, run->s390_sieic.ipb); | |
0e60a699 | 1907 | switch (ipa0) { |
09b99878 | 1908 | case IPA0_B2: |
1eecf41b FB |
1909 | r = handle_b2(cpu, run, ipa1); |
1910 | break; | |
09b99878 | 1911 | case IPA0_B9: |
1eecf41b FB |
1912 | r = handle_b9(cpu, run, ipa1); |
1913 | break; | |
09b99878 | 1914 | case IPA0_EB: |
80765f07 | 1915 | r = handle_eb(cpu, run, run->s390_sieic.ipb & 0xff); |
09b99878 | 1916 | break; |
863f6f52 FB |
1917 | case IPA0_E3: |
1918 | r = handle_e3(cpu, run, run->s390_sieic.ipb & 0xff); | |
1919 | break; | |
09b99878 | 1920 | case IPA0_DIAG: |
638129ff | 1921 | r = handle_diag(cpu, run, run->s390_sieic.ipb); |
09b99878 CH |
1922 | break; |
1923 | case IPA0_SIGP: | |
1924 | r = handle_sigp(cpu, run, ipa1); | |
1925 | break; | |
0e60a699 AG |
1926 | } |
1927 | ||
1928 | if (r < 0) { | |
b30f4dfb | 1929 | r = 0; |
e3cfd926 | 1930 | kvm_s390_program_interrupt(cpu, PGM_OPERATION); |
0e60a699 | 1931 | } |
b30f4dfb DH |
1932 | |
1933 | return r; | |
0e60a699 AG |
1934 | } |
1935 | ||
f7575c96 | 1936 | static bool is_special_wait_psw(CPUState *cs) |
eca3ed03 CB |
1937 | { |
1938 | /* signal quiesce */ | |
f7575c96 | 1939 | return cs->kvm_run->psw_addr == 0xfffUL; |
eca3ed03 CB |
1940 | } |
1941 | ||
a2689242 TH |
1942 | static void unmanageable_intercept(S390CPU *cpu, const char *str, int pswoffset) |
1943 | { | |
1944 | CPUState *cs = CPU(cpu); | |
1945 | ||
1946 | error_report("Unmanageable %s! CPU%i new PSW: 0x%016lx:%016lx", | |
1947 | str, cs->cpu_index, ldq_phys(cs->as, cpu->env.psa + pswoffset), | |
1948 | ldq_phys(cs->as, cpu->env.psa + pswoffset + 8)); | |
eb24f7c6 | 1949 | s390_cpu_halt(cpu); |
c86f106b | 1950 | qemu_system_guest_panicked(NULL); |
a2689242 TH |
1951 | } |
1952 | ||
409422cd CB |
1953 | /* try to detect pgm check loops */ |
1954 | static int handle_oper_loop(S390CPU *cpu, struct kvm_run *run) | |
1955 | { | |
1956 | CPUState *cs = CPU(cpu); | |
1957 | PSW oldpsw, newpsw; | |
1958 | ||
1959 | cpu_synchronize_state(cs); | |
1960 | newpsw.mask = ldq_phys(cs->as, cpu->env.psa + | |
1961 | offsetof(LowCore, program_new_psw)); | |
1962 | newpsw.addr = ldq_phys(cs->as, cpu->env.psa + | |
1963 | offsetof(LowCore, program_new_psw) + 8); | |
1964 | oldpsw.mask = run->psw_mask; | |
1965 | oldpsw.addr = run->psw_addr; | |
1966 | /* | |
1967 | * Avoid endless loops of operation exceptions, if the pgm new | |
1968 | * PSW will cause a new operation exception. | |
1969 | * The heuristic checks if the pgm new psw is within 6 bytes before | |
1970 | * the faulting psw address (with same DAT, AS settings) and the | |
1971 | * new psw is not a wait psw and the fault was not triggered by | |
1972 | * problem state. In that case go into crashed state. | |
1973 | */ | |
1974 | ||
1975 | if (oldpsw.addr - newpsw.addr <= 6 && | |
1976 | !(newpsw.mask & PSW_MASK_WAIT) && | |
1977 | !(oldpsw.mask & PSW_MASK_PSTATE) && | |
1978 | (newpsw.mask & PSW_MASK_ASC) == (oldpsw.mask & PSW_MASK_ASC) && | |
1979 | (newpsw.mask & PSW_MASK_DAT) == (oldpsw.mask & PSW_MASK_DAT)) { | |
1980 | unmanageable_intercept(cpu, "operation exception loop", | |
1981 | offsetof(LowCore, program_new_psw)); | |
1982 | return EXCP_HALTED; | |
1983 | } | |
1984 | return 0; | |
1985 | } | |
1986 | ||
1bc22652 | 1987 | static int handle_intercept(S390CPU *cpu) |
0e60a699 | 1988 | { |
f7575c96 AF |
1989 | CPUState *cs = CPU(cpu); |
1990 | struct kvm_run *run = cs->kvm_run; | |
0e60a699 AG |
1991 | int icpt_code = run->s390_sieic.icptcode; |
1992 | int r = 0; | |
1993 | ||
e67137c6 | 1994 | DPRINTF("intercept: 0x%x (at 0x%lx)\n", icpt_code, |
f7575c96 | 1995 | (long)cs->kvm_run->psw_addr); |
0e60a699 AG |
1996 | switch (icpt_code) { |
1997 | case ICPT_INSTRUCTION: | |
b30f4dfb | 1998 | r = handle_instruction(cpu, run); |
0e60a699 | 1999 | break; |
6449a41a TH |
2000 | case ICPT_PROGRAM: |
2001 | unmanageable_intercept(cpu, "program interrupt", | |
2002 | offsetof(LowCore, program_new_psw)); | |
2003 | r = EXCP_HALTED; | |
2004 | break; | |
a2689242 TH |
2005 | case ICPT_EXT_INT: |
2006 | unmanageable_intercept(cpu, "external interrupt", | |
2007 | offsetof(LowCore, external_new_psw)); | |
2008 | r = EXCP_HALTED; | |
2009 | break; | |
0e60a699 | 2010 | case ICPT_WAITPSW: |
08eb8c85 | 2011 | /* disabled wait, since enabled wait is handled in kernel */ |
eb24f7c6 DH |
2012 | cpu_synchronize_state(cs); |
2013 | if (s390_cpu_halt(cpu) == 0) { | |
08eb8c85 | 2014 | if (is_special_wait_psw(cs)) { |
cf83f140 | 2015 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
08eb8c85 | 2016 | } else { |
c86f106b | 2017 | qemu_system_guest_panicked(NULL); |
08eb8c85 | 2018 | } |
eca3ed03 CB |
2019 | } |
2020 | r = EXCP_HALTED; | |
2021 | break; | |
854e42f3 | 2022 | case ICPT_CPU_STOP: |
eb24f7c6 | 2023 | if (s390_cpu_set_state(CPU_STATE_STOPPED, cpu) == 0) { |
cf83f140 | 2024 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
854e42f3 | 2025 | } |
18ff9494 DH |
2026 | if (cpu->env.sigp_order == SIGP_STOP_STORE_STATUS) { |
2027 | kvm_s390_store_status(cpu, KVM_S390_STORE_STATUS_DEF_ADDR, | |
2028 | true); | |
2029 | } | |
2030 | cpu->env.sigp_order = 0; | |
854e42f3 | 2031 | r = EXCP_HALTED; |
0e60a699 | 2032 | break; |
b60fae32 | 2033 | case ICPT_OPEREXC: |
409422cd | 2034 | /* check for break points */ |
b60fae32 DH |
2035 | r = handle_sw_breakpoint(cpu, run); |
2036 | if (r == -ENOENT) { | |
409422cd CB |
2037 | /* Then check for potential pgm check loops */ |
2038 | r = handle_oper_loop(cpu, run); | |
2039 | if (r == 0) { | |
e3cfd926 | 2040 | kvm_s390_program_interrupt(cpu, PGM_OPERATION); |
409422cd | 2041 | } |
b60fae32 DH |
2042 | } |
2043 | break; | |
0e60a699 AG |
2044 | case ICPT_SOFT_INTERCEPT: |
2045 | fprintf(stderr, "KVM unimplemented icpt SOFT\n"); | |
2046 | exit(1); | |
2047 | break; | |
0e60a699 AG |
2048 | case ICPT_IO: |
2049 | fprintf(stderr, "KVM unimplemented icpt IO\n"); | |
2050 | exit(1); | |
2051 | break; | |
2052 | default: | |
2053 | fprintf(stderr, "Unknown intercept code: %d\n", icpt_code); | |
2054 | exit(1); | |
2055 | break; | |
2056 | } | |
2057 | ||
2058 | return r; | |
2059 | } | |
2060 | ||
09b99878 CH |
2061 | static int handle_tsch(S390CPU *cpu) |
2062 | { | |
09b99878 CH |
2063 | CPUState *cs = CPU(cpu); |
2064 | struct kvm_run *run = cs->kvm_run; | |
2065 | int ret; | |
2066 | ||
44c68de0 | 2067 | cpu_synchronize_state(cs); |
3474b679 | 2068 | |
653b0809 TH |
2069 | ret = ioinst_handle_tsch(cpu, cpu->env.regs[1], run->s390_tsch.ipb); |
2070 | if (ret < 0) { | |
09b99878 CH |
2071 | /* |
2072 | * Failure. | |
2073 | * If an I/O interrupt had been dequeued, we have to reinject it. | |
2074 | */ | |
2075 | if (run->s390_tsch.dequeued) { | |
de13d216 CH |
2076 | kvm_s390_io_interrupt(run->s390_tsch.subchannel_id, |
2077 | run->s390_tsch.subchannel_nr, | |
2078 | run->s390_tsch.io_int_parm, | |
2079 | run->s390_tsch.io_int_word); | |
09b99878 CH |
2080 | } |
2081 | ret = 0; | |
2082 | } | |
2083 | return ret; | |
2084 | } | |
2085 | ||
6cb1e49d | 2086 | static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr, uint8_t ar) |
f07177a5 ET |
2087 | { |
2088 | struct sysib_322 sysib; | |
2089 | int del; | |
2090 | ||
6cb1e49d | 2091 | if (s390_cpu_virt_mem_read(cpu, addr, ar, &sysib, sizeof(sysib))) { |
f07177a5 ET |
2092 | return; |
2093 | } | |
2094 | /* Shift the stack of Extended Names to prepare for our own data */ | |
2095 | memmove(&sysib.ext_names[1], &sysib.ext_names[0], | |
2096 | sizeof(sysib.ext_names[0]) * (sysib.count - 1)); | |
2097 | /* First virt level, that doesn't provide Ext Names delimits stack. It is | |
2098 | * assumed it's not capable of managing Extended Names for lower levels. | |
2099 | */ | |
2100 | for (del = 1; del < sysib.count; del++) { | |
2101 | if (!sysib.vm[del].ext_name_encoding || !sysib.ext_names[del][0]) { | |
2102 | break; | |
2103 | } | |
2104 | } | |
2105 | if (del < sysib.count) { | |
2106 | memset(sysib.ext_names[del], 0, | |
2107 | sizeof(sysib.ext_names[0]) * (sysib.count - del)); | |
2108 | } | |
2109 | /* Insert short machine name in EBCDIC, padded with blanks */ | |
2110 | if (qemu_name) { | |
2111 | memset(sysib.vm[0].name, 0x40, sizeof(sysib.vm[0].name)); | |
2112 | ebcdic_put(sysib.vm[0].name, qemu_name, MIN(sizeof(sysib.vm[0].name), | |
2113 | strlen(qemu_name))); | |
2114 | } | |
2115 | sysib.vm[0].ext_name_encoding = 2; /* 2 = UTF-8 */ | |
2116 | memset(sysib.ext_names[0], 0, sizeof(sysib.ext_names[0])); | |
2117 | /* If hypervisor specifies zero Extended Name in STSI322 SYSIB, it's | |
2118 | * considered by s390 as not capable of providing any Extended Name. | |
2119 | * Therefore if no name was specified on qemu invocation, we go with the | |
2120 | * same "KVMguest" default, which KVM has filled into short name field. | |
2121 | */ | |
2122 | if (qemu_name) { | |
2123 | strncpy((char *)sysib.ext_names[0], qemu_name, | |
2124 | sizeof(sysib.ext_names[0])); | |
2125 | } else { | |
2126 | strcpy((char *)sysib.ext_names[0], "KVMguest"); | |
2127 | } | |
2128 | /* Insert UUID */ | |
794afd70 | 2129 | memcpy(sysib.vm[0].uuid, &qemu_uuid, sizeof(sysib.vm[0].uuid)); |
f07177a5 | 2130 | |
6cb1e49d | 2131 | s390_cpu_virt_mem_write(cpu, addr, ar, &sysib, sizeof(sysib)); |
f07177a5 ET |
2132 | } |
2133 | ||
2134 | static int handle_stsi(S390CPU *cpu) | |
2135 | { | |
2136 | CPUState *cs = CPU(cpu); | |
2137 | struct kvm_run *run = cs->kvm_run; | |
2138 | ||
2139 | switch (run->s390_stsi.fc) { | |
2140 | case 3: | |
2141 | if (run->s390_stsi.sel1 != 2 || run->s390_stsi.sel2 != 2) { | |
2142 | return 0; | |
2143 | } | |
2144 | /* Only sysib 3.2.2 needs post-handling for now. */ | |
6cb1e49d | 2145 | insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); |
f07177a5 ET |
2146 | return 0; |
2147 | default: | |
2148 | return 0; | |
2149 | } | |
2150 | } | |
2151 | ||
8c012449 DH |
2152 | static int kvm_arch_handle_debug_exit(S390CPU *cpu) |
2153 | { | |
770a6379 DH |
2154 | CPUState *cs = CPU(cpu); |
2155 | struct kvm_run *run = cs->kvm_run; | |
2156 | ||
2157 | int ret = 0; | |
2158 | struct kvm_debug_exit_arch *arch_info = &run->debug.arch; | |
2159 | ||
2160 | switch (arch_info->type) { | |
2161 | case KVM_HW_WP_WRITE: | |
2162 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
2163 | cs->watchpoint_hit = &hw_watchpoint; | |
2164 | hw_watchpoint.vaddr = arch_info->addr; | |
2165 | hw_watchpoint.flags = BP_MEM_WRITE; | |
2166 | ret = EXCP_DEBUG; | |
2167 | } | |
2168 | break; | |
2169 | case KVM_HW_BP: | |
2170 | if (find_hw_breakpoint(arch_info->addr, -1, arch_info->type)) { | |
2171 | ret = EXCP_DEBUG; | |
2172 | } | |
2173 | break; | |
2174 | case KVM_SINGLESTEP: | |
2175 | if (cs->singlestep_enabled) { | |
2176 | ret = EXCP_DEBUG; | |
2177 | } | |
2178 | break; | |
2179 | default: | |
2180 | ret = -ENOSYS; | |
2181 | } | |
2182 | ||
2183 | return ret; | |
8c012449 DH |
2184 | } |
2185 | ||
20d695a9 | 2186 | int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) |
0e60a699 | 2187 | { |
20d695a9 | 2188 | S390CPU *cpu = S390_CPU(cs); |
0e60a699 AG |
2189 | int ret = 0; |
2190 | ||
4b8523ee JK |
2191 | qemu_mutex_lock_iothread(); |
2192 | ||
0e60a699 AG |
2193 | switch (run->exit_reason) { |
2194 | case KVM_EXIT_S390_SIEIC: | |
1bc22652 | 2195 | ret = handle_intercept(cpu); |
0e60a699 AG |
2196 | break; |
2197 | case KVM_EXIT_S390_RESET: | |
e91e972c | 2198 | s390_reipl_request(); |
0e60a699 | 2199 | break; |
09b99878 CH |
2200 | case KVM_EXIT_S390_TSCH: |
2201 | ret = handle_tsch(cpu); | |
2202 | break; | |
f07177a5 ET |
2203 | case KVM_EXIT_S390_STSI: |
2204 | ret = handle_stsi(cpu); | |
2205 | break; | |
8c012449 DH |
2206 | case KVM_EXIT_DEBUG: |
2207 | ret = kvm_arch_handle_debug_exit(cpu); | |
2208 | break; | |
0e60a699 AG |
2209 | default: |
2210 | fprintf(stderr, "Unknown KVM exit: %d\n", run->exit_reason); | |
2211 | break; | |
2212 | } | |
4b8523ee | 2213 | qemu_mutex_unlock_iothread(); |
0e60a699 | 2214 | |
bb4ea393 JK |
2215 | if (ret == 0) { |
2216 | ret = EXCP_INTERRUPT; | |
bb4ea393 | 2217 | } |
0e60a699 AG |
2218 | return ret; |
2219 | } | |
4513d923 | 2220 | |
20d695a9 | 2221 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu) |
4513d923 GN |
2222 | { |
2223 | return true; | |
2224 | } | |
a1b87fe0 | 2225 | |
de13d216 | 2226 | void kvm_s390_io_interrupt(uint16_t subchannel_id, |
09b99878 CH |
2227 | uint16_t subchannel_nr, uint32_t io_int_parm, |
2228 | uint32_t io_int_word) | |
2229 | { | |
de13d216 CH |
2230 | struct kvm_s390_irq irq = { |
2231 | .u.io.subchannel_id = subchannel_id, | |
2232 | .u.io.subchannel_nr = subchannel_nr, | |
2233 | .u.io.io_int_parm = io_int_parm, | |
2234 | .u.io.io_int_word = io_int_word, | |
2235 | }; | |
09b99878 | 2236 | |
7e749462 | 2237 | if (io_int_word & IO_INT_WORD_AI) { |
de13d216 | 2238 | irq.type = KVM_S390_INT_IO(1, 0, 0, 0); |
7e749462 | 2239 | } else { |
393ad2a4 CB |
2240 | irq.type = KVM_S390_INT_IO(0, (subchannel_id & 0xff00) >> 8, |
2241 | (subchannel_id & 0x0006), | |
2242 | subchannel_nr); | |
7e749462 | 2243 | } |
de13d216 | 2244 | kvm_s390_floating_interrupt(&irq); |
09b99878 CH |
2245 | } |
2246 | ||
b080364a CH |
2247 | static uint64_t build_channel_report_mcic(void) |
2248 | { | |
2249 | uint64_t mcic; | |
2250 | ||
2251 | /* subclass: indicate channel report pending */ | |
2252 | mcic = MCIC_SC_CP | | |
2253 | /* subclass modifiers: none */ | |
2254 | /* storage errors: none */ | |
2255 | /* validity bits: no damage */ | |
2256 | MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP | | |
2257 | MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR | | |
2258 | MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC; | |
7c72ac49 | 2259 | if (s390_has_feat(S390_FEAT_VECTOR)) { |
b080364a CH |
2260 | mcic |= MCIC_VB_VR; |
2261 | } | |
62deb62d FZ |
2262 | if (s390_has_feat(S390_FEAT_GUARDED_STORAGE)) { |
2263 | mcic |= MCIC_VB_GS; | |
2264 | } | |
b080364a CH |
2265 | return mcic; |
2266 | } | |
2267 | ||
de13d216 | 2268 | void kvm_s390_crw_mchk(void) |
09b99878 | 2269 | { |
de13d216 CH |
2270 | struct kvm_s390_irq irq = { |
2271 | .type = KVM_S390_MCHK, | |
2272 | .u.mchk.cr14 = 1 << 28, | |
b080364a | 2273 | .u.mchk.mcic = build_channel_report_mcic(), |
de13d216 CH |
2274 | }; |
2275 | kvm_s390_floating_interrupt(&irq); | |
09b99878 CH |
2276 | } |
2277 | ||
2278 | void kvm_s390_enable_css_support(S390CPU *cpu) | |
2279 | { | |
09b99878 CH |
2280 | int r; |
2281 | ||
2282 | /* Activate host kernel channel subsystem support. */ | |
e080f0fd | 2283 | r = kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_S390_CSS_SUPPORT, 0); |
09b99878 CH |
2284 | assert(r == 0); |
2285 | } | |
48475e14 AK |
2286 | |
2287 | void kvm_arch_init_irq_routing(KVMState *s) | |
2288 | { | |
d426d9fb CH |
2289 | /* |
2290 | * Note that while irqchip capabilities generally imply that cpustates | |
2291 | * are handled in-kernel, it is not true for s390 (yet); therefore, we | |
2292 | * have to override the common code kvm_halt_in_kernel_allowed setting. | |
2293 | */ | |
2294 | if (kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) { | |
d426d9fb CH |
2295 | kvm_gsi_routing_allowed = true; |
2296 | kvm_halt_in_kernel_allowed = false; | |
2297 | } | |
48475e14 | 2298 | } |
b4436a0b | 2299 | |
cc3ac9c4 CH |
2300 | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch, |
2301 | int vq, bool assign) | |
b4436a0b CH |
2302 | { |
2303 | struct kvm_ioeventfd kick = { | |
2304 | .flags = KVM_IOEVENTFD_FLAG_VIRTIO_CCW_NOTIFY | | |
2305 | KVM_IOEVENTFD_FLAG_DATAMATCH, | |
cc3ac9c4 | 2306 | .fd = event_notifier_get_fd(notifier), |
b4436a0b CH |
2307 | .datamatch = vq, |
2308 | .addr = sch, | |
2309 | .len = 8, | |
2310 | }; | |
2311 | if (!kvm_check_extension(kvm_state, KVM_CAP_IOEVENTFD)) { | |
2312 | return -ENOSYS; | |
2313 | } | |
2314 | if (!assign) { | |
2315 | kick.flags |= KVM_IOEVENTFD_FLAG_DEASSIGN; | |
2316 | } | |
2317 | return kvm_vm_ioctl(kvm_state, KVM_IOEVENTFD, &kick); | |
2318 | } | |
1def6656 | 2319 | |
fba5f6fe | 2320 | int kvm_s390_get_memslot_count(void) |
1def6656 | 2321 | { |
fba5f6fe | 2322 | return kvm_check_extension(kvm_state, KVM_CAP_NR_MEMSLOTS); |
1def6656 | 2323 | } |
c9e659c9 | 2324 | |
9700230b FZ |
2325 | int kvm_s390_get_ri(void) |
2326 | { | |
2327 | return cap_ri; | |
2328 | } | |
2329 | ||
62deb62d FZ |
2330 | int kvm_s390_get_gs(void) |
2331 | { | |
2332 | return cap_gs; | |
2333 | } | |
2334 | ||
c9e659c9 DH |
2335 | int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state) |
2336 | { | |
2337 | struct kvm_mp_state mp_state = {}; | |
2338 | int ret; | |
2339 | ||
2340 | /* the kvm part might not have been initialized yet */ | |
2341 | if (CPU(cpu)->kvm_state == NULL) { | |
2342 | return 0; | |
2343 | } | |
2344 | ||
2345 | switch (cpu_state) { | |
2346 | case CPU_STATE_STOPPED: | |
2347 | mp_state.mp_state = KVM_MP_STATE_STOPPED; | |
2348 | break; | |
2349 | case CPU_STATE_CHECK_STOP: | |
2350 | mp_state.mp_state = KVM_MP_STATE_CHECK_STOP; | |
2351 | break; | |
2352 | case CPU_STATE_OPERATING: | |
2353 | mp_state.mp_state = KVM_MP_STATE_OPERATING; | |
2354 | break; | |
2355 | case CPU_STATE_LOAD: | |
2356 | mp_state.mp_state = KVM_MP_STATE_LOAD; | |
2357 | break; | |
2358 | default: | |
2359 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
2360 | cpu_state); | |
2361 | exit(1); | |
2362 | } | |
2363 | ||
2364 | ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); | |
2365 | if (ret) { | |
2366 | trace_kvm_failed_cpu_state_set(CPU(cpu)->cpu_index, cpu_state, | |
2367 | strerror(-ret)); | |
2368 | } | |
2369 | ||
2370 | return ret; | |
2371 | } | |
9e03a040 | 2372 | |
3cda44f7 JF |
2373 | void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu) |
2374 | { | |
2375 | struct kvm_s390_irq_state irq_state; | |
2376 | CPUState *cs = CPU(cpu); | |
2377 | int32_t bytes; | |
2378 | ||
2379 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { | |
2380 | return; | |
2381 | } | |
2382 | ||
2383 | irq_state.buf = (uint64_t) cpu->irqstate; | |
2384 | irq_state.len = VCPU_IRQ_BUF_SIZE; | |
2385 | ||
2386 | bytes = kvm_vcpu_ioctl(cs, KVM_S390_GET_IRQ_STATE, &irq_state); | |
2387 | if (bytes < 0) { | |
2388 | cpu->irqstate_saved_size = 0; | |
2389 | error_report("Migration of interrupt state failed"); | |
2390 | return; | |
2391 | } | |
2392 | ||
2393 | cpu->irqstate_saved_size = bytes; | |
2394 | } | |
2395 | ||
2396 | int kvm_s390_vcpu_interrupt_post_load(S390CPU *cpu) | |
2397 | { | |
2398 | CPUState *cs = CPU(cpu); | |
2399 | struct kvm_s390_irq_state irq_state; | |
2400 | int r; | |
2401 | ||
b853d4cb SS |
2402 | if (cpu->irqstate_saved_size == 0) { |
2403 | return 0; | |
2404 | } | |
2405 | ||
3cda44f7 JF |
2406 | if (!kvm_check_extension(kvm_state, KVM_CAP_S390_IRQ_STATE)) { |
2407 | return -ENOSYS; | |
2408 | } | |
2409 | ||
3cda44f7 JF |
2410 | irq_state.buf = (uint64_t) cpu->irqstate; |
2411 | irq_state.len = cpu->irqstate_saved_size; | |
2412 | ||
2413 | r = kvm_vcpu_ioctl(cs, KVM_S390_SET_IRQ_STATE, &irq_state); | |
2414 | if (r) { | |
2415 | error_report("Setting interrupt state failed %d", r); | |
2416 | } | |
2417 | return r; | |
2418 | } | |
2419 | ||
9e03a040 | 2420 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
dc9f06ca | 2421 | uint64_t address, uint32_t data, PCIDevice *dev) |
9e03a040 FB |
2422 | { |
2423 | S390PCIBusDevice *pbdev; | |
cdd85eb2 | 2424 | uint32_t idx = data >> ZPCI_MSI_VEC_BITS; |
9e03a040 FB |
2425 | uint32_t vec = data & ZPCI_MSI_VEC_MASK; |
2426 | ||
a975a24a | 2427 | pbdev = s390_pci_find_dev_by_idx(s390_get_phb(), idx); |
9e03a040 FB |
2428 | if (!pbdev) { |
2429 | DPRINTF("add_msi_route no dev\n"); | |
2430 | return -ENODEV; | |
2431 | } | |
2432 | ||
2433 | pbdev->routes.adapter.ind_offset = vec; | |
2434 | ||
2435 | route->type = KVM_IRQ_ROUTING_S390_ADAPTER; | |
2436 | route->flags = 0; | |
2437 | route->u.adapter.summary_addr = pbdev->routes.adapter.summary_addr; | |
2438 | route->u.adapter.ind_addr = pbdev->routes.adapter.ind_addr; | |
2439 | route->u.adapter.summary_offset = pbdev->routes.adapter.summary_offset; | |
2440 | route->u.adapter.ind_offset = pbdev->routes.adapter.ind_offset; | |
2441 | route->u.adapter.adapter_id = pbdev->routes.adapter.adapter_id; | |
2442 | return 0; | |
2443 | } | |
1850b6b7 | 2444 | |
38d87493 PX |
2445 | int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, |
2446 | int vector, PCIDevice *dev) | |
2447 | { | |
2448 | return 0; | |
2449 | } | |
2450 | ||
2451 | int kvm_arch_release_virq_post(int virq) | |
2452 | { | |
2453 | return 0; | |
2454 | } | |
2455 | ||
1850b6b7 EA |
2456 | int kvm_arch_msi_data_to_gsi(uint32_t data) |
2457 | { | |
2458 | abort(); | |
2459 | } | |
3b84c25c | 2460 | |
3b84c25c DH |
2461 | static int query_cpu_subfunc(S390FeatBitmap features) |
2462 | { | |
2463 | struct kvm_s390_vm_cpu_subfunc prop; | |
2464 | struct kvm_device_attr attr = { | |
2465 | .group = KVM_S390_VM_CPU_MODEL, | |
2466 | .attr = KVM_S390_VM_CPU_MACHINE_SUBFUNC, | |
2467 | .addr = (uint64_t) &prop, | |
2468 | }; | |
2469 | int rc; | |
2470 | ||
2471 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2472 | if (rc) { | |
2473 | return rc; | |
2474 | } | |
2475 | ||
2476 | /* | |
2477 | * We're going to add all subfunctions now, if the corresponding feature | |
2478 | * is available that unlocks the query functions. | |
2479 | */ | |
2480 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PLO, prop.plo); | |
2481 | if (test_bit(S390_FEAT_TOD_CLOCK_STEERING, features)) { | |
2482 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PTFF, prop.ptff); | |
2483 | } | |
2484 | if (test_bit(S390_FEAT_MSA, features)) { | |
2485 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMAC, prop.kmac); | |
2486 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMC, prop.kmc); | |
2487 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KM, prop.km); | |
2488 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KIMD, prop.kimd); | |
2489 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KLMD, prop.klmd); | |
2490 | } | |
2491 | if (test_bit(S390_FEAT_MSA_EXT_3, features)) { | |
2492 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PCKMO, prop.pckmo); | |
2493 | } | |
2494 | if (test_bit(S390_FEAT_MSA_EXT_4, features)) { | |
2495 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMCTR, prop.kmctr); | |
2496 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMF, prop.kmf); | |
2497 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMO, prop.kmo); | |
2498 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PCC, prop.pcc); | |
2499 | } | |
2500 | if (test_bit(S390_FEAT_MSA_EXT_5, features)) { | |
2501 | s390_add_from_feat_block(features, S390_FEAT_TYPE_PPNO, prop.ppno); | |
2502 | } | |
6da5c593 JH |
2503 | if (test_bit(S390_FEAT_MSA_EXT_8, features)) { |
2504 | s390_add_from_feat_block(features, S390_FEAT_TYPE_KMA, prop.kma); | |
2505 | } | |
3b84c25c DH |
2506 | return 0; |
2507 | } | |
2508 | ||
2509 | static int configure_cpu_subfunc(const S390FeatBitmap features) | |
2510 | { | |
2511 | struct kvm_s390_vm_cpu_subfunc prop = {}; | |
2512 | struct kvm_device_attr attr = { | |
2513 | .group = KVM_S390_VM_CPU_MODEL, | |
2514 | .attr = KVM_S390_VM_CPU_PROCESSOR_SUBFUNC, | |
2515 | .addr = (uint64_t) &prop, | |
2516 | }; | |
2517 | ||
2518 | if (!kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2519 | KVM_S390_VM_CPU_PROCESSOR_SUBFUNC)) { | |
2520 | /* hardware support might be missing, IBC will handle most of this */ | |
2521 | return 0; | |
2522 | } | |
2523 | ||
2524 | s390_fill_feat_block(features, S390_FEAT_TYPE_PLO, prop.plo); | |
2525 | if (test_bit(S390_FEAT_TOD_CLOCK_STEERING, features)) { | |
2526 | s390_fill_feat_block(features, S390_FEAT_TYPE_PTFF, prop.ptff); | |
3b84c25c DH |
2527 | } |
2528 | if (test_bit(S390_FEAT_MSA, features)) { | |
2529 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMAC, prop.kmac); | |
3b84c25c | 2530 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMC, prop.kmc); |
3b84c25c | 2531 | s390_fill_feat_block(features, S390_FEAT_TYPE_KM, prop.km); |
3b84c25c | 2532 | s390_fill_feat_block(features, S390_FEAT_TYPE_KIMD, prop.kimd); |
3b84c25c | 2533 | s390_fill_feat_block(features, S390_FEAT_TYPE_KLMD, prop.klmd); |
3b84c25c DH |
2534 | } |
2535 | if (test_bit(S390_FEAT_MSA_EXT_3, features)) { | |
2536 | s390_fill_feat_block(features, S390_FEAT_TYPE_PCKMO, prop.pckmo); | |
3b84c25c DH |
2537 | } |
2538 | if (test_bit(S390_FEAT_MSA_EXT_4, features)) { | |
2539 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMCTR, prop.kmctr); | |
3b84c25c | 2540 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMF, prop.kmf); |
3b84c25c | 2541 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMO, prop.kmo); |
3b84c25c | 2542 | s390_fill_feat_block(features, S390_FEAT_TYPE_PCC, prop.pcc); |
3b84c25c DH |
2543 | } |
2544 | if (test_bit(S390_FEAT_MSA_EXT_5, features)) { | |
2545 | s390_fill_feat_block(features, S390_FEAT_TYPE_PPNO, prop.ppno); | |
3b84c25c | 2546 | } |
6da5c593 JH |
2547 | if (test_bit(S390_FEAT_MSA_EXT_8, features)) { |
2548 | s390_fill_feat_block(features, S390_FEAT_TYPE_KMA, prop.kma); | |
6da5c593 | 2549 | } |
3b84c25c DH |
2550 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); |
2551 | } | |
2552 | ||
2553 | static int kvm_to_feat[][2] = { | |
2554 | { KVM_S390_VM_CPU_FEAT_ESOP, S390_FEAT_ESOP }, | |
2555 | { KVM_S390_VM_CPU_FEAT_SIEF2, S390_FEAT_SIE_F2 }, | |
2556 | { KVM_S390_VM_CPU_FEAT_64BSCAO , S390_FEAT_SIE_64BSCAO }, | |
2557 | { KVM_S390_VM_CPU_FEAT_SIIF, S390_FEAT_SIE_SIIF }, | |
2558 | { KVM_S390_VM_CPU_FEAT_GPERE, S390_FEAT_SIE_GPERE }, | |
2559 | { KVM_S390_VM_CPU_FEAT_GSLS, S390_FEAT_SIE_GSLS }, | |
2560 | { KVM_S390_VM_CPU_FEAT_IB, S390_FEAT_SIE_IB }, | |
2561 | { KVM_S390_VM_CPU_FEAT_CEI, S390_FEAT_SIE_CEI }, | |
2562 | { KVM_S390_VM_CPU_FEAT_IBS, S390_FEAT_SIE_IBS }, | |
2563 | { KVM_S390_VM_CPU_FEAT_SKEY, S390_FEAT_SIE_SKEY }, | |
2564 | { KVM_S390_VM_CPU_FEAT_CMMA, S390_FEAT_SIE_CMMA }, | |
2565 | { KVM_S390_VM_CPU_FEAT_PFMFI, S390_FEAT_SIE_PFMFI}, | |
2566 | { KVM_S390_VM_CPU_FEAT_SIGPIF, S390_FEAT_SIE_SIGPIF}, | |
c0a9cd94 | 2567 | { KVM_S390_VM_CPU_FEAT_KSS, S390_FEAT_SIE_KSS}, |
3b84c25c DH |
2568 | }; |
2569 | ||
2570 | static int query_cpu_feat(S390FeatBitmap features) | |
2571 | { | |
2572 | struct kvm_s390_vm_cpu_feat prop; | |
2573 | struct kvm_device_attr attr = { | |
2574 | .group = KVM_S390_VM_CPU_MODEL, | |
2575 | .attr = KVM_S390_VM_CPU_MACHINE_FEAT, | |
2576 | .addr = (uint64_t) &prop, | |
2577 | }; | |
2578 | int rc; | |
2579 | int i; | |
2580 | ||
2581 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2582 | if (rc) { | |
2583 | return rc; | |
2584 | } | |
2585 | ||
2586 | for (i = 0; i < ARRAY_SIZE(kvm_to_feat); i++) { | |
3d1cfc3c | 2587 | if (test_be_bit(kvm_to_feat[i][0], (uint8_t *) prop.feat)) { |
3b84c25c DH |
2588 | set_bit(kvm_to_feat[i][1], features); |
2589 | } | |
2590 | } | |
2591 | return 0; | |
2592 | } | |
2593 | ||
2594 | static int configure_cpu_feat(const S390FeatBitmap features) | |
2595 | { | |
2596 | struct kvm_s390_vm_cpu_feat prop = {}; | |
2597 | struct kvm_device_attr attr = { | |
2598 | .group = KVM_S390_VM_CPU_MODEL, | |
2599 | .attr = KVM_S390_VM_CPU_PROCESSOR_FEAT, | |
2600 | .addr = (uint64_t) &prop, | |
2601 | }; | |
2602 | int i; | |
2603 | ||
2604 | for (i = 0; i < ARRAY_SIZE(kvm_to_feat); i++) { | |
2605 | if (test_bit(kvm_to_feat[i][1], features)) { | |
3d1cfc3c | 2606 | set_be_bit(kvm_to_feat[i][0], (uint8_t *) prop.feat); |
3b84c25c DH |
2607 | } |
2608 | } | |
2609 | return kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2610 | } | |
2611 | ||
2612 | bool kvm_s390_cpu_models_supported(void) | |
2613 | { | |
e73316d5 | 2614 | if (!cpu_model_allowed()) { |
34821036 DH |
2615 | /* compatibility machines interfere with the cpu model */ |
2616 | return false; | |
2617 | } | |
3b84c25c DH |
2618 | return kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, |
2619 | KVM_S390_VM_CPU_MACHINE) && | |
2620 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2621 | KVM_S390_VM_CPU_PROCESSOR) && | |
2622 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2623 | KVM_S390_VM_CPU_MACHINE_FEAT) && | |
2624 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2625 | KVM_S390_VM_CPU_PROCESSOR_FEAT) && | |
2626 | kvm_vm_check_attr(kvm_state, KVM_S390_VM_CPU_MODEL, | |
2627 | KVM_S390_VM_CPU_MACHINE_SUBFUNC); | |
2628 | } | |
2629 | ||
2630 | void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp) | |
2631 | { | |
2632 | struct kvm_s390_vm_cpu_machine prop = {}; | |
2633 | struct kvm_device_attr attr = { | |
2634 | .group = KVM_S390_VM_CPU_MODEL, | |
2635 | .attr = KVM_S390_VM_CPU_MACHINE, | |
2636 | .addr = (uint64_t) &prop, | |
2637 | }; | |
2638 | uint16_t unblocked_ibc = 0, cpu_type = 0; | |
2639 | int rc; | |
2640 | ||
2641 | memset(model, 0, sizeof(*model)); | |
2642 | ||
2643 | if (!kvm_s390_cpu_models_supported()) { | |
2644 | error_setg(errp, "KVM doesn't support CPU models"); | |
2645 | return; | |
2646 | } | |
2647 | ||
2648 | /* query the basic cpu model properties */ | |
2649 | rc = kvm_vm_ioctl(kvm_state, KVM_GET_DEVICE_ATTR, &attr); | |
2650 | if (rc) { | |
2651 | error_setg(errp, "KVM: Error querying host CPU model: %d", rc); | |
2652 | return; | |
2653 | } | |
2654 | ||
2655 | cpu_type = cpuid_type(prop.cpuid); | |
2656 | if (has_ibc(prop.ibc)) { | |
2657 | model->lowest_ibc = lowest_ibc(prop.ibc); | |
2658 | unblocked_ibc = unblocked_ibc(prop.ibc); | |
2659 | } | |
2660 | model->cpu_id = cpuid_id(prop.cpuid); | |
64bc98f4 | 2661 | model->cpu_id_format = cpuid_format(prop.cpuid); |
3b84c25c DH |
2662 | model->cpu_ver = 0xff; |
2663 | ||
2664 | /* get supported cpu features indicated via STFL(E) */ | |
2665 | s390_add_from_feat_block(model->features, S390_FEAT_TYPE_STFL, | |
2666 | (uint8_t *) prop.fac_mask); | |
2667 | /* dat-enhancement facility 2 has no bit but was introduced with stfle */ | |
2668 | if (test_bit(S390_FEAT_STFLE, model->features)) { | |
2669 | set_bit(S390_FEAT_DAT_ENH_2, model->features); | |
2670 | } | |
2671 | /* get supported cpu features indicated e.g. via SCLP */ | |
2672 | rc = query_cpu_feat(model->features); | |
2673 | if (rc) { | |
2674 | error_setg(errp, "KVM: Error querying CPU features: %d", rc); | |
2675 | return; | |
2676 | } | |
2677 | /* get supported cpu subfunctions indicated via query / test bit */ | |
2678 | rc = query_cpu_subfunc(model->features); | |
2679 | if (rc) { | |
2680 | error_setg(errp, "KVM: Error querying CPU subfunctions: %d", rc); | |
2681 | return; | |
2682 | } | |
2683 | ||
07059eff DH |
2684 | /* with cpu model support, CMM is only indicated if really available */ |
2685 | if (kvm_s390_cmma_available()) { | |
2686 | set_bit(S390_FEAT_CMM, model->features); | |
6da5c593 JH |
2687 | } else { |
2688 | /* no cmm -> no cmm nt */ | |
2689 | clear_bit(S390_FEAT_CMM_NT, model->features); | |
07059eff DH |
2690 | } |
2691 | ||
e23bc1b2 | 2692 | /* We emulate a zPCI bus and AEN, therefore we don't need HW support */ |
21eb052c CH |
2693 | if (pci_available) { |
2694 | set_bit(S390_FEAT_ZPCI, model->features); | |
2695 | } | |
3b00f702 YMZ |
2696 | set_bit(S390_FEAT_ADAPTER_EVENT_NOTIFICATION, model->features); |
2697 | ||
3b84c25c DH |
2698 | if (s390_known_cpu_type(cpu_type)) { |
2699 | /* we want the exact model, even if some features are missing */ | |
2700 | model->def = s390_find_cpu_def(cpu_type, ibc_gen(unblocked_ibc), | |
2701 | ibc_ec_ga(unblocked_ibc), NULL); | |
2702 | } else { | |
2703 | /* model unknown, e.g. too new - search using features */ | |
2704 | model->def = s390_find_cpu_def(0, ibc_gen(unblocked_ibc), | |
2705 | ibc_ec_ga(unblocked_ibc), | |
2706 | model->features); | |
2707 | } | |
2708 | if (!model->def) { | |
2709 | error_setg(errp, "KVM: host CPU model could not be identified"); | |
2710 | return; | |
2711 | } | |
2712 | /* strip of features that are not part of the maximum model */ | |
2713 | bitmap_and(model->features, model->features, model->def->full_feat, | |
2714 | S390_FEAT_MAX); | |
2715 | } | |
2716 | ||
2717 | void kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp) | |
2718 | { | |
2719 | struct kvm_s390_vm_cpu_processor prop = { | |
2720 | .fac_list = { 0 }, | |
2721 | }; | |
2722 | struct kvm_device_attr attr = { | |
2723 | .group = KVM_S390_VM_CPU_MODEL, | |
2724 | .attr = KVM_S390_VM_CPU_PROCESSOR, | |
2725 | .addr = (uint64_t) &prop, | |
2726 | }; | |
2727 | int rc; | |
2728 | ||
2729 | if (!model) { | |
07059eff | 2730 | /* compatibility handling if cpu models are disabled */ |
03f47ee4 | 2731 | if (kvm_s390_cmma_available()) { |
07059eff DH |
2732 | kvm_s390_enable_cmma(); |
2733 | } | |
3b84c25c DH |
2734 | return; |
2735 | } | |
2736 | if (!kvm_s390_cpu_models_supported()) { | |
2737 | error_setg(errp, "KVM doesn't support CPU models"); | |
2738 | return; | |
2739 | } | |
2740 | prop.cpuid = s390_cpuid_from_cpu_model(model); | |
2741 | prop.ibc = s390_ibc_from_cpu_model(model); | |
2742 | /* configure cpu features indicated via STFL(e) */ | |
2743 | s390_fill_feat_block(model->features, S390_FEAT_TYPE_STFL, | |
2744 | (uint8_t *) prop.fac_list); | |
2745 | rc = kvm_vm_ioctl(kvm_state, KVM_SET_DEVICE_ATTR, &attr); | |
2746 | if (rc) { | |
2747 | error_setg(errp, "KVM: Error configuring the CPU model: %d", rc); | |
2748 | return; | |
2749 | } | |
2750 | /* configure cpu features indicated e.g. via SCLP */ | |
2751 | rc = configure_cpu_feat(model->features); | |
2752 | if (rc) { | |
2753 | error_setg(errp, "KVM: Error configuring CPU features: %d", rc); | |
2754 | return; | |
2755 | } | |
2756 | /* configure cpu subfunctions indicated via query / test bit */ | |
2757 | rc = configure_cpu_subfunc(model->features); | |
2758 | if (rc) { | |
2759 | error_setg(errp, "KVM: Error configuring CPU subfunctions: %d", rc); | |
2760 | return; | |
2761 | } | |
03f47ee4 | 2762 | /* enable CMM via CMMA */ |
07059eff | 2763 | if (test_bit(S390_FEAT_CMM, model->features)) { |
03f47ee4 | 2764 | kvm_s390_enable_cmma(); |
07059eff | 2765 | } |
3b84c25c | 2766 | } |