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Commit | Line | Data |
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10ec5117 | 1 | /* |
aea1e885 | 2 | * S/390 misc helper routines |
10ec5117 | 3 | * |
defb0e31 | 4 | * Copyright (c) 2009 Ulrich Hecht |
10ec5117 AG |
5 | * Copyright (c) 2009 Alexander Graf |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
41c6a6dd | 10 | * version 2.1 of the License, or (at your option) any later version. |
10ec5117 AG |
11 | * |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
70539e18 | 18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
10ec5117 AG |
19 | */ |
20 | ||
9615495a | 21 | #include "qemu/osdep.h" |
278f5e98 | 22 | #include "qemu/main-loop.h" |
3e457172 | 23 | #include "cpu.h" |
4e58b838 | 24 | #include "internal.h" |
022c62cb | 25 | #include "exec/memory.h" |
1de7afc9 | 26 | #include "qemu/host-utils.h" |
2ef6175a | 27 | #include "exec/helper-proto.h" |
1de7afc9 | 28 | #include "qemu/timer.h" |
63c91552 | 29 | #include "exec/exec-all.h" |
f08b6170 | 30 | #include "exec/cpu_ldst.h" |
7de3b1cd DH |
31 | #include "qapi/error.h" |
32 | #include "tcg_s390x.h" | |
965018be | 33 | #include "s390-tod.h" |
10ec5117 | 34 | |
71e47088 | 35 | #if !defined(CONFIG_USER_ONLY) |
f0778475 | 36 | #include "sysemu/cpus.h" |
9c17d615 | 37 | #include "sysemu/sysemu.h" |
40fa5264 | 38 | #include "hw/s390x/ebcdic.h" |
2c98a6c1 | 39 | #include "hw/s390x/s390-virtio-hcall.h" |
53d8e91d | 40 | #include "hw/s390x/sclp.h" |
6a253de3 | 41 | #include "hw/s390x/s390_flic.h" |
79947862 | 42 | #include "hw/s390x/ioinst.h" |
f6c232ce | 43 | #include "hw/s390x/s390-pci-inst.h" |
79947862 | 44 | #include "hw/boards.h" |
7de3b1cd | 45 | #include "hw/s390x/tod.h" |
10ec5117 | 46 | #endif |
d5a43964 | 47 | |
defb0e31 AG |
48 | /* #define DEBUG_HELPER */ |
49 | #ifdef DEBUG_HELPER | |
50 | #define HELPER_LOG(x...) qemu_log(x) | |
51 | #else | |
52 | #define HELPER_LOG(x...) | |
53 | #endif | |
54 | ||
d5a103cd | 55 | /* Raise an exception statically from a TB. */ |
089f5c06 | 56 | void HELPER(exception)(CPUS390XState *env, uint32_t excp) |
defb0e31 | 57 | { |
dc79e928 | 58 | CPUState *cs = env_cpu(env); |
27103424 | 59 | |
71e47088 | 60 | HELPER_LOG("%s: exception %d\n", __func__, excp); |
27103424 | 61 | cs->exception_index = excp; |
5638d180 | 62 | cpu_loop_exit(cs); |
defb0e31 AG |
63 | } |
64 | ||
4bac52f5 DH |
65 | /* Store CPU Timer (also used for EXTRACT CPU TIME) */ |
66 | uint64_t HELPER(stpt)(CPUS390XState *env) | |
67 | { | |
68 | #if defined(CONFIG_USER_ONLY) | |
69 | /* | |
70 | * Fake a descending CPU timer. We could get negative values here, | |
71 | * but we don't care as it is up to the OS when to process that | |
72 | * interrupt and reset to > 0. | |
73 | */ | |
74 | return UINT64_MAX - (uint64_t)cpu_get_host_ticks(); | |
75 | #else | |
76 | return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)); | |
77 | #endif | |
78 | } | |
79 | ||
965018be RH |
80 | /* Store Clock */ |
81 | uint64_t HELPER(stck)(CPUS390XState *env) | |
82 | { | |
83 | #ifdef CONFIG_USER_ONLY | |
84 | struct timespec ts; | |
85 | uint64_t ns; | |
86 | ||
87 | clock_gettime(CLOCK_REALTIME, &ts); | |
88 | ns = ts.tv_sec * NANOSECONDS_PER_SECOND + ts.tv_nsec; | |
89 | ||
90 | return TOD_UNIX_EPOCH + time2tod(ns); | |
91 | #else | |
92 | S390TODState *td = s390_get_todstate(); | |
93 | S390TODClass *tdc = S390_TOD_GET_CLASS(td); | |
94 | S390TOD tod; | |
31006af3 | 95 | |
965018be RH |
96 | tdc->get(td, &tod, &error_abort); |
97 | return tod.low; | |
98 | #endif | |
99 | } | |
100 | ||
101 | #ifndef CONFIG_USER_ONLY | |
defb0e31 | 102 | /* SCLP service call */ |
dc458df9 | 103 | uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2) |
defb0e31 | 104 | { |
8d04fb55 | 105 | qemu_mutex_lock_iothread(); |
6e252802 | 106 | int r = sclp_service_call(env, r1, r2); |
1a38921a | 107 | qemu_mutex_unlock_iothread(); |
9abf567d | 108 | if (r < 0) { |
1e36aee6 | 109 | tcg_s390_program_interrupt(env, -r, GETPC()); |
9abf567d CB |
110 | } |
111 | return r; | |
defb0e31 AG |
112 | } |
113 | ||
8df7eef3 | 114 | void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num) |
defb0e31 AG |
115 | { |
116 | uint64_t r; | |
117 | ||
118 | switch (num) { | |
119 | case 0x500: | |
120 | /* KVM hypercall */ | |
2cf9953b | 121 | qemu_mutex_lock_iothread(); |
28e942f8 | 122 | r = s390_virtio_hypercall(env); |
2cf9953b | 123 | qemu_mutex_unlock_iothread(); |
defb0e31 AG |
124 | break; |
125 | case 0x44: | |
126 | /* yield */ | |
127 | r = 0; | |
128 | break; | |
129 | case 0x308: | |
130 | /* ipl */ | |
7337c6eb | 131 | qemu_mutex_lock_iothread(); |
968db419 | 132 | handle_diag_308(env, r1, r3, GETPC()); |
7337c6eb | 133 | qemu_mutex_unlock_iothread(); |
defb0e31 AG |
134 | r = 0; |
135 | break; | |
eb569af8 CH |
136 | case 0x288: |
137 | /* time bomb (watchdog) */ | |
138 | r = handle_diag_288(env, r1, r3); | |
139 | break; | |
defb0e31 AG |
140 | default: |
141 | r = -1; | |
142 | break; | |
143 | } | |
144 | ||
145 | if (r) { | |
1e36aee6 | 146 | tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); |
defb0e31 | 147 | } |
defb0e31 AG |
148 | } |
149 | ||
defb0e31 | 150 | /* Set Prefix */ |
089f5c06 | 151 | void HELPER(spx)(CPUS390XState *env, uint64_t a1) |
defb0e31 | 152 | { |
dc79e928 | 153 | CPUState *cs = env_cpu(env); |
e805a0d3 | 154 | uint32_t prefix = a1 & 0x7fffe000; |
31b030d4 | 155 | |
e805a0d3 | 156 | env->psa = prefix; |
aafcf80e | 157 | HELPER_LOG("prefix: %#x\n", prefix); |
31b030d4 AF |
158 | tlb_flush_page(cs, 0); |
159 | tlb_flush_page(cs, TARGET_PAGE_SIZE); | |
defb0e31 AG |
160 | } |
161 | ||
30c8db0e | 162 | static void update_ckc_timer(CPUS390XState *env) |
defb0e31 | 163 | { |
7de3b1cd | 164 | S390TODState *td = s390_get_todstate(); |
30c8db0e | 165 | uint64_t time; |
7de3b1cd | 166 | |
345f1ab9 DH |
167 | /* stop the timer and remove pending CKC IRQs */ |
168 | timer_del(env->tod_timer); | |
30c8db0e | 169 | g_assert(qemu_mutex_iothread_locked()); |
345f1ab9 | 170 | env->pending_int &= ~INTERRUPT_EXT_CLOCK_COMPARATOR; |
345f1ab9 DH |
171 | |
172 | /* the tod has to exceed the ckc, this can never happen if ckc is all 1's */ | |
30c8db0e | 173 | if (env->ckc == -1ULL) { |
defb0e31 AG |
174 | return; |
175 | } | |
176 | ||
c941f074 | 177 | /* difference between origins */ |
30c8db0e | 178 | time = env->ckc - td->base.low; |
c941f074 | 179 | |
defb0e31 | 180 | /* nanoseconds */ |
9cb32c44 | 181 | time = tod2time(time); |
defb0e31 | 182 | |
f777b205 | 183 | timer_mod(env->tod_timer, time); |
defb0e31 AG |
184 | } |
185 | ||
30c8db0e DH |
186 | /* Set Clock Comparator */ |
187 | void HELPER(sckc)(CPUS390XState *env, uint64_t ckc) | |
188 | { | |
189 | env->ckc = ckc; | |
190 | ||
191 | qemu_mutex_lock_iothread(); | |
192 | update_ckc_timer(env); | |
193 | qemu_mutex_unlock_iothread(); | |
194 | } | |
195 | ||
7de3b1cd DH |
196 | void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque) |
197 | { | |
198 | S390CPU *cpu = S390_CPU(cs); | |
7de3b1cd | 199 | |
30c8db0e | 200 | update_ckc_timer(&cpu->env); |
7de3b1cd DH |
201 | } |
202 | ||
9dc67537 DH |
203 | /* Set Clock */ |
204 | uint32_t HELPER(sck)(CPUS390XState *env, uint64_t tod_low) | |
205 | { | |
206 | S390TODState *td = s390_get_todstate(); | |
207 | S390TODClass *tdc = S390_TOD_GET_CLASS(td); | |
208 | S390TOD tod = { | |
209 | .high = 0, | |
210 | .low = tod_low, | |
211 | }; | |
212 | ||
213 | qemu_mutex_lock_iothread(); | |
214 | tdc->set(td, &tod, &error_abort); | |
215 | qemu_mutex_unlock_iothread(); | |
216 | return 0; | |
217 | } | |
218 | ||
257a119e DH |
219 | /* Set Tod Programmable Field */ |
220 | void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) | |
221 | { | |
222 | uint32_t val = r0; | |
223 | ||
224 | if (val & 0xffff0000) { | |
1e36aee6 | 225 | tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); |
257a119e DH |
226 | } |
227 | env->todpr = val; | |
228 | } | |
229 | ||
defb0e31 | 230 | /* Store Clock Comparator */ |
dd3eb7b5 | 231 | uint64_t HELPER(stckc)(CPUS390XState *env) |
defb0e31 | 232 | { |
aa9e14e6 | 233 | return env->ckc; |
defb0e31 AG |
234 | } |
235 | ||
236 | /* Set CPU Timer */ | |
c4f0a863 | 237 | void HELPER(spt)(CPUS390XState *env, uint64_t time) |
defb0e31 | 238 | { |
defb0e31 AG |
239 | if (time == -1ULL) { |
240 | return; | |
241 | } | |
242 | ||
243 | /* nanoseconds */ | |
9cb32c44 | 244 | time = tod2time(time); |
defb0e31 | 245 | |
b8ae94bd AJ |
246 | env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time; |
247 | ||
248 | timer_mod(env->cpu_timer, env->cputm); | |
defb0e31 AG |
249 | } |
250 | ||
defb0e31 | 251 | /* Store System Information */ |
79947862 | 252 | uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1) |
defb0e31 | 253 | { |
79947862 DH |
254 | const uintptr_t ra = GETPC(); |
255 | const uint32_t sel1 = r0 & STSI_R0_SEL1_MASK; | |
256 | const uint32_t sel2 = r1 & STSI_R1_SEL2_MASK; | |
257 | const MachineState *ms = MACHINE(qdev_get_machine()); | |
258 | uint16_t total_cpus = 0, conf_cpus = 0, reserved_cpus = 0; | |
dc79e928 | 259 | S390CPU *cpu = env_archcpu(env); |
b0dad618 | 260 | SysIB sysib = { }; |
79947862 | 261 | int i, cc = 0; |
defb0e31 | 262 | |
79947862 DH |
263 | if ((r0 & STSI_R0_FC_MASK) > STSI_R0_FC_LEVEL_3) { |
264 | /* invalid function code: no other checks are performed */ | |
265 | return 3; | |
defb0e31 AG |
266 | } |
267 | ||
79947862 | 268 | if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { |
1e36aee6 | 269 | tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); |
79947862 DH |
270 | } |
271 | ||
272 | if ((r0 & STSI_R0_FC_MASK) == STSI_R0_FC_CURRENT) { | |
273 | /* query the current level: no further checks are performed */ | |
274 | env->regs[0] = STSI_R0_FC_LEVEL_3; | |
275 | return 0; | |
276 | } | |
defb0e31 | 277 | |
79947862 | 278 | if (a0 & ~TARGET_PAGE_MASK) { |
1e36aee6 | 279 | tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); |
79947862 DH |
280 | } |
281 | ||
282 | /* count the cpus and split them into configured and reserved ones */ | |
283 | for (i = 0; i < ms->possible_cpus->len; i++) { | |
284 | total_cpus++; | |
285 | if (ms->possible_cpus->cpus[i].cpu) { | |
286 | conf_cpus++; | |
287 | } else { | |
288 | reserved_cpus++; | |
289 | } | |
290 | } | |
defb0e31 | 291 | |
79947862 DH |
292 | /* |
293 | * In theory, we could report Level 1 / Level 2 as current. However, | |
294 | * the Linux kernel will detect this as running under LPAR and assume | |
295 | * that we have a sclp linemode console (which is always present on | |
296 | * LPAR, but not the default for QEMU), therefore not displaying boot | |
297 | * messages and making booting a Linux kernel under TCG harder. | |
298 | * | |
299 | * For now we fake the same SMP configuration on all levels. | |
300 | * | |
301 | * TODO: We could later make the level configurable via the machine | |
302 | * and change defaults (linemode console) based on machine type | |
303 | * and accelerator. | |
304 | */ | |
305 | switch (r0 & STSI_R0_FC_MASK) { | |
306 | case STSI_R0_FC_LEVEL_1: | |
defb0e31 AG |
307 | if ((sel1 == 1) && (sel2 == 1)) { |
308 | /* Basic Machine Configuration */ | |
076d4d39 | 309 | char type[5] = {}; |
defb0e31 | 310 | |
79947862 | 311 | ebcdic_put(sysib.sysib_111.manuf, "QEMU ", 16); |
076d4d39 DH |
312 | /* same as machine type number in STORE CPU ID, but in EBCDIC */ |
313 | snprintf(type, ARRAY_SIZE(type), "%X", cpu->model->def->type); | |
79947862 | 314 | ebcdic_put(sysib.sysib_111.type, type, 4); |
076d4d39 | 315 | /* model number (not stored in STORE CPU ID for z/Architecure) */ |
79947862 DH |
316 | ebcdic_put(sysib.sysib_111.model, "QEMU ", 16); |
317 | ebcdic_put(sysib.sysib_111.sequence, "QEMU ", 16); | |
318 | ebcdic_put(sysib.sysib_111.plant, "QEMU", 4); | |
defb0e31 AG |
319 | } else if ((sel1 == 2) && (sel2 == 1)) { |
320 | /* Basic Machine CPU */ | |
79947862 DH |
321 | ebcdic_put(sysib.sysib_121.sequence, "QEMUQEMUQEMUQEMU", 16); |
322 | ebcdic_put(sysib.sysib_121.plant, "QEMU", 4); | |
323 | sysib.sysib_121.cpu_addr = cpu_to_be16(env->core_id); | |
defb0e31 AG |
324 | } else if ((sel1 == 2) && (sel2 == 2)) { |
325 | /* Basic Machine CPUs */ | |
79947862 DH |
326 | sysib.sysib_122.capability = cpu_to_be32(0x443afc29); |
327 | sysib.sysib_122.total_cpus = cpu_to_be16(total_cpus); | |
328 | sysib.sysib_122.conf_cpus = cpu_to_be16(conf_cpus); | |
329 | sysib.sysib_122.reserved_cpus = cpu_to_be16(reserved_cpus); | |
defb0e31 AG |
330 | } else { |
331 | cc = 3; | |
332 | } | |
333 | break; | |
79947862 DH |
334 | case STSI_R0_FC_LEVEL_2: |
335 | if ((sel1 == 2) && (sel2 == 1)) { | |
336 | /* LPAR CPU */ | |
337 | ebcdic_put(sysib.sysib_221.sequence, "QEMUQEMUQEMUQEMU", 16); | |
338 | ebcdic_put(sysib.sysib_221.plant, "QEMU", 4); | |
339 | sysib.sysib_221.cpu_addr = cpu_to_be16(env->core_id); | |
340 | } else if ((sel1 == 2) && (sel2 == 2)) { | |
341 | /* LPAR CPUs */ | |
342 | sysib.sysib_222.lcpuc = 0x80; /* dedicated */ | |
343 | sysib.sysib_222.total_cpus = cpu_to_be16(total_cpus); | |
344 | sysib.sysib_222.conf_cpus = cpu_to_be16(conf_cpus); | |
345 | sysib.sysib_222.reserved_cpus = cpu_to_be16(reserved_cpus); | |
346 | ebcdic_put(sysib.sysib_222.name, "QEMU ", 8); | |
347 | sysib.sysib_222.caf = cpu_to_be32(1000); | |
348 | sysib.sysib_222.dedicated_cpus = cpu_to_be16(conf_cpus); | |
349 | } else { | |
350 | cc = 3; | |
defb0e31 | 351 | } |
79947862 DH |
352 | break; |
353 | case STSI_R0_FC_LEVEL_3: | |
354 | if ((sel1 == 2) && (sel2 == 2)) { | |
355 | /* VM CPUs */ | |
356 | sysib.sysib_322.count = 1; | |
357 | sysib.sysib_322.vm[0].total_cpus = cpu_to_be16(total_cpus); | |
358 | sysib.sysib_322.vm[0].conf_cpus = cpu_to_be16(conf_cpus); | |
359 | sysib.sysib_322.vm[0].reserved_cpus = cpu_to_be16(reserved_cpus); | |
360 | sysib.sysib_322.vm[0].caf = cpu_to_be32(1000); | |
361 | /* Linux kernel uses this to distinguish us from z/VM */ | |
362 | ebcdic_put(sysib.sysib_322.vm[0].cpi, "KVM/Linux ", 16); | |
363 | sysib.sysib_322.vm[0].ext_name_encoding = 2; /* UTF-8 */ | |
364 | ||
365 | /* If our VM has a name, use the real name */ | |
366 | if (qemu_name) { | |
367 | memset(sysib.sysib_322.vm[0].name, 0x40, | |
368 | sizeof(sysib.sysib_322.vm[0].name)); | |
369 | ebcdic_put(sysib.sysib_322.vm[0].name, qemu_name, | |
370 | MIN(sizeof(sysib.sysib_322.vm[0].name), | |
371 | strlen(qemu_name))); | |
372 | strncpy((char *)sysib.sysib_322.ext_names[0], qemu_name, | |
373 | sizeof(sysib.sysib_322.ext_names[0])); | |
71e47088 | 374 | } else { |
79947862 DH |
375 | ebcdic_put(sysib.sysib_322.vm[0].name, "TCGguest", 8); |
376 | strcpy((char *)sysib.sysib_322.ext_names[0], "TCGguest"); | |
71e47088 | 377 | } |
79947862 DH |
378 | |
379 | /* add the uuid */ | |
380 | memcpy(sysib.sysib_322.vm[0].uuid, &qemu_uuid, | |
381 | sizeof(sysib.sysib_322.vm[0].uuid)); | |
382 | } else { | |
383 | cc = 3; | |
defb0e31 | 384 | } |
defb0e31 AG |
385 | break; |
386 | } | |
387 | ||
79947862 DH |
388 | if (cc == 0) { |
389 | if (s390_cpu_virt_mem_write(cpu, a0, 0, &sysib, sizeof(sysib))) { | |
390 | s390_cpu_virt_mem_handle_exc(cpu, ra); | |
391 | } | |
392 | } | |
393 | ||
defb0e31 AG |
394 | return cc; |
395 | } | |
396 | ||
089f5c06 | 397 | uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1, |
11b0079c | 398 | uint32_t r3) |
defb0e31 | 399 | { |
11b0079c | 400 | int cc; |
defb0e31 | 401 | |
11b0079c DH |
402 | /* TODO: needed to inject interrupts - push further down */ |
403 | qemu_mutex_lock_iothread(); | |
404 | cc = handle_sigp(env, order_code & SIGP_ORDER_MASK, r1, r3); | |
405 | qemu_mutex_unlock_iothread(); | |
defb0e31 AG |
406 | |
407 | return cc; | |
408 | } | |
defb0e31 | 409 | #endif |
ad8a4570 AG |
410 | |
411 | #ifndef CONFIG_USER_ONLY | |
412 | void HELPER(xsch)(CPUS390XState *env, uint64_t r1) | |
413 | { | |
dc79e928 | 414 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 415 | qemu_mutex_lock_iothread(); |
1b98fb99 | 416 | ioinst_handle_xsch(cpu, r1, GETPC()); |
278f5e98 | 417 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
418 | } |
419 | ||
420 | void HELPER(csch)(CPUS390XState *env, uint64_t r1) | |
421 | { | |
dc79e928 | 422 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 423 | qemu_mutex_lock_iothread(); |
1b98fb99 | 424 | ioinst_handle_csch(cpu, r1, GETPC()); |
278f5e98 | 425 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
426 | } |
427 | ||
428 | void HELPER(hsch)(CPUS390XState *env, uint64_t r1) | |
429 | { | |
dc79e928 | 430 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 431 | qemu_mutex_lock_iothread(); |
1b98fb99 | 432 | ioinst_handle_hsch(cpu, r1, GETPC()); |
278f5e98 | 433 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
434 | } |
435 | ||
436 | void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst) | |
437 | { | |
dc79e928 | 438 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 439 | qemu_mutex_lock_iothread(); |
1b98fb99 | 440 | ioinst_handle_msch(cpu, r1, inst >> 16, GETPC()); |
278f5e98 | 441 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
442 | } |
443 | ||
444 | void HELPER(rchp)(CPUS390XState *env, uint64_t r1) | |
445 | { | |
dc79e928 | 446 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 447 | qemu_mutex_lock_iothread(); |
1b98fb99 | 448 | ioinst_handle_rchp(cpu, r1, GETPC()); |
278f5e98 | 449 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
450 | } |
451 | ||
452 | void HELPER(rsch)(CPUS390XState *env, uint64_t r1) | |
453 | { | |
dc79e928 | 454 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 455 | qemu_mutex_lock_iothread(); |
1b98fb99 | 456 | ioinst_handle_rsch(cpu, r1, GETPC()); |
278f5e98 | 457 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
458 | } |
459 | ||
86c34633 DH |
460 | void HELPER(sal)(CPUS390XState *env, uint64_t r1) |
461 | { | |
dc79e928 | 462 | S390CPU *cpu = env_archcpu(env); |
86c34633 DH |
463 | |
464 | qemu_mutex_lock_iothread(); | |
465 | ioinst_handle_sal(cpu, r1, GETPC()); | |
466 | qemu_mutex_unlock_iothread(); | |
467 | } | |
468 | ||
a9de75a0 DH |
469 | void HELPER(schm)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint64_t inst) |
470 | { | |
dc79e928 | 471 | S390CPU *cpu = env_archcpu(env); |
a9de75a0 DH |
472 | |
473 | qemu_mutex_lock_iothread(); | |
474 | ioinst_handle_schm(cpu, r1, r2, inst >> 16, GETPC()); | |
475 | qemu_mutex_unlock_iothread(); | |
476 | } | |
477 | ||
ad8a4570 AG |
478 | void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst) |
479 | { | |
dc79e928 | 480 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 481 | qemu_mutex_lock_iothread(); |
1b98fb99 | 482 | ioinst_handle_ssch(cpu, r1, inst >> 16, GETPC()); |
278f5e98 | 483 | qemu_mutex_unlock_iothread(); |
5a59bc1d DH |
484 | } |
485 | ||
486 | void HELPER(stcrw)(CPUS390XState *env, uint64_t inst) | |
487 | { | |
dc79e928 | 488 | S390CPU *cpu = env_archcpu(env); |
5a59bc1d DH |
489 | |
490 | qemu_mutex_lock_iothread(); | |
491 | ioinst_handle_stcrw(cpu, inst >> 16, GETPC()); | |
492 | qemu_mutex_unlock_iothread(); | |
ad8a4570 AG |
493 | } |
494 | ||
495 | void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst) | |
496 | { | |
dc79e928 | 497 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 498 | qemu_mutex_lock_iothread(); |
1b98fb99 | 499 | ioinst_handle_stsch(cpu, r1, inst >> 16, GETPC()); |
278f5e98 | 500 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
501 | } |
502 | ||
6a253de3 DH |
503 | uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) |
504 | { | |
505 | const uintptr_t ra = GETPC(); | |
dc79e928 | 506 | S390CPU *cpu = env_archcpu(env); |
f68ecdd4 | 507 | QEMUS390FLICState *flic = s390_get_qemu_flic(s390_get_flic()); |
6a253de3 DH |
508 | QEMUS390FlicIO *io = NULL; |
509 | LowCore *lowcore; | |
510 | ||
511 | if (addr & 0x3) { | |
1e36aee6 | 512 | tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); |
6a253de3 DH |
513 | } |
514 | ||
515 | qemu_mutex_lock_iothread(); | |
516 | io = qemu_s390_flic_dequeue_io(flic, env->cregs[6]); | |
517 | if (!io) { | |
518 | qemu_mutex_unlock_iothread(); | |
519 | return 0; | |
520 | } | |
521 | ||
522 | if (addr) { | |
523 | struct { | |
524 | uint16_t id; | |
525 | uint16_t nr; | |
526 | uint32_t parm; | |
527 | } intc = { | |
528 | .id = cpu_to_be16(io->id), | |
529 | .nr = cpu_to_be16(io->nr), | |
530 | .parm = cpu_to_be32(io->parm), | |
531 | }; | |
532 | ||
533 | if (s390_cpu_virt_mem_write(cpu, addr, 0, &intc, sizeof(intc))) { | |
534 | /* writing failed, reinject and properly clean up */ | |
535 | s390_io_interrupt(io->id, io->nr, io->parm, io->word); | |
536 | qemu_mutex_unlock_iothread(); | |
537 | g_free(io); | |
538 | s390_cpu_virt_mem_handle_exc(cpu, ra); | |
539 | return 0; | |
540 | } | |
541 | } else { | |
542 | /* no protection applies */ | |
543 | lowcore = cpu_map_lowcore(env); | |
544 | lowcore->subchannel_id = cpu_to_be16(io->id); | |
545 | lowcore->subchannel_nr = cpu_to_be16(io->nr); | |
546 | lowcore->io_int_parm = cpu_to_be32(io->parm); | |
547 | lowcore->io_int_word = cpu_to_be32(io->word); | |
548 | cpu_unmap_lowcore(lowcore); | |
549 | } | |
550 | ||
551 | g_free(io); | |
552 | qemu_mutex_unlock_iothread(); | |
553 | return 1; | |
554 | } | |
555 | ||
ad8a4570 AG |
556 | void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst) |
557 | { | |
dc79e928 | 558 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 559 | qemu_mutex_lock_iothread(); |
1b98fb99 | 560 | ioinst_handle_tsch(cpu, r1, inst >> 16, GETPC()); |
278f5e98 | 561 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
562 | } |
563 | ||
564 | void HELPER(chsc)(CPUS390XState *env, uint64_t inst) | |
565 | { | |
dc79e928 | 566 | S390CPU *cpu = env_archcpu(env); |
278f5e98 | 567 | qemu_mutex_lock_iothread(); |
1b98fb99 | 568 | ioinst_handle_chsc(cpu, inst >> 16, GETPC()); |
278f5e98 | 569 | qemu_mutex_unlock_iothread(); |
ad8a4570 AG |
570 | } |
571 | #endif | |
777c98c3 AJ |
572 | |
573 | #ifndef CONFIG_USER_ONLY | |
574 | void HELPER(per_check_exception)(CPUS390XState *env) | |
575 | { | |
777c98c3 | 576 | if (env->per_perc_atmid) { |
1e36aee6 | 577 | tcg_s390_program_interrupt(env, PGM_PER, GETPC()); |
777c98c3 AJ |
578 | } |
579 | } | |
2c2275eb | 580 | |
d9b8daf9 DH |
581 | /* Check if an address is within the PER starting address and the PER |
582 | ending address. The address range might loop. */ | |
583 | static inline bool get_per_in_range(CPUS390XState *env, uint64_t addr) | |
584 | { | |
585 | if (env->cregs[10] <= env->cregs[11]) { | |
586 | return env->cregs[10] <= addr && addr <= env->cregs[11]; | |
587 | } else { | |
588 | return env->cregs[10] <= addr || addr <= env->cregs[11]; | |
589 | } | |
590 | } | |
591 | ||
2c2275eb AJ |
592 | void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to) |
593 | { | |
594 | if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) { | |
595 | if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS) | |
596 | || get_per_in_range(env, to)) { | |
597 | env->per_address = from; | |
598 | env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env); | |
599 | } | |
600 | } | |
601 | } | |
f0e0d817 AJ |
602 | |
603 | void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr) | |
604 | { | |
605 | if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) { | |
606 | env->per_address = addr; | |
607 | env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env); | |
83bb1612 AJ |
608 | |
609 | /* If the instruction has to be nullified, trigger the | |
610 | exception immediately. */ | |
611 | if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) { | |
dc79e928 | 612 | CPUState *cs = env_cpu(env); |
83bb1612 | 613 | |
465aec46 | 614 | env->per_perc_atmid |= PER_CODE_EVENT_NULLIFICATION; |
83bb1612 AJ |
615 | env->int_pgm_code = PGM_PER; |
616 | env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr)); | |
617 | ||
618 | cs->exception_index = EXCP_PGM; | |
619 | cpu_loop_exit(cs); | |
620 | } | |
f0e0d817 AJ |
621 | } |
622 | } | |
ebed683c RH |
623 | |
624 | void HELPER(per_store_real)(CPUS390XState *env) | |
625 | { | |
626 | if ((env->cregs[9] & PER_CR9_EVENT_STORE) && | |
627 | (env->cregs[9] & PER_CR9_EVENT_STORE_REAL)) { | |
628 | /* PSW is saved just before calling the helper. */ | |
629 | env->per_address = env->psw.addr; | |
630 | env->per_perc_atmid = PER_CODE_EVENT_STORE_REAL | get_per_atmid(env); | |
631 | } | |
632 | } | |
777c98c3 | 633 | #endif |
5bf83628 | 634 | |
f74990a5 DH |
635 | static uint8_t stfl_bytes[2048]; |
636 | static unsigned int used_stfl_bytes; | |
5bf83628 | 637 | |
f74990a5 | 638 | static void prepare_stfl(void) |
5bf83628 | 639 | { |
f74990a5 DH |
640 | static bool initialized; |
641 | int i; | |
5bf83628 | 642 | |
f74990a5 DH |
643 | /* racy, but we don't care, the same values are always written */ |
644 | if (initialized) { | |
645 | return; | |
5bf83628 RH |
646 | } |
647 | ||
f74990a5 DH |
648 | s390_get_feat_block(S390_FEAT_TYPE_STFL, stfl_bytes); |
649 | for (i = 0; i < sizeof(stfl_bytes); i++) { | |
650 | if (stfl_bytes[i]) { | |
651 | used_stfl_bytes = i + 1; | |
5bf83628 RH |
652 | } |
653 | } | |
f74990a5 | 654 | initialized = true; |
5bf83628 RH |
655 | } |
656 | ||
86b5ab39 | 657 | #ifndef CONFIG_USER_ONLY |
5bf83628 RH |
658 | void HELPER(stfl)(CPUS390XState *env) |
659 | { | |
86b5ab39 | 660 | LowCore *lowcore; |
5bf83628 | 661 | |
86b5ab39 | 662 | lowcore = cpu_map_lowcore(env); |
f74990a5 DH |
663 | prepare_stfl(); |
664 | memcpy(&lowcore->stfl_fac_list, stfl_bytes, sizeof(lowcore->stfl_fac_list)); | |
86b5ab39 | 665 | cpu_unmap_lowcore(lowcore); |
5bf83628 | 666 | } |
86b5ab39 | 667 | #endif |
5bf83628 RH |
668 | |
669 | uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) | |
670 | { | |
f74990a5 DH |
671 | const uintptr_t ra = GETPC(); |
672 | const int count_bytes = ((env->regs[0] & 0xff) + 1) * 8; | |
88a29e86 | 673 | int max_bytes; |
f74990a5 DH |
674 | int i; |
675 | ||
676 | if (addr & 0x7) { | |
1e36aee6 | 677 | tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); |
f74990a5 | 678 | } |
5bf83628 | 679 | |
f74990a5 | 680 | prepare_stfl(); |
88a29e86 | 681 | max_bytes = ROUND_UP(used_stfl_bytes, 8); |
e19a61eb DH |
682 | |
683 | /* | |
684 | * The PoP says that doublewords beyond the highest-numbered facility | |
685 | * bit may or may not be stored. However, existing hardware appears to | |
686 | * not store the words, and existing software depend on that. | |
687 | */ | |
688 | for (i = 0; i < MIN(count_bytes, max_bytes); ++i) { | |
f74990a5 | 689 | cpu_stb_data_ra(env, addr + i, stfl_bytes[i], ra); |
5bf83628 RH |
690 | } |
691 | ||
f74990a5 DH |
692 | env->regs[0] = deposit64(env->regs[0], 0, 8, (max_bytes / 8) - 1); |
693 | return count_bytes >= max_bytes ? 0 : 3; | |
5bf83628 | 694 | } |
f6c232ce CH |
695 | |
696 | #ifndef CONFIG_USER_ONLY | |
697 | /* | |
698 | * Note: we ignore any return code of the functions called for the pci | |
699 | * instructions, as the only time they return !0 is when the stub is | |
700 | * called, and in that case we didn't even offer the zpci facility. | |
701 | * The only exception is SIC, where program checks need to be handled | |
702 | * by the caller. | |
703 | */ | |
704 | void HELPER(clp)(CPUS390XState *env, uint32_t r2) | |
705 | { | |
dc79e928 | 706 | S390CPU *cpu = env_archcpu(env); |
f6c232ce CH |
707 | |
708 | qemu_mutex_lock_iothread(); | |
709 | clp_service_call(cpu, r2, GETPC()); | |
710 | qemu_mutex_unlock_iothread(); | |
711 | } | |
712 | ||
713 | void HELPER(pcilg)(CPUS390XState *env, uint32_t r1, uint32_t r2) | |
714 | { | |
dc79e928 | 715 | S390CPU *cpu = env_archcpu(env); |
f6c232ce CH |
716 | |
717 | qemu_mutex_lock_iothread(); | |
718 | pcilg_service_call(cpu, r1, r2, GETPC()); | |
719 | qemu_mutex_unlock_iothread(); | |
720 | } | |
721 | ||
722 | void HELPER(pcistg)(CPUS390XState *env, uint32_t r1, uint32_t r2) | |
723 | { | |
dc79e928 | 724 | S390CPU *cpu = env_archcpu(env); |
f6c232ce CH |
725 | |
726 | qemu_mutex_lock_iothread(); | |
727 | pcistg_service_call(cpu, r1, r2, GETPC()); | |
728 | qemu_mutex_unlock_iothread(); | |
729 | } | |
730 | ||
731 | void HELPER(stpcifc)(CPUS390XState *env, uint32_t r1, uint64_t fiba, | |
732 | uint32_t ar) | |
733 | { | |
dc79e928 | 734 | S390CPU *cpu = env_archcpu(env); |
f6c232ce CH |
735 | |
736 | qemu_mutex_lock_iothread(); | |
737 | stpcifc_service_call(cpu, r1, fiba, ar, GETPC()); | |
738 | qemu_mutex_unlock_iothread(); | |
739 | } | |
740 | ||
741 | void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint64_t r3) | |
742 | { | |
743 | int r; | |
744 | ||
745 | qemu_mutex_lock_iothread(); | |
746 | r = css_do_sic(env, (r3 >> 27) & 0x7, r1 & 0xffff); | |
747 | qemu_mutex_unlock_iothread(); | |
748 | /* css_do_sic() may actually return a PGM_xxx value to inject */ | |
749 | if (r) { | |
1e36aee6 | 750 | tcg_s390_program_interrupt(env, -r, GETPC()); |
f6c232ce CH |
751 | } |
752 | } | |
753 | ||
754 | void HELPER(rpcit)(CPUS390XState *env, uint32_t r1, uint32_t r2) | |
755 | { | |
dc79e928 | 756 | S390CPU *cpu = env_archcpu(env); |
f6c232ce CH |
757 | |
758 | qemu_mutex_lock_iothread(); | |
759 | rpcit_service_call(cpu, r1, r2, GETPC()); | |
760 | qemu_mutex_unlock_iothread(); | |
761 | } | |
762 | ||
763 | void HELPER(pcistb)(CPUS390XState *env, uint32_t r1, uint32_t r3, | |
764 | uint64_t gaddr, uint32_t ar) | |
765 | { | |
dc79e928 | 766 | S390CPU *cpu = env_archcpu(env); |
f6c232ce CH |
767 | |
768 | qemu_mutex_lock_iothread(); | |
769 | pcistb_service_call(cpu, r1, r3, gaddr, ar, GETPC()); | |
770 | qemu_mutex_unlock_iothread(); | |
771 | } | |
772 | ||
773 | void HELPER(mpcifc)(CPUS390XState *env, uint32_t r1, uint64_t fiba, | |
774 | uint32_t ar) | |
775 | { | |
dc79e928 | 776 | S390CPU *cpu = env_archcpu(env); |
f6c232ce CH |
777 | |
778 | qemu_mutex_lock_iothread(); | |
779 | mpcifc_service_call(cpu, r1, fiba, ar, GETPC()); | |
780 | qemu_mutex_unlock_iothread(); | |
781 | } | |
782 | #endif |