[mirror_qemu.git] / target / s390x / vec_fpu_helper.c

/*
 * QEMU TCG support -- s390x vector floating point instruction support
 *
 * Copyright (C) 2019 Red Hat Inc
 *
 * Authors:
 *   David Hildenbrand <david@redhat.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2 or later.
 * See the COPYING file in the top-level directory.
 */
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "cpu.h"
#include "internal.h"
#include "vec.h"
#include "tcg_s390x.h"
#include "tcg/tcg-gvec-desc.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "fpu/softfloat.h"

#define VIC_INVALID         0x1
#define VIC_DIVBYZERO       0x2
#define VIC_OVERFLOW        0x3
#define VIC_UNDERFLOW       0x4
#define VIC_INEXACT         0x5

/* returns the VEX. If the VEX is 0, there is no trap */
static uint8_t check_ieee_exc(CPUS390XState *env, uint8_t enr, bool XxC,
                              uint8_t *vec_exc)
{
    uint8_t vece_exc = 0, trap_exc;
    unsigned qemu_exc;

    /* Retrieve and clear the softfloat exceptions */
    qemu_exc = env->fpu_status.float_exception_flags;
    if (qemu_exc == 0) {
        return 0;
    }
    env->fpu_status.float_exception_flags = 0;

    vece_exc = s390_softfloat_exc_to_ieee(qemu_exc);

    /* Add them to the vector-wide s390x exception bits */
    *vec_exc |= vece_exc;

    /* Check for traps and construct the VXC */
    trap_exc = vece_exc & env->fpc >> 24;
    if (trap_exc) {
        if (trap_exc & S390_IEEE_MASK_INVALID) {
            return enr << 4 | VIC_INVALID;
        } else if (trap_exc & S390_IEEE_MASK_DIVBYZERO) {
            return enr << 4 | VIC_DIVBYZERO;
        } else if (trap_exc & S390_IEEE_MASK_OVERFLOW) {
            return enr << 4 | VIC_OVERFLOW;
        } else if (trap_exc & S390_IEEE_MASK_UNDERFLOW) {
            return enr << 4 | VIC_UNDERFLOW;
        } else if (!XxC) {
            g_assert(trap_exc & S390_IEEE_MASK_INEXACT);
            /* inexact has lowest priority on traps */
            return enr << 4 | VIC_INEXACT;
        }
    }
    return 0;
}

static void handle_ieee_exc(CPUS390XState *env, uint8_t vxc, uint8_t vec_exc,
                            uintptr_t retaddr)
{
    if (vxc) {
        /* on traps, the fpc flags are not updated, instruction is suppressed */
        tcg_s390_vector_exception(env, vxc, retaddr);
    }
    if (vec_exc) {
        /* indicate exceptions for all elements combined */
        env->fpc |= vec_exc << 16;
    }
}

static float64 s390_vec_read_float64(const S390Vector *v, uint8_t enr)
{
    return make_float64(s390_vec_read_element64(v, enr));
}

static void s390_vec_write_float64(S390Vector *v, uint8_t enr, float64 data)
{
    return s390_vec_write_element64(v, enr, data);
}

typedef float64 (*vop64_2_fn)(float64 a, float_status *s);
static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
                    bool s, bool XxC, uint8_t erm, vop64_2_fn fn,
                    uintptr_t retaddr)
{
    uint8_t vxc, vec_exc = 0;
    S390Vector tmp = {};
    int i, old_mode;

    old_mode = s390_swap_bfp_rounding_mode(env, erm);
    for (i = 0; i < 2; i++) {
        const float64 a = s390_vec_read_float64(v2, i);

        s390_vec_write_float64(&tmp, i, fn(a, &env->fpu_status));
        vxc = check_ieee_exc(env, i, XxC, &vec_exc);
        if (s || vxc) {
            break;
        }
    }
    s390_restore_bfp_rounding_mode(env, old_mode);
    handle_ieee_exc(env, vxc, vec_exc, retaddr);
    *v1 = tmp;
}

static float64 vcdg64(float64 a, float_status *s)
{
    return int64_to_float64(a, s);
}

static float64 vcdlg64(float64 a, float_status *s)
{
    return uint64_to_float64(a, s);
}

static float64 vcgd64(float64 a, float_status *s)
{
    const float64 tmp = float64_to_int64(a, s);

    return float64_is_any_nan(a) ? INT64_MIN : tmp;
}

static float64 vclgd64(float64 a, float_status *s)
{
    const float64 tmp = float64_to_uint64(a, s);

    return float64_is_any_nan(a) ? 0 : tmp;
}

#define DEF_GVEC_VOP2_FN(NAME, FN, BITS)                                       \
void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, CPUS390XState *env,   \
                               uint32_t desc)                                  \
{                                                                              \
    const uint8_t erm = extract32(simd_data(desc), 4, 4);                      \
    const bool se = extract32(simd_data(desc), 3, 1);                          \
    const bool XxC = extract32(simd_data(desc), 2, 1);                         \
                                                                               \
    vop##BITS##_2(v1, v2, env, se, XxC, erm, FN, GETPC());                     \
}

#define DEF_GVEC_VOP2_64(NAME)                                                 \
DEF_GVEC_VOP2_FN(NAME, NAME##64, 64)

#define DEF_GVEC_VOP2(NAME, OP)                                                \
DEF_GVEC_VOP2_FN(NAME, float64_##OP, 64)

DEF_GVEC_VOP2_64(vcdg)
DEF_GVEC_VOP2_64(vcdlg)
DEF_GVEC_VOP2_64(vcgd)
DEF_GVEC_VOP2_64(vclgd)
DEF_GVEC_VOP2(vfi, round_to_int)
DEF_GVEC_VOP2(vfsq, sqrt)

typedef float64 (*vop64_3_fn)(float64 a, float64 b, float_status *s);
static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
                    CPUS390XState *env, bool s, vop64_3_fn fn,
                    uintptr_t retaddr)
{
    uint8_t vxc, vec_exc = 0;
    S390Vector tmp = {};
    int i;

    for (i = 0; i < 2; i++) {
        const float64 a = s390_vec_read_float64(v2, i);
        const float64 b = s390_vec_read_float64(v3, i);

        s390_vec_write_float64(&tmp, i, fn(a, b, &env->fpu_status));
        vxc = check_ieee_exc(env, i, false, &vec_exc);
        if (s || vxc) {
            break;
        }
    }
    handle_ieee_exc(env, vxc, vec_exc, retaddr);
    *v1 = tmp;
}

#define DEF_GVEC_VOP3(NAME, OP)                                                \
void HELPER(gvec_##NAME##64)(void *v1, const void *v2, const void *v3,         \
                             CPUS390XState *env, uint32_t desc)                \
{                                                                              \
    const bool se = extract32(simd_data(desc), 3, 1);                          \
                                                                               \
    vop64_3(v1, v2, v3, env, se, float64_##OP, GETPC());                       \
}

DEF_GVEC_VOP3(vfa, add)
DEF_GVEC_VOP3(vfs, sub)
DEF_GVEC_VOP3(vfd, div)
DEF_GVEC_VOP3(vfm, mul)

static int wfc64(const S390Vector *v1, const S390Vector *v2,
                 CPUS390XState *env, bool signal, uintptr_t retaddr)
{
    /* only the zero-indexed elements are compared */
    const float64 a = s390_vec_read_element64(v1, 0);
    const float64 b = s390_vec_read_element64(v2, 0);
    uint8_t vxc, vec_exc = 0;
    int cmp;

    if (signal) {
        cmp = float64_compare(a, b, &env->fpu_status);
    } else {
        cmp = float64_compare_quiet(a, b, &env->fpu_status);
    }
    vxc = check_ieee_exc(env, 0, false, &vec_exc);
    handle_ieee_exc(env, vxc, vec_exc, retaddr);

    return float_comp_to_cc(env, cmp);
}

void HELPER(gvec_wfc64)(const void *v1, const void *v2, CPUS390XState *env,
                        uint32_t desc)
{
    env->cc_op = wfc64(v1, v2, env, false, GETPC());
}

void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
                        uint32_t desc)
{
    env->cc_op = wfc64(v1, v2, env, true, GETPC());
}

typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
                 CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
{
    uint8_t vxc, vec_exc = 0;
    S390Vector tmp = {};
    int match = 0;
    int i;

    for (i = 0; i < 2; i++) {
        const float64 a = s390_vec_read_float64(v2, i);
        const float64 b = s390_vec_read_float64(v3, i);

        /* swap the order of the parameters, so we can use existing functions */
        if (fn(b, a, &env->fpu_status)) {
            match++;
            s390_vec_write_element64(&tmp, i, -1ull);
        }
        vxc = check_ieee_exc(env, i, false, &vec_exc);
        if (s || vxc) {
            break;
        }
    }

    handle_ieee_exc(env, vxc, vec_exc, retaddr);
    *v1 = tmp;
    if (match) {
        return s || match == 2 ? 0 : 1;
    }
    return 3;
}

#define DEF_GVEC_VFC_B(NAME, OP, BITS)                                         \
void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3,       \
                               CPUS390XState *env, uint32_t desc)              \
{                                                                              \
    const bool se = extract32(simd_data(desc), 3, 1);                          \
    vfc##BITS##_fn fn = float##BITS##_##OP##_quiet;                            \
                                                                               \
    vfc##BITS(v1, v2, v3, env, se, fn, GETPC());                               \
}                                                                              \
                                                                               \
void HELPER(gvec_##NAME##BITS##_cc)(void *v1, const void *v2, const void *v3,  \
                                    CPUS390XState *env, uint32_t desc)         \
{                                                                              \
    const bool se = extract32(simd_data(desc), 3, 1);                          \
    vfc##BITS##_fn fn = float##BITS##_##OP##_quiet;                            \
                                                                               \
    env->cc_op = vfc##BITS(v1, v2, v3, env, se, fn, GETPC());                  \
}

#define DEF_GVEC_VFC(NAME, OP)                                                 \
DEF_GVEC_VFC_B(NAME, OP, 64)

DEF_GVEC_VFC(vfce, eq)
DEF_GVEC_VFC(vfch, lt)
DEF_GVEC_VFC(vfche, le)

static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
                   bool s, uintptr_t retaddr)
{
    uint8_t vxc, vec_exc = 0;
    S390Vector tmp = {};
    int i;

    for (i = 0; i < 2; i++) {
        /* load from even element */
        const float32 a = s390_vec_read_element32(v2, i * 2);
        const uint64_t ret = float32_to_float64(a, &env->fpu_status);

        s390_vec_write_element64(&tmp, i, ret);
        /* indicate the source element */
        vxc = check_ieee_exc(env, i * 2, false, &vec_exc);
        if (s || vxc) {
            break;
        }
    }
    handle_ieee_exc(env, vxc, vec_exc, retaddr);
    *v1 = tmp;
}

void HELPER(gvec_vfll32)(void *v1, const void *v2, CPUS390XState *env,
                         uint32_t desc)
{
    vfll32(v1, v2, env, false, GETPC());
}

void HELPER(gvec_vfll32s)(void *v1, const void *v2, CPUS390XState *env,
                          uint32_t desc)
{
    vfll32(v1, v2, env, true, GETPC());
}

static void vflr64(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
                   bool s, bool XxC, uint8_t erm, uintptr_t retaddr)
{
    uint8_t vxc, vec_exc = 0;
    S390Vector tmp = {};
    int i, old_mode;

    old_mode = s390_swap_bfp_rounding_mode(env, erm);
    for (i = 0; i < 2; i++) {
        float64 a = s390_vec_read_element64(v2, i);
        uint32_t ret = float64_to_float32(a, &env->fpu_status);

        /* place at even element */
        s390_vec_write_element32(&tmp, i * 2, ret);
        /* indicate the source element */
        vxc = check_ieee_exc(env, i, XxC, &vec_exc);
        if (s || vxc) {
            break;
        }
    }
    s390_restore_bfp_rounding_mode(env, old_mode);
    handle_ieee_exc(env, vxc, vec_exc, retaddr);
    *v1 = tmp;
}

void HELPER(gvec_vflr64)(void *v1, const void *v2, CPUS390XState *env,
                         uint32_t desc)
{
    const uint8_t erm = extract32(simd_data(desc), 4, 4);
    const bool XxC = extract32(simd_data(desc), 2, 1);

    vflr64(v1, v2, env, false, XxC, erm, GETPC());
}

void HELPER(gvec_vflr64s)(void *v1, const void *v2, CPUS390XState *env,
                          uint32_t desc)
{
    const uint8_t erm = extract32(simd_data(desc), 4, 4);
    const bool XxC = extract32(simd_data(desc), 2, 1);

    vflr64(v1, v2, env, true, XxC, erm, GETPC());
}

static void vfma64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
                   const S390Vector *v4, CPUS390XState *env, bool s, int flags,
                   uintptr_t retaddr)
{
    uint8_t vxc, vec_exc = 0;
    S390Vector tmp = {};
    int i;

    for (i = 0; i < 2; i++) {
        const uint64_t a = s390_vec_read_element64(v2, i);
        const uint64_t b = s390_vec_read_element64(v3, i);
        const uint64_t c = s390_vec_read_element64(v4, i);
        uint64_t ret = float64_muladd(a, b, c, flags, &env->fpu_status);

        s390_vec_write_element64(&tmp, i, ret);
        vxc = check_ieee_exc(env, i, false, &vec_exc);
        if (s || vxc) {
            break;
        }
    }
    handle_ieee_exc(env, vxc, vec_exc, retaddr);
    *v1 = tmp;
}

void HELPER(gvec_vfma64)(void *v1, const void *v2, const void *v3,
                         const void *v4, CPUS390XState *env, uint32_t desc)
{
    vfma64(v1, v2, v3, v4, env, false, 0, GETPC());
}

void HELPER(gvec_vfma64s)(void *v1, const void *v2, const void *v3,
                         const void *v4, CPUS390XState *env, uint32_t desc)
{
    vfma64(v1, v2, v3, v4, env, true, 0, GETPC());
}

void HELPER(gvec_vfms64)(void *v1, const void *v2, const void *v3,
                         const void *v4, CPUS390XState *env, uint32_t desc)
{
    vfma64(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC());
}

void HELPER(gvec_vfms64s)(void *v1, const void *v2, const void *v3,
                         const void *v4, CPUS390XState *env, uint32_t desc)
{
    vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC());
}

void HELPER(gvec_vftci64)(void *v1, const void *v2, CPUS390XState *env,
                          uint32_t desc)
{
    const uint16_t i3 = extract32(simd_data(desc), 4, 12);
    const bool s = extract32(simd_data(desc), 3, 1);
    int i, match = 0;

    for (i = 0; i < 2; i++) {
        const float64 a = s390_vec_read_float64(v2, i);

        if (float64_dcmask(env, a) & i3) {
            match++;
            s390_vec_write_element64(v1, i, -1ull);
        } else {
            s390_vec_write_element64(v1, i, 0);
        }
        if (s) {
            break;
        }
    }

    if (match == 2 || (s && match)) {
        env->cc_op = 0;
    } else if (match) {
        env->cc_op = 1;
    } else {
        env->cc_op = 3;
    }
}
Commit	Line	Data
3a0eae85 DH	1	/*
	2	* QEMU TCG support -- s390x vector floating point instruction support
	3	*
	4	* Copyright (C) 2019 Red Hat Inc
	5	*
	6	* Authors:
	7	* David Hildenbrand <david@redhat.com>
	8	*
	9	* This work is licensed under the terms of the GNU GPL, version 2 or later.
	10	* See the COPYING file in the top-level directory.
	11	*/
	12	#include "qemu/osdep.h"
	13	#include "qemu-common.h"
	14	#include "cpu.h"
	15	#include "internal.h"
	16	#include "vec.h"
	17	#include "tcg_s390x.h"
	18	#include "tcg/tcg-gvec-desc.h"
	19	#include "exec/exec-all.h"
	20	#include "exec/helper-proto.h"
	21	#include "fpu/softfloat.h"
	22
	23	#define VIC_INVALID 0x1
	24	#define VIC_DIVBYZERO 0x2
	25	#define VIC_OVERFLOW 0x3
	26	#define VIC_UNDERFLOW 0x4
	27	#define VIC_INEXACT 0x5
	28
	29	/* returns the VEX. If the VEX is 0, there is no trap */
	30	static uint8_t check_ieee_exc(CPUS390XState *env, uint8_t enr, bool XxC,
	31	uint8_t *vec_exc)
	32	{
	33	uint8_t vece_exc = 0, trap_exc;
	34	unsigned qemu_exc;
	35
	36	/* Retrieve and clear the softfloat exceptions */
	37	qemu_exc = env->fpu_status.float_exception_flags;
	38	if (qemu_exc == 0) {
	39	return 0;
	40	}
	41	env->fpu_status.float_exception_flags = 0;
	42
	43	vece_exc = s390_softfloat_exc_to_ieee(qemu_exc);
	44
	45	/* Add them to the vector-wide s390x exception bits */
	46	*vec_exc \|= vece_exc;
	47
	48	/* Check for traps and construct the VXC */
	49	trap_exc = vece_exc & env->fpc >> 24;
	50	if (trap_exc) {
	51	if (trap_exc & S390_IEEE_MASK_INVALID) {
	52	return enr << 4 \| VIC_INVALID;
	53	} else if (trap_exc & S390_IEEE_MASK_DIVBYZERO) {
	54	return enr << 4 \| VIC_DIVBYZERO;
	55	} else if (trap_exc & S390_IEEE_MASK_OVERFLOW) {
	56	return enr << 4 \| VIC_OVERFLOW;
	57	} else if (trap_exc & S390_IEEE_MASK_UNDERFLOW) {
	58	return enr << 4 \| VIC_UNDERFLOW;
	59	} else if (!XxC) {
	60	g_assert(trap_exc & S390_IEEE_MASK_INEXACT);
	61	/* inexact has lowest priority on traps */
	62	return enr << 4 \| VIC_INEXACT;
	63	}
	64	}
65	return 0;
66	}
67
68	static void handle_ieee_exc(CPUS390XState *env, uint8_t vxc, uint8_t vec_exc,
69	uintptr_t retaddr)
70	{
71	if (vxc) {
72	/* on traps, the fpc flags are not updated, instruction is suppressed */
73	tcg_s390_vector_exception(env, vxc, retaddr);
74	}
75	if (vec_exc) {
76	/* indicate exceptions for all elements combined */
77	env->fpc \|= vec_exc << 16;
78	}
79	}
80
863b9507 DH	81	static float64 s390_vec_read_float64(const S390Vector *v, uint8_t enr)
	82	{
	83	return make_float64(s390_vec_read_element64(v, enr));
	84	}
	85
	86	static void s390_vec_write_float64(S390Vector *v, uint8_t enr, float64 data)
	87	{
	88	return s390_vec_write_element64(v, enr, data);
	89	}
	90
21bd6ea2	91	typedef float64 (vop64_2_fn)(float64 a, float_status s);
bb03fd84 DH	92	static void vop64_2(S390Vector v1, const S390Vector v2, CPUS390XState *env,
	93	bool s, bool XxC, uint8_t erm, vop64_2_fn fn,
	94	uintptr_t retaddr)
	95	{
	96	uint8_t vxc, vec_exc = 0;
	97	S390Vector tmp = {};
	98	int i, old_mode;
	99
	100	old_mode = s390_swap_bfp_rounding_mode(env, erm);
	101	for (i = 0; i < 2; i++) {
21bd6ea2	102	const float64 a = s390_vec_read_float64(v2, i);
bb03fd84	103
21bd6ea2	104	s390_vec_write_float64(&tmp, i, fn(a, &env->fpu_status));
bb03fd84 DH	105	vxc = check_ieee_exc(env, i, XxC, &vec_exc);
	106	if (s \|\| vxc) {
	107	break;
	108	}
	109	}
	110	s390_restore_bfp_rounding_mode(env, old_mode);
	111	handle_ieee_exc(env, vxc, vec_exc, retaddr);
	112	*v1 = tmp;
	113	}
	114
21bd6ea2 DH	115	static float64 vcdg64(float64 a, float_status *s)
	116	{
	117	return int64_to_float64(a, s);
	118	}
	119
	120	static float64 vcdlg64(float64 a, float_status *s)
	121	{
	122	return uint64_to_float64(a, s);
	123	}
	124
	125	static float64 vcgd64(float64 a, float_status *s)
	126	{
	127	const float64 tmp = float64_to_int64(a, s);
	128
	129	return float64_is_any_nan(a) ? INT64_MIN : tmp;
	130	}
	131
	132	static float64 vclgd64(float64 a, float_status *s)
	133	{
	134	const float64 tmp = float64_to_uint64(a, s);
	135
	136	return float64_is_any_nan(a) ? 0 : tmp;
	137	}
	138
	139	#define DEF_GVEC_VOP2_FN(NAME, FN, BITS) \
	140	void HELPER(gvec_##NAME##BITS)(void v1, const void v2, CPUS390XState *env, \
	141	uint32_t desc) \
	142	{ \
	143	const uint8_t erm = extract32(simd_data(desc), 4, 4); \
	144	const bool se = extract32(simd_data(desc), 3, 1); \
	145	const bool XxC = extract32(simd_data(desc), 2, 1); \
	146	\
	147	vop##BITS##_2(v1, v2, env, se, XxC, erm, FN, GETPC()); \
	148	}
	149
	150	#define DEF_GVEC_VOP2_64(NAME) \
	151	DEF_GVEC_VOP2_FN(NAME, NAME##64, 64)
	152
	153	#define DEF_GVEC_VOP2(NAME, OP) \
	154	DEF_GVEC_VOP2_FN(NAME, float64_##OP, 64)
	155
	156	DEF_GVEC_VOP2_64(vcdg)
	157	DEF_GVEC_VOP2_64(vcdlg)
	158	DEF_GVEC_VOP2_64(vcgd)
	159	DEF_GVEC_VOP2_64(vclgd)
	160	DEF_GVEC_VOP2(vfi, round_to_int)
	161	DEF_GVEC_VOP2(vfsq, sqrt)
	162
863b9507	163	typedef float64 (vop64_3_fn)(float64 a, float64 b, float_status s);
3a0eae85 DH	164	static void vop64_3(S390Vector v1, const S390Vector v2, const S390Vector *v3,
	165	CPUS390XState *env, bool s, vop64_3_fn fn,
	166	uintptr_t retaddr)
	167	{
	168	uint8_t vxc, vec_exc = 0;
	169	S390Vector tmp = {};
	170	int i;
	171
	172	for (i = 0; i < 2; i++) {
863b9507 DH	173	const float64 a = s390_vec_read_float64(v2, i);
863b9507 DH	174	const float64 b = s390_vec_read_float64(v3, i);
3a0eae85	175
863b9507	176	s390_vec_write_float64(&tmp, i, fn(a, b, &env->fpu_status));
3a0eae85 DH	177	vxc = check_ieee_exc(env, i, false, &vec_exc);
	178	if (s \|\| vxc) {
	179	break;
	180	}
	181	}
	182	handle_ieee_exc(env, vxc, vec_exc, retaddr);
	183	*v1 = tmp;
	184	}
	185
863b9507 DH	186	#define DEF_GVEC_VOP3(NAME, OP) \
	187	void HELPER(gvec_##NAME##64)(void v1, const void v2, const void *v3, \
	188	CPUS390XState *env, uint32_t desc) \
	189	{ \
	190	const bool se = extract32(simd_data(desc), 3, 1); \
	191	\
	192	vop64_3(v1, v2, v3, env, se, float64_##OP, GETPC()); \
3a0eae85 DH	193	}
3a0eae85 DH	194
863b9507 DH	195	DEF_GVEC_VOP3(vfa, add)
	196	DEF_GVEC_VOP3(vfs, sub)
	197	DEF_GVEC_VOP3(vfd, div)
	198	DEF_GVEC_VOP3(vfm, mul)
5b89f0fb DH	199
	200	static int wfc64(const S390Vector v1, const S390Vector v2,
	201	CPUS390XState *env, bool signal, uintptr_t retaddr)
	202	{
	203	/* only the zero-indexed elements are compared */
	204	const float64 a = s390_vec_read_element64(v1, 0);
	205	const float64 b = s390_vec_read_element64(v2, 0);
	206	uint8_t vxc, vec_exc = 0;
	207	int cmp;
	208
	209	if (signal) {
	210	cmp = float64_compare(a, b, &env->fpu_status);
	211	} else {
	212	cmp = float64_compare_quiet(a, b, &env->fpu_status);
	213	}
	214	vxc = check_ieee_exc(env, 0, false, &vec_exc);
	215	handle_ieee_exc(env, vxc, vec_exc, retaddr);
	216
	217	return float_comp_to_cc(env, cmp);
	218	}
	219
	220	void HELPER(gvec_wfc64)(const void v1, const void v2, CPUS390XState *env,
	221	uint32_t desc)
	222	{
	223	env->cc_op = wfc64(v1, v2, env, false, GETPC());
	224	}
	225
	226	void HELPER(gvec_wfk64)(const void v1, const void v2, CPUS390XState *env,
	227	uint32_t desc)
	228	{
	229	env->cc_op = wfc64(v1, v2, env, true, GETPC());
	230	}
2c806ab4	231
0673ecdf	232	typedef bool (vfc64_fn)(float64 a, float64 b, float_status status);
2c806ab4 DH	233	static int vfc64(S390Vector v1, const S390Vector v2, const S390Vector *v3,
	234	CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
	235	{
	236	uint8_t vxc, vec_exc = 0;
	237	S390Vector tmp = {};
	238	int match = 0;
	239	int i;
	240
	241	for (i = 0; i < 2; i++) {
64deb65a DH	242	const float64 a = s390_vec_read_float64(v2, i);
64deb65a DH	243	const float64 b = s390_vec_read_float64(v3, i);
2c806ab4 DH	244
	245	/* swap the order of the parameters, so we can use existing functions */
	246	if (fn(b, a, &env->fpu_status)) {
	247	match++;
	248	s390_vec_write_element64(&tmp, i, -1ull);
	249	}
	250	vxc = check_ieee_exc(env, i, false, &vec_exc);
	251	if (s \|\| vxc) {
	252	break;
	253	}
	254	}
	255
	256	handle_ieee_exc(env, vxc, vec_exc, retaddr);
	257	*v1 = tmp;
	258	if (match) {
	259	return s \|\| match == 2 ? 0 : 1;
	260	}
	261	return 3;
	262	}
	263
64deb65a DH	264	#define DEF_GVEC_VFC_B(NAME, OP, BITS) \
	265	void HELPER(gvec_##NAME##BITS)(void v1, const void v2, const void *v3, \
	266	CPUS390XState *env, uint32_t desc) \
	267	{ \
	268	const bool se = extract32(simd_data(desc), 3, 1); \
	269	vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
	270	\
	271	vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
	272	} \
	273	\
	274	void HELPER(gvec_##NAME##BITS##_cc)(void v1, const void v2, const void *v3, \
	275	CPUS390XState *env, uint32_t desc) \
	276	{ \
	277	const bool se = extract32(simd_data(desc), 3, 1); \
	278	vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
	279	\
	280	env->cc_op = vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
2c806ab4 DH	281	}
2c806ab4 DH	282
64deb65a DH	283	#define DEF_GVEC_VFC(NAME, OP) \
64deb65a DH	284	DEF_GVEC_VFC_B(NAME, OP, 64)
2c806ab4	285
64deb65a DH	286	DEF_GVEC_VFC(vfce, eq)
	287	DEF_GVEC_VFC(vfch, lt)
	288	DEF_GVEC_VFC(vfche, le)
bb03fd84	289
1a76e59d DH	290	static void vfll32(S390Vector v1, const S390Vector v2, CPUS390XState *env,
	291	bool s, uintptr_t retaddr)
	292	{
	293	uint8_t vxc, vec_exc = 0;
	294	S390Vector tmp = {};
	295	int i;
	296
	297	for (i = 0; i < 2; i++) {
	298	/* load from even element */
	299	const float32 a = s390_vec_read_element32(v2, i * 2);
	300	const uint64_t ret = float32_to_float64(a, &env->fpu_status);
	301
	302	s390_vec_write_element64(&tmp, i, ret);
	303	/* indicate the source element */
	304	vxc = check_ieee_exc(env, i * 2, false, &vec_exc);
	305	if (s \|\| vxc) {
	306	break;
	307	}
	308	}
	309	handle_ieee_exc(env, vxc, vec_exc, retaddr);
	310	*v1 = tmp;
	311	}
	312
	313	void HELPER(gvec_vfll32)(void v1, const void v2, CPUS390XState *env,
	314	uint32_t desc)
	315	{
	316	vfll32(v1, v2, env, false, GETPC());
	317	}
	318
	319	void HELPER(gvec_vfll32s)(void v1, const void v2, CPUS390XState *env,
	320	uint32_t desc)
	321	{
	322	vfll32(v1, v2, env, true, GETPC());
	323	}
4500ede4 DH	324
	325	static void vflr64(S390Vector v1, const S390Vector v2, CPUS390XState *env,
	326	bool s, bool XxC, uint8_t erm, uintptr_t retaddr)
	327	{
	328	uint8_t vxc, vec_exc = 0;
	329	S390Vector tmp = {};
	330	int i, old_mode;
	331
	332	old_mode = s390_swap_bfp_rounding_mode(env, erm);
	333	for (i = 0; i < 2; i++) {
	334	float64 a = s390_vec_read_element64(v2, i);
	335	uint32_t ret = float64_to_float32(a, &env->fpu_status);
	336
	337	/* place at even element */
	338	s390_vec_write_element32(&tmp, i * 2, ret);
	339	/* indicate the source element */
	340	vxc = check_ieee_exc(env, i, XxC, &vec_exc);
	341	if (s \|\| vxc) {
	342	break;
	343	}
	344	}
	345	s390_restore_bfp_rounding_mode(env, old_mode);
	346	handle_ieee_exc(env, vxc, vec_exc, retaddr);
	347	*v1 = tmp;
	348	}
	349
	350	void HELPER(gvec_vflr64)(void v1, const void v2, CPUS390XState *env,
	351	uint32_t desc)
	352	{
	353	const uint8_t erm = extract32(simd_data(desc), 4, 4);
	354	const bool XxC = extract32(simd_data(desc), 2, 1);
	355
	356	vflr64(v1, v2, env, false, XxC, erm, GETPC());
	357	}
	358
	359	void HELPER(gvec_vflr64s)(void v1, const void v2, CPUS390XState *env,
	360	uint32_t desc)
	361	{
	362	const uint8_t erm = extract32(simd_data(desc), 4, 4);
	363	const bool XxC = extract32(simd_data(desc), 2, 1);
	364
	365	vflr64(v1, v2, env, true, XxC, erm, GETPC());
	366	}
8d47d4d2	367
c64c5984 DH	368	static void vfma64(S390Vector v1, const S390Vector v2, const S390Vector *v3,
	369	const S390Vector v4, CPUS390XState env, bool s, int flags,
	370	uintptr_t retaddr)
	371	{
	372	uint8_t vxc, vec_exc = 0;
	373	S390Vector tmp = {};
	374	int i;
	375
	376	for (i = 0; i < 2; i++) {
	377	const uint64_t a = s390_vec_read_element64(v2, i);
	378	const uint64_t b = s390_vec_read_element64(v3, i);
	379	const uint64_t c = s390_vec_read_element64(v4, i);
	380	uint64_t ret = float64_muladd(a, b, c, flags, &env->fpu_status);
	381
	382	s390_vec_write_element64(&tmp, i, ret);
	383	vxc = check_ieee_exc(env, i, false, &vec_exc);
	384	if (s \|\| vxc) {
	385	break;
	386	}
	387	}
	388	handle_ieee_exc(env, vxc, vec_exc, retaddr);
	389	*v1 = tmp;
	390	}
	391
	392	void HELPER(gvec_vfma64)(void v1, const void v2, const void *v3,
	393	const void v4, CPUS390XState env, uint32_t desc)
	394	{
	395	vfma64(v1, v2, v3, v4, env, false, 0, GETPC());
	396	}
	397
	398	void HELPER(gvec_vfma64s)(void v1, const void v2, const void *v3,
	399	const void v4, CPUS390XState env, uint32_t desc)
	400	{
	401	vfma64(v1, v2, v3, v4, env, true, 0, GETPC());
	402	}
	403
	404	void HELPER(gvec_vfms64)(void v1, const void v2, const void *v3,
	405	const void v4, CPUS390XState env, uint32_t desc)
	406	{
	407	vfma64(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC());
	408	}
	409
	410	void HELPER(gvec_vfms64s)(void v1, const void v2, const void *v3,
	411	const void v4, CPUS390XState env, uint32_t desc)
	412	{
	413	vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC());
	414	}
5938f20c	415
622ebe64 DH	416	void HELPER(gvec_vftci64)(void v1, const void v2, CPUS390XState *env,
622ebe64 DH	417	uint32_t desc)
83b955f9	418	{
622ebe64 DH	419	const uint16_t i3 = extract32(simd_data(desc), 4, 12);
622ebe64 DH	420	const bool s = extract32(simd_data(desc), 3, 1);
83b955f9 DH	421	int i, match = 0;
	422
	423	for (i = 0; i < 2; i++) {
622ebe64	424	const float64 a = s390_vec_read_float64(v2, i);
83b955f9 DH	425
	426	if (float64_dcmask(env, a) & i3) {
	427	match++;
	428	s390_vec_write_element64(v1, i, -1ull);
	429	} else {
	430	s390_vec_write_element64(v1, i, 0);
	431	}
	432	if (s) {
	433	break;
	434	}
	435	}
	436
622ebe64 DH	437	if (match == 2 \|\| (s && match)) {
	438	env->cc_op = 0;
	439	} else if (match) {
	440	env->cc_op = 1;
	441	} else {
	442	env->cc_op = 3;
83b955f9	443	}
83b955f9	444	}