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1 | /* |
2 | * TriCore emulation for qemu: main translation routines. | |
3 | * | |
4 | * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
02754acd | 9 | * version 2.1 of the License, or (at your option) any later version. |
48e06fe0 BK |
10 | * |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
61d9f32b | 20 | #include "qemu/osdep.h" |
da34e65c | 21 | #include "qapi/error.h" |
48e06fe0 | 22 | #include "cpu.h" |
63c91552 | 23 | #include "exec/exec-all.h" |
b190f477 EO |
24 | #include "qemu/error-report.h" |
25 | ||
26 | static hwaddr tricore_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, | |
27 | MemTxAttrs *attrs) | |
28 | { | |
29 | error_report("function cpu_get_phys_page_attrs_debug not " | |
30 | "implemented, aborting"); | |
31 | return -1; | |
32 | } | |
48e06fe0 BK |
33 | |
34 | static inline void set_feature(CPUTriCoreState *env, int feature) | |
35 | { | |
36 | env->features |= 1ULL << feature; | |
37 | } | |
38 | ||
39 | static void tricore_cpu_set_pc(CPUState *cs, vaddr value) | |
40 | { | |
41 | TriCoreCPU *cpu = TRICORE_CPU(cs); | |
42 | CPUTriCoreState *env = &cpu->env; | |
43 | ||
44 | env->PC = value & ~(target_ulong)1; | |
45 | } | |
46 | ||
47 | static void tricore_cpu_synchronize_from_tb(CPUState *cs, | |
48 | TranslationBlock *tb) | |
49 | { | |
50 | TriCoreCPU *cpu = TRICORE_CPU(cs); | |
51 | CPUTriCoreState *env = &cpu->env; | |
52 | ||
53 | env->PC = tb->pc; | |
54 | } | |
55 | ||
56 | static void tricore_cpu_reset(CPUState *s) | |
57 | { | |
58 | TriCoreCPU *cpu = TRICORE_CPU(s); | |
59 | TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(cpu); | |
60 | CPUTriCoreState *env = &cpu->env; | |
61 | ||
62 | tcc->parent_reset(s); | |
63 | ||
48e06fe0 BK |
64 | cpu_state_reset(env); |
65 | } | |
66 | ||
67 | static bool tricore_cpu_has_work(CPUState *cs) | |
68 | { | |
69 | return true; | |
70 | } | |
71 | ||
72 | static void tricore_cpu_realizefn(DeviceState *dev, Error **errp) | |
73 | { | |
74 | CPUState *cs = CPU(dev); | |
47e04430 | 75 | TriCoreCPU *cpu = TRICORE_CPU(dev); |
48e06fe0 | 76 | TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(dev); |
47e04430 | 77 | CPUTriCoreState *env = &cpu->env; |
ce5b1bbf LV |
78 | Error *local_err = NULL; |
79 | ||
80 | cpu_exec_realizefn(cs, &local_err); | |
81 | if (local_err != NULL) { | |
82 | error_propagate(errp, local_err); | |
83 | return; | |
84 | } | |
48e06fe0 | 85 | |
47e04430 | 86 | /* Some features automatically imply others */ |
6d2afc8a BK |
87 | if (tricore_feature(env, TRICORE_FEATURE_161)) { |
88 | set_feature(env, TRICORE_FEATURE_16); | |
89 | } | |
90 | ||
47e04430 BK |
91 | if (tricore_feature(env, TRICORE_FEATURE_16)) { |
92 | set_feature(env, TRICORE_FEATURE_131); | |
93 | } | |
94 | if (tricore_feature(env, TRICORE_FEATURE_131)) { | |
95 | set_feature(env, TRICORE_FEATURE_13); | |
96 | } | |
48e06fe0 BK |
97 | cpu_reset(cs); |
98 | qemu_init_vcpu(cs); | |
99 | ||
100 | tcc->parent_realize(dev, errp); | |
101 | } | |
102 | ||
103 | ||
104 | static void tricore_cpu_initfn(Object *obj) | |
105 | { | |
48e06fe0 | 106 | TriCoreCPU *cpu = TRICORE_CPU(obj); |
48e06fe0 | 107 | |
7506ed90 | 108 | cpu_set_cpustate_pointers(cpu); |
48e06fe0 BK |
109 | } |
110 | ||
111 | static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model) | |
112 | { | |
113 | ObjectClass *oc; | |
114 | char *typename; | |
115 | ||
b9ad9d5b | 116 | typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model); |
48e06fe0 BK |
117 | oc = object_class_by_name(typename); |
118 | g_free(typename); | |
119 | if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) || | |
120 | object_class_is_abstract(oc)) { | |
121 | return NULL; | |
122 | } | |
123 | return oc; | |
124 | } | |
125 | ||
126 | static void tc1796_initfn(Object *obj) | |
127 | { | |
128 | TriCoreCPU *cpu = TRICORE_CPU(obj); | |
129 | ||
fd5ecf31 BK |
130 | set_feature(&cpu->env, TRICORE_FEATURE_13); |
131 | } | |
132 | ||
133 | static void tc1797_initfn(Object *obj) | |
134 | { | |
135 | TriCoreCPU *cpu = TRICORE_CPU(obj); | |
136 | ||
5f30046f | 137 | set_feature(&cpu->env, TRICORE_FEATURE_131); |
48e06fe0 BK |
138 | } |
139 | ||
6d2afc8a | 140 | static void tc27x_initfn(Object *obj) |
48e06fe0 BK |
141 | { |
142 | TriCoreCPU *cpu = TRICORE_CPU(obj); | |
143 | ||
6d2afc8a | 144 | set_feature(&cpu->env, TRICORE_FEATURE_161); |
48e06fe0 BK |
145 | } |
146 | ||
48e06fe0 BK |
147 | static void tricore_cpu_class_init(ObjectClass *c, void *data) |
148 | { | |
149 | TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c); | |
150 | CPUClass *cc = CPU_CLASS(c); | |
151 | DeviceClass *dc = DEVICE_CLASS(c); | |
152 | ||
bf853881 PMD |
153 | device_class_set_parent_realize(dc, tricore_cpu_realizefn, |
154 | &mcc->parent_realize); | |
48e06fe0 BK |
155 | |
156 | mcc->parent_reset = cc->reset; | |
157 | cc->reset = tricore_cpu_reset; | |
158 | cc->class_by_name = tricore_cpu_class_by_name; | |
159 | cc->has_work = tricore_cpu_has_work; | |
160 | ||
48e06fe0 BK |
161 | cc->dump_state = tricore_cpu_dump_state; |
162 | cc->set_pc = tricore_cpu_set_pc; | |
163 | cc->synchronize_from_tb = tricore_cpu_synchronize_from_tb; | |
b190f477 | 164 | cc->get_phys_page_attrs_debug = tricore_cpu_get_phys_page_attrs_debug; |
55c3ceef | 165 | cc->tcg_initialize = tricore_tcg_init; |
68d6eee7 | 166 | cc->tlb_fill = tricore_cpu_tlb_fill; |
48e06fe0 BK |
167 | } |
168 | ||
b9ad9d5b IM |
169 | #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \ |
170 | { \ | |
171 | .parent = TYPE_TRICORE_CPU, \ | |
172 | .instance_init = initfn, \ | |
173 | .name = TRICORE_CPU_TYPE_NAME(cpu_model), \ | |
174 | } | |
175 | ||
176 | static const TypeInfo tricore_cpu_type_infos[] = { | |
177 | { | |
178 | .name = TYPE_TRICORE_CPU, | |
179 | .parent = TYPE_CPU, | |
48e06fe0 | 180 | .instance_size = sizeof(TriCoreCPU), |
b9ad9d5b IM |
181 | .instance_init = tricore_cpu_initfn, |
182 | .abstract = true, | |
48e06fe0 | 183 | .class_size = sizeof(TriCoreCPUClass), |
b9ad9d5b IM |
184 | .class_init = tricore_cpu_class_init, |
185 | }, | |
186 | DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn), | |
187 | DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn), | |
188 | DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn), | |
48e06fe0 BK |
189 | }; |
190 | ||
b9ad9d5b | 191 | DEFINE_TYPES(tricore_cpu_type_infos) |