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48e06fe0 BK |
1 | /* |
2 | * TriCore emulation for qemu: main translation routines. | |
3 | * | |
4 | * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
02754acd | 9 | * version 2.1 of the License, or (at your option) any later version. |
48e06fe0 BK |
10 | * |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
61d9f32b | 20 | #include "qemu/osdep.h" |
da34e65c | 21 | #include "qapi/error.h" |
48e06fe0 | 22 | #include "cpu.h" |
63c91552 | 23 | #include "exec/exec-all.h" |
b190f477 EO |
24 | #include "qemu/error-report.h" |
25 | ||
48e06fe0 BK |
26 | static inline void set_feature(CPUTriCoreState *env, int feature) |
27 | { | |
28 | env->features |= 1ULL << feature; | |
29 | } | |
30 | ||
d127de3b BK |
31 | static gchar *tricore_gdb_arch_name(CPUState *cs) |
32 | { | |
33 | return g_strdup("tricore"); | |
34 | } | |
35 | ||
48e06fe0 BK |
36 | static void tricore_cpu_set_pc(CPUState *cs, vaddr value) |
37 | { | |
38 | TriCoreCPU *cpu = TRICORE_CPU(cs); | |
39 | CPUTriCoreState *env = &cpu->env; | |
40 | ||
41 | env->PC = value & ~(target_ulong)1; | |
42 | } | |
43 | ||
e4fdf9df RH |
44 | static vaddr tricore_cpu_get_pc(CPUState *cs) |
45 | { | |
46 | TriCoreCPU *cpu = TRICORE_CPU(cs); | |
47 | CPUTriCoreState *env = &cpu->env; | |
48 | ||
49 | return env->PC; | |
50 | } | |
51 | ||
48e06fe0 | 52 | static void tricore_cpu_synchronize_from_tb(CPUState *cs, |
04a37d4c | 53 | const TranslationBlock *tb) |
48e06fe0 BK |
54 | { |
55 | TriCoreCPU *cpu = TRICORE_CPU(cs); | |
56 | CPUTriCoreState *env = &cpu->env; | |
57 | ||
58 | env->PC = tb->pc; | |
59 | } | |
60 | ||
781c67ca | 61 | static void tricore_cpu_reset(DeviceState *dev) |
48e06fe0 | 62 | { |
781c67ca | 63 | CPUState *s = CPU(dev); |
48e06fe0 BK |
64 | TriCoreCPU *cpu = TRICORE_CPU(s); |
65 | TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(cpu); | |
66 | CPUTriCoreState *env = &cpu->env; | |
67 | ||
781c67ca | 68 | tcc->parent_reset(dev); |
48e06fe0 | 69 | |
48e06fe0 BK |
70 | cpu_state_reset(env); |
71 | } | |
72 | ||
73 | static bool tricore_cpu_has_work(CPUState *cs) | |
74 | { | |
75 | return true; | |
76 | } | |
77 | ||
78 | static void tricore_cpu_realizefn(DeviceState *dev, Error **errp) | |
79 | { | |
80 | CPUState *cs = CPU(dev); | |
47e04430 | 81 | TriCoreCPU *cpu = TRICORE_CPU(dev); |
48e06fe0 | 82 | TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(dev); |
47e04430 | 83 | CPUTriCoreState *env = &cpu->env; |
ce5b1bbf LV |
84 | Error *local_err = NULL; |
85 | ||
86 | cpu_exec_realizefn(cs, &local_err); | |
87 | if (local_err != NULL) { | |
88 | error_propagate(errp, local_err); | |
89 | return; | |
90 | } | |
48e06fe0 | 91 | |
47e04430 | 92 | /* Some features automatically imply others */ |
6d2afc8a BK |
93 | if (tricore_feature(env, TRICORE_FEATURE_161)) { |
94 | set_feature(env, TRICORE_FEATURE_16); | |
95 | } | |
96 | ||
47e04430 BK |
97 | if (tricore_feature(env, TRICORE_FEATURE_16)) { |
98 | set_feature(env, TRICORE_FEATURE_131); | |
99 | } | |
100 | if (tricore_feature(env, TRICORE_FEATURE_131)) { | |
101 | set_feature(env, TRICORE_FEATURE_13); | |
102 | } | |
48e06fe0 BK |
103 | cpu_reset(cs); |
104 | qemu_init_vcpu(cs); | |
105 | ||
106 | tcc->parent_realize(dev, errp); | |
107 | } | |
108 | ||
109 | ||
110 | static void tricore_cpu_initfn(Object *obj) | |
111 | { | |
48e06fe0 | 112 | TriCoreCPU *cpu = TRICORE_CPU(obj); |
48e06fe0 | 113 | |
7506ed90 | 114 | cpu_set_cpustate_pointers(cpu); |
48e06fe0 BK |
115 | } |
116 | ||
117 | static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model) | |
118 | { | |
119 | ObjectClass *oc; | |
120 | char *typename; | |
121 | ||
b9ad9d5b | 122 | typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model); |
48e06fe0 BK |
123 | oc = object_class_by_name(typename); |
124 | g_free(typename); | |
125 | if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) || | |
126 | object_class_is_abstract(oc)) { | |
127 | return NULL; | |
128 | } | |
129 | return oc; | |
130 | } | |
131 | ||
132 | static void tc1796_initfn(Object *obj) | |
133 | { | |
134 | TriCoreCPU *cpu = TRICORE_CPU(obj); | |
135 | ||
fd5ecf31 BK |
136 | set_feature(&cpu->env, TRICORE_FEATURE_13); |
137 | } | |
138 | ||
139 | static void tc1797_initfn(Object *obj) | |
140 | { | |
141 | TriCoreCPU *cpu = TRICORE_CPU(obj); | |
142 | ||
5f30046f | 143 | set_feature(&cpu->env, TRICORE_FEATURE_131); |
48e06fe0 BK |
144 | } |
145 | ||
6d2afc8a | 146 | static void tc27x_initfn(Object *obj) |
48e06fe0 BK |
147 | { |
148 | TriCoreCPU *cpu = TRICORE_CPU(obj); | |
149 | ||
6d2afc8a | 150 | set_feature(&cpu->env, TRICORE_FEATURE_161); |
48e06fe0 BK |
151 | } |
152 | ||
8b80bd28 PMD |
153 | #include "hw/core/sysemu-cpu-ops.h" |
154 | ||
155 | static const struct SysemuCPUOps tricore_sysemu_ops = { | |
08928c6d | 156 | .get_phys_page_debug = tricore_cpu_get_phys_page_debug, |
8b80bd28 PMD |
157 | }; |
158 | ||
78271684 CF |
159 | #include "hw/core/tcg-cpu-ops.h" |
160 | ||
11906557 | 161 | static const struct TCGCPUOps tricore_tcg_ops = { |
78271684 CF |
162 | .initialize = tricore_tcg_init, |
163 | .synchronize_from_tb = tricore_cpu_synchronize_from_tb, | |
164 | .tlb_fill = tricore_cpu_tlb_fill, | |
165 | }; | |
166 | ||
48e06fe0 BK |
167 | static void tricore_cpu_class_init(ObjectClass *c, void *data) |
168 | { | |
169 | TriCoreCPUClass *mcc = TRICORE_CPU_CLASS(c); | |
170 | CPUClass *cc = CPU_CLASS(c); | |
171 | DeviceClass *dc = DEVICE_CLASS(c); | |
172 | ||
bf853881 PMD |
173 | device_class_set_parent_realize(dc, tricore_cpu_realizefn, |
174 | &mcc->parent_realize); | |
48e06fe0 | 175 | |
781c67ca | 176 | device_class_set_parent_reset(dc, tricore_cpu_reset, &mcc->parent_reset); |
48e06fe0 BK |
177 | cc->class_by_name = tricore_cpu_class_by_name; |
178 | cc->has_work = tricore_cpu_has_work; | |
179 | ||
d127de3b BK |
180 | cc->gdb_read_register = tricore_cpu_gdb_read_register; |
181 | cc->gdb_write_register = tricore_cpu_gdb_write_register; | |
182 | cc->gdb_num_core_regs = 44; | |
183 | cc->gdb_arch_name = tricore_gdb_arch_name; | |
184 | ||
48e06fe0 BK |
185 | cc->dump_state = tricore_cpu_dump_state; |
186 | cc->set_pc = tricore_cpu_set_pc; | |
e4fdf9df | 187 | cc->get_pc = tricore_cpu_get_pc; |
8b80bd28 | 188 | cc->sysemu_ops = &tricore_sysemu_ops; |
78271684 | 189 | cc->tcg_ops = &tricore_tcg_ops; |
48e06fe0 BK |
190 | } |
191 | ||
b9ad9d5b IM |
192 | #define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \ |
193 | { \ | |
194 | .parent = TYPE_TRICORE_CPU, \ | |
195 | .instance_init = initfn, \ | |
196 | .name = TRICORE_CPU_TYPE_NAME(cpu_model), \ | |
197 | } | |
198 | ||
199 | static const TypeInfo tricore_cpu_type_infos[] = { | |
200 | { | |
201 | .name = TYPE_TRICORE_CPU, | |
202 | .parent = TYPE_CPU, | |
48e06fe0 | 203 | .instance_size = sizeof(TriCoreCPU), |
b9ad9d5b IM |
204 | .instance_init = tricore_cpu_initfn, |
205 | .abstract = true, | |
48e06fe0 | 206 | .class_size = sizeof(TriCoreCPUClass), |
b9ad9d5b IM |
207 | .class_init = tricore_cpu_class_init, |
208 | }, | |
209 | DEFINE_TRICORE_CPU_TYPE("tc1796", tc1796_initfn), | |
210 | DEFINE_TRICORE_CPU_TYPE("tc1797", tc1797_initfn), | |
211 | DEFINE_TRICORE_CPU_TYPE("tc27x", tc27x_initfn), | |
48e06fe0 BK |
212 | }; |
213 | ||
b9ad9d5b | 214 | DEFINE_TYPES(tricore_cpu_type_infos) |