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4c9649a9 1/*
c3082755 2 * Helpers for loads and stores
5fafdf24 3 *
4c9649a9
JM
4 * Copyright (c) 2007 Jocelyn Mayer
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 */
19
3e457172 20#include "cpu.h"
2ef6175a 21#include "exec/helper-proto.h"
f08b6170 22#include "exec/cpu_ldst.h"
4c9649a9 23
4c9649a9 24/* Softmmu support */
c3082755
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25#ifndef CONFIG_USER_ONLY
26
fdfba1a2 27uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p)
8bb6e981 28{
d2810ffd 29 CPUState *cs = CPU(alpha_env_get_cpu(env));
fdfba1a2 30 return (int32_t)ldl_phys(cs->as, p);
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31}
32
2c17449b 33uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p)
8bb6e981 34{
d2810ffd 35 CPUState *cs = CPU(alpha_env_get_cpu(env));
2c17449b 36 return ldq_phys(cs->as, p);
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37}
38
c3082755 39uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
8bb6e981 40{
d2810ffd 41 CPUState *cs = CPU(alpha_env_get_cpu(env));
2374e73e 42 env->lock_addr = p;
fdfba1a2 43 return env->lock_value = (int32_t)ldl_phys(cs->as, p);
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44}
45
c3082755 46uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
8bb6e981 47{
d2810ffd 48 CPUState *cs = CPU(alpha_env_get_cpu(env));
2374e73e 49 env->lock_addr = p;
2c17449b 50 return env->lock_value = ldq_phys(cs->as, p);
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51}
52
ab1da857 53void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
8bb6e981 54{
d2810ffd 55 CPUState *cs = CPU(alpha_env_get_cpu(env));
ab1da857 56 stl_phys(cs->as, p, v);
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57}
58
f606604f 59void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
8bb6e981 60{
d2810ffd 61 CPUState *cs = CPU(alpha_env_get_cpu(env));
f606604f 62 stq_phys(cs->as, p, v);
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63}
64
c3082755 65uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
8bb6e981 66{
d2810ffd 67 CPUState *cs = CPU(alpha_env_get_cpu(env));
2374e73e 68 uint64_t ret = 0;
8bb6e981 69
2374e73e 70 if (p == env->lock_addr) {
fdfba1a2 71 int32_t old = ldl_phys(cs->as, p);
2374e73e 72 if (old == (int32_t)env->lock_value) {
ab1da857 73 stl_phys(cs->as, p, v);
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74 ret = 1;
75 }
76 }
77 env->lock_addr = -1;
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78
79 return ret;
80}
81
c3082755 82uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
8bb6e981 83{
d2810ffd 84 CPUState *cs = CPU(alpha_env_get_cpu(env));
2374e73e 85 uint64_t ret = 0;
8bb6e981 86
2374e73e 87 if (p == env->lock_addr) {
2c17449b 88 uint64_t old = ldq_phys(cs->as, p);
2374e73e 89 if (old == env->lock_value) {
f606604f 90 stq_phys(cs->as, p, v);
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91 ret = 1;
92 }
93 }
94 env->lock_addr = -1;
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95
96 return ret;
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97}
98
93e22326
PB
99void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
100 int is_write, int is_user, uintptr_t retaddr)
5b450407 101{
93e22326
PB
102 AlphaCPU *cpu = ALPHA_CPU(cs);
103 CPUAlphaState *env = &cpu->env;
5b450407
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104 uint64_t pc;
105 uint32_t insn;
106
a8a826a3 107 if (retaddr) {
3f38f309 108 cpu_restore_state(cs, retaddr);
a8a826a3 109 }
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110
111 pc = env->pc;
c3082755 112 insn = cpu_ldl_code(env, pc);
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113
114 env->trap_arg0 = addr;
115 env->trap_arg1 = insn >> 26; /* opcode */
116 env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
27103424 117 cs->exception_index = EXCP_UNALIGN;
b9f0923e 118 env->error_code = 0;
5638d180 119 cpu_loop_exit(cs);
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120}
121
c658b94f
AF
122void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
123 bool is_write, bool is_exec, int unused,
124 unsigned size)
5b450407 125{
c658b94f
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126 AlphaCPU *cpu = ALPHA_CPU(cs);
127 CPUAlphaState *env = &cpu->env;
128
5b450407 129 env->trap_arg0 = addr;
c658b94f 130 env->trap_arg1 = is_write ? 1 : 0;
ba9c5de5
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131 cs->exception_index = EXCP_MCHK;
132 env->error_code = 0;
133
134 /* ??? We should cpu_restore_state to the faulting insn, but this hook
67cc32eb 135 does not have access to the retaddr value from the original helper.
ba9c5de5
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136 It's all moot until the QEMU PALcode grows an MCHK handler. */
137
138 cpu_loop_exit(cs);
5b450407
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139}
140
4c9649a9
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141/* try to fill the TLB and return an exception if error. If retaddr is
142 NULL, it means that the function was called in C code (i.e. not
143 from generated code or from helper.c) */
144/* XXX: fix it to restore all registers */
d5a11fef 145void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
20503968 146 int mmu_idx, uintptr_t retaddr)
4c9649a9 147{
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148 int ret;
149
d5a11fef 150 ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
2d9671d3 151 if (unlikely(ret != 0)) {
a8a826a3 152 if (retaddr) {
3f38f309 153 cpu_restore_state(cs, retaddr);
a8a826a3 154 }
4c9649a9 155 /* Exception index and error code are already set */
5638d180 156 cpu_loop_exit(cs);
4c9649a9 157 }
4c9649a9 158}
c3082755 159#endif /* CONFIG_USER_ONLY */