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Commit | Line | Data |
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4c9649a9 JM |
1 | /* |
2 | * Alpha emulation cpu micro-operations helpers for qemu. | |
5fafdf24 | 3 | * |
4c9649a9 JM |
4 | * Copyright (c) 2007 Jocelyn Mayer |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #include "exec.h" | |
603fccce | 22 | #include "host-utils.h" |
4c9649a9 JM |
23 | #include "softfloat.h" |
24 | ||
4c9649a9 JM |
25 | void helper_tb_flush (void) |
26 | { | |
27 | tlb_flush(env, 1); | |
28 | } | |
29 | ||
4c9649a9 JM |
30 | /*****************************************************************************/ |
31 | /* Exceptions processing helpers */ | |
6ad02592 | 32 | void helper_excp (int excp, int error) |
4c9649a9 JM |
33 | { |
34 | env->exception_index = excp; | |
35 | env->error_code = error; | |
36 | cpu_loop_exit(); | |
37 | } | |
38 | ||
ae8ecd42 | 39 | uint64_t helper_amask (uint64_t arg) |
4c9649a9 JM |
40 | { |
41 | switch (env->implver) { | |
42 | case IMPLVER_2106x: | |
43 | /* EV4, EV45, LCA, LCA45 & EV5 */ | |
44 | break; | |
45 | case IMPLVER_21164: | |
46 | case IMPLVER_21264: | |
47 | case IMPLVER_21364: | |
ae8ecd42 | 48 | arg &= ~env->amask; |
4c9649a9 JM |
49 | break; |
50 | } | |
ae8ecd42 | 51 | return arg; |
4c9649a9 JM |
52 | } |
53 | ||
6ad02592 | 54 | uint64_t helper_load_pcc (void) |
4c9649a9 JM |
55 | { |
56 | /* XXX: TODO */ | |
6ad02592 | 57 | return 0; |
4c9649a9 JM |
58 | } |
59 | ||
6ad02592 | 60 | uint64_t helper_load_implver (void) |
4c9649a9 | 61 | { |
6ad02592 | 62 | return env->implver; |
4c9649a9 JM |
63 | } |
64 | ||
f18cd223 | 65 | uint64_t helper_load_fpcr (void) |
4c9649a9 | 66 | { |
f18cd223 | 67 | uint64_t ret = 0; |
4c9649a9 | 68 | #ifdef CONFIG_SOFTFLOAT |
f18cd223 | 69 | ret |= env->fp_status.float_exception_flags << 52; |
4c9649a9 | 70 | if (env->fp_status.float_exception_flags) |
f18cd223 | 71 | ret |= 1ULL << 63; |
4c9649a9 JM |
72 | env->ipr[IPR_EXC_SUM] &= ~0x3E: |
73 | env->ipr[IPR_EXC_SUM] |= env->fp_status.float_exception_flags << 1; | |
74 | #endif | |
75 | switch (env->fp_status.float_rounding_mode) { | |
76 | case float_round_nearest_even: | |
f18cd223 | 77 | ret |= 2ULL << 58; |
4c9649a9 JM |
78 | break; |
79 | case float_round_down: | |
f18cd223 | 80 | ret |= 1ULL << 58; |
4c9649a9 JM |
81 | break; |
82 | case float_round_up: | |
f18cd223 | 83 | ret |= 3ULL << 58; |
4c9649a9 JM |
84 | break; |
85 | case float_round_to_zero: | |
86 | break; | |
87 | } | |
f18cd223 | 88 | return ret; |
4c9649a9 JM |
89 | } |
90 | ||
f18cd223 | 91 | void helper_store_fpcr (uint64_t val) |
4c9649a9 JM |
92 | { |
93 | #ifdef CONFIG_SOFTFLOAT | |
f18cd223 | 94 | set_float_exception_flags((val >> 52) & 0x3F, &FP_STATUS); |
4c9649a9 | 95 | #endif |
f18cd223 | 96 | switch ((val >> 58) & 3) { |
4c9649a9 JM |
97 | case 0: |
98 | set_float_rounding_mode(float_round_to_zero, &FP_STATUS); | |
99 | break; | |
100 | case 1: | |
101 | set_float_rounding_mode(float_round_down, &FP_STATUS); | |
102 | break; | |
103 | case 2: | |
104 | set_float_rounding_mode(float_round_nearest_even, &FP_STATUS); | |
105 | break; | |
106 | case 3: | |
107 | set_float_rounding_mode(float_round_up, &FP_STATUS); | |
108 | break; | |
109 | } | |
110 | } | |
111 | ||
6ad02592 | 112 | spinlock_t intr_cpu_lock = SPIN_LOCK_UNLOCKED; |
4c9649a9 | 113 | |
6ad02592 | 114 | uint64_t helper_rs(void) |
4c9649a9 | 115 | { |
6ad02592 AJ |
116 | uint64_t tmp; |
117 | ||
118 | spin_lock(&intr_cpu_lock); | |
119 | tmp = env->intr_flag; | |
120 | env->intr_flag = 1; | |
121 | spin_unlock(&intr_cpu_lock); | |
122 | ||
123 | return tmp; | |
4c9649a9 JM |
124 | } |
125 | ||
6ad02592 | 126 | uint64_t helper_rc(void) |
4c9649a9 | 127 | { |
6ad02592 AJ |
128 | uint64_t tmp; |
129 | ||
130 | spin_lock(&intr_cpu_lock); | |
131 | tmp = env->intr_flag; | |
132 | env->intr_flag = 0; | |
133 | spin_unlock(&intr_cpu_lock); | |
134 | ||
135 | return tmp; | |
4c9649a9 JM |
136 | } |
137 | ||
04acd307 | 138 | uint64_t helper_addqv (uint64_t op1, uint64_t op2) |
4c9649a9 | 139 | { |
04acd307 AJ |
140 | uint64_t tmp = op1; |
141 | op1 += op2; | |
142 | if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) { | |
4c9649a9 JM |
143 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
144 | } | |
04acd307 | 145 | return op1; |
4c9649a9 JM |
146 | } |
147 | ||
04acd307 | 148 | uint64_t helper_addlv (uint64_t op1, uint64_t op2) |
4c9649a9 | 149 | { |
04acd307 AJ |
150 | uint64_t tmp = op1; |
151 | op1 = (uint32_t)(op1 + op2); | |
152 | if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) { | |
4c9649a9 JM |
153 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
154 | } | |
04acd307 | 155 | return op1; |
4c9649a9 JM |
156 | } |
157 | ||
04acd307 | 158 | uint64_t helper_subqv (uint64_t op1, uint64_t op2) |
4c9649a9 | 159 | { |
04acd307 AJ |
160 | uint64_t tmp = op1; |
161 | op1 -= op2; | |
162 | if (unlikely(((~tmp) ^ op1 ^ (-1ULL)) & ((~tmp) ^ op2) & (1ULL << 63))) { | |
4c9649a9 JM |
163 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
164 | } | |
04acd307 | 165 | return op1; |
4c9649a9 JM |
166 | } |
167 | ||
04acd307 | 168 | uint64_t helper_sublv (uint64_t op1, uint64_t op2) |
4c9649a9 | 169 | { |
04acd307 AJ |
170 | uint64_t tmp = op1; |
171 | op1 = (uint32_t)(op1 - op2); | |
172 | if (unlikely(((~tmp) ^ op1 ^ (-1UL)) & ((~tmp) ^ op2) & (1UL << 31))) { | |
4c9649a9 JM |
173 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
174 | } | |
04acd307 | 175 | return op1; |
4c9649a9 JM |
176 | } |
177 | ||
04acd307 | 178 | uint64_t helper_mullv (uint64_t op1, uint64_t op2) |
4c9649a9 | 179 | { |
04acd307 | 180 | int64_t res = (int64_t)op1 * (int64_t)op2; |
4c9649a9 JM |
181 | |
182 | if (unlikely((int32_t)res != res)) { | |
183 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); | |
184 | } | |
04acd307 | 185 | return (int64_t)((int32_t)res); |
4c9649a9 JM |
186 | } |
187 | ||
04acd307 | 188 | uint64_t helper_mulqv (uint64_t op1, uint64_t op2) |
4c9649a9 | 189 | { |
e14fe0a9 JM |
190 | uint64_t tl, th; |
191 | ||
04acd307 | 192 | muls64(&tl, &th, op1, op2); |
e14fe0a9 JM |
193 | /* If th != 0 && th != -1, then we had an overflow */ |
194 | if (unlikely((th + 1) > 1)) { | |
4c9649a9 JM |
195 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
196 | } | |
04acd307 AJ |
197 | return tl; |
198 | } | |
199 | ||
200 | uint64_t helper_umulh (uint64_t op1, uint64_t op2) | |
201 | { | |
202 | uint64_t tl, th; | |
203 | ||
204 | mulu64(&tl, &th, op1, op2); | |
205 | return th; | |
4c9649a9 JM |
206 | } |
207 | ||
ae8ecd42 | 208 | uint64_t helper_ctpop (uint64_t arg) |
4c9649a9 | 209 | { |
ae8ecd42 | 210 | return ctpop64(arg); |
4c9649a9 JM |
211 | } |
212 | ||
ae8ecd42 | 213 | uint64_t helper_ctlz (uint64_t arg) |
4c9649a9 | 214 | { |
ae8ecd42 | 215 | return clz64(arg); |
4c9649a9 JM |
216 | } |
217 | ||
ae8ecd42 | 218 | uint64_t helper_cttz (uint64_t arg) |
4c9649a9 | 219 | { |
ae8ecd42 | 220 | return ctz64(arg); |
4c9649a9 JM |
221 | } |
222 | ||
f071b4d3 | 223 | static always_inline uint64_t byte_zap (uint64_t op, uint8_t mskb) |
4c9649a9 JM |
224 | { |
225 | uint64_t mask; | |
226 | ||
227 | mask = 0; | |
228 | mask |= ((mskb >> 0) & 1) * 0x00000000000000FFULL; | |
229 | mask |= ((mskb >> 1) & 1) * 0x000000000000FF00ULL; | |
230 | mask |= ((mskb >> 2) & 1) * 0x0000000000FF0000ULL; | |
231 | mask |= ((mskb >> 3) & 1) * 0x00000000FF000000ULL; | |
232 | mask |= ((mskb >> 4) & 1) * 0x000000FF00000000ULL; | |
233 | mask |= ((mskb >> 5) & 1) * 0x0000FF0000000000ULL; | |
234 | mask |= ((mskb >> 6) & 1) * 0x00FF000000000000ULL; | |
235 | mask |= ((mskb >> 7) & 1) * 0xFF00000000000000ULL; | |
236 | ||
237 | return op & ~mask; | |
238 | } | |
239 | ||
b3249f63 | 240 | uint64_t helper_mskbl(uint64_t val, uint64_t mask) |
4c9649a9 | 241 | { |
b3249f63 | 242 | return byte_zap(val, 0x01 << (mask & 7)); |
4c9649a9 JM |
243 | } |
244 | ||
b3249f63 | 245 | uint64_t helper_insbl(uint64_t val, uint64_t mask) |
4c9649a9 | 246 | { |
b3249f63 AJ |
247 | val <<= (mask & 7) * 8; |
248 | return byte_zap(val, ~(0x01 << (mask & 7))); | |
4c9649a9 JM |
249 | } |
250 | ||
b3249f63 | 251 | uint64_t helper_mskwl(uint64_t val, uint64_t mask) |
4c9649a9 | 252 | { |
b3249f63 | 253 | return byte_zap(val, 0x03 << (mask & 7)); |
4c9649a9 JM |
254 | } |
255 | ||
b3249f63 | 256 | uint64_t helper_inswl(uint64_t val, uint64_t mask) |
4c9649a9 | 257 | { |
b3249f63 AJ |
258 | val <<= (mask & 7) * 8; |
259 | return byte_zap(val, ~(0x03 << (mask & 7))); | |
4c9649a9 JM |
260 | } |
261 | ||
b3249f63 | 262 | uint64_t helper_mskll(uint64_t val, uint64_t mask) |
4c9649a9 | 263 | { |
b3249f63 | 264 | return byte_zap(val, 0x0F << (mask & 7)); |
4c9649a9 JM |
265 | } |
266 | ||
b3249f63 | 267 | uint64_t helper_insll(uint64_t val, uint64_t mask) |
4c9649a9 | 268 | { |
b3249f63 AJ |
269 | val <<= (mask & 7) * 8; |
270 | return byte_zap(val, ~(0x0F << (mask & 7))); | |
4c9649a9 JM |
271 | } |
272 | ||
b3249f63 | 273 | uint64_t helper_zap(uint64_t val, uint64_t mask) |
4c9649a9 | 274 | { |
b3249f63 | 275 | return byte_zap(val, mask); |
4c9649a9 JM |
276 | } |
277 | ||
b3249f63 | 278 | uint64_t helper_zapnot(uint64_t val, uint64_t mask) |
4c9649a9 | 279 | { |
b3249f63 | 280 | return byte_zap(val, ~mask); |
4c9649a9 JM |
281 | } |
282 | ||
b3249f63 | 283 | uint64_t helper_mskql(uint64_t val, uint64_t mask) |
4c9649a9 | 284 | { |
b3249f63 | 285 | return byte_zap(val, 0xFF << (mask & 7)); |
4c9649a9 JM |
286 | } |
287 | ||
b3249f63 | 288 | uint64_t helper_insql(uint64_t val, uint64_t mask) |
4c9649a9 | 289 | { |
b3249f63 AJ |
290 | val <<= (mask & 7) * 8; |
291 | return byte_zap(val, ~(0xFF << (mask & 7))); | |
4c9649a9 JM |
292 | } |
293 | ||
b3249f63 | 294 | uint64_t helper_mskwh(uint64_t val, uint64_t mask) |
4c9649a9 | 295 | { |
b3249f63 | 296 | return byte_zap(val, (0x03 << (mask & 7)) >> 8); |
4c9649a9 JM |
297 | } |
298 | ||
b3249f63 | 299 | uint64_t helper_inswh(uint64_t val, uint64_t mask) |
4c9649a9 | 300 | { |
b3249f63 AJ |
301 | val >>= 64 - ((mask & 7) * 8); |
302 | return byte_zap(val, ~((0x03 << (mask & 7)) >> 8)); | |
4c9649a9 JM |
303 | } |
304 | ||
b3249f63 | 305 | uint64_t helper_msklh(uint64_t val, uint64_t mask) |
4c9649a9 | 306 | { |
b3249f63 | 307 | return byte_zap(val, (0x0F << (mask & 7)) >> 8); |
4c9649a9 JM |
308 | } |
309 | ||
b3249f63 | 310 | uint64_t helper_inslh(uint64_t val, uint64_t mask) |
4c9649a9 | 311 | { |
b3249f63 AJ |
312 | val >>= 64 - ((mask & 7) * 8); |
313 | return byte_zap(val, ~((0x0F << (mask & 7)) >> 8)); | |
4c9649a9 JM |
314 | } |
315 | ||
b3249f63 | 316 | uint64_t helper_mskqh(uint64_t val, uint64_t mask) |
4c9649a9 | 317 | { |
b3249f63 | 318 | return byte_zap(val, (0xFF << (mask & 7)) >> 8); |
4c9649a9 JM |
319 | } |
320 | ||
b3249f63 | 321 | uint64_t helper_insqh(uint64_t val, uint64_t mask) |
4c9649a9 | 322 | { |
b3249f63 AJ |
323 | val >>= 64 - ((mask & 7) * 8); |
324 | return byte_zap(val, ~((0xFF << (mask & 7)) >> 8)); | |
4c9649a9 JM |
325 | } |
326 | ||
04acd307 | 327 | uint64_t helper_cmpbge (uint64_t op1, uint64_t op2) |
4c9649a9 JM |
328 | { |
329 | uint8_t opa, opb, res; | |
330 | int i; | |
331 | ||
332 | res = 0; | |
333 | for (i = 0; i < 7; i++) { | |
04acd307 AJ |
334 | opa = op1 >> (i * 8); |
335 | opb = op2 >> (i * 8); | |
4c9649a9 JM |
336 | if (opa >= opb) |
337 | res |= 1 << i; | |
338 | } | |
04acd307 | 339 | return res; |
4c9649a9 JM |
340 | } |
341 | ||
f18cd223 AJ |
342 | /* Floating point helpers */ |
343 | ||
344 | /* F floating (VAX) */ | |
345 | static always_inline uint64_t float32_to_f (float32 fa) | |
4c9649a9 | 346 | { |
f18cd223 AJ |
347 | uint32_t a; |
348 | uint64_t r, exp, mant, sig; | |
349 | ||
350 | a = *(uint32_t*)(&fa); | |
351 | sig = ((uint64_t)a & 0x80000000) << 32; | |
352 | exp = (a >> 23) & 0xff; | |
353 | mant = ((uint64_t)a & 0x007fffff) << 29; | |
354 | ||
355 | if (exp == 255) { | |
356 | /* NaN or infinity */ | |
357 | r = 1; /* VAX dirty zero */ | |
358 | } else if (exp == 0) { | |
359 | if (mant == 0) { | |
360 | /* Zero */ | |
361 | r = 0; | |
362 | } else { | |
363 | /* Denormalized */ | |
364 | r = sig | ((exp + 1) << 52) | mant; | |
365 | } | |
366 | } else { | |
367 | if (exp >= 253) { | |
368 | /* Overflow */ | |
369 | r = 1; /* VAX dirty zero */ | |
370 | } else { | |
371 | r = sig | ((exp + 2) << 52); | |
372 | } | |
373 | } | |
374 | ||
375 | return r; | |
4c9649a9 JM |
376 | } |
377 | ||
f18cd223 | 378 | static always_inline float32 f_to_float32 (uint64_t a) |
4c9649a9 | 379 | { |
f18cd223 AJ |
380 | uint32_t r, exp, mant_sig; |
381 | ||
382 | exp = ((a >> 55) & 0x80) | ((a >> 52) & 0x7f); | |
383 | mant_sig = ((a >> 32) & 0x80000000) | ((a >> 29) & 0x007fffff); | |
384 | ||
385 | if (unlikely(!exp && mant_sig)) { | |
386 | /* Reserved operands / Dirty zero */ | |
387 | helper_excp(EXCP_OPCDEC, 0); | |
388 | } | |
389 | ||
390 | if (exp < 3) { | |
391 | /* Underflow */ | |
392 | r = 0; | |
393 | } else { | |
394 | r = ((exp - 2) << 23) | mant_sig; | |
395 | } | |
396 | ||
397 | return *(float32*)(&a); | |
4c9649a9 JM |
398 | } |
399 | ||
f18cd223 | 400 | uint32_t helper_f_to_memory (uint64_t a) |
4c9649a9 | 401 | { |
f18cd223 AJ |
402 | uint32_t r; |
403 | r = (a & 0x00001fffe0000000ull) >> 13; | |
404 | r |= (a & 0x07ffe00000000000ull) >> 45; | |
405 | r |= (a & 0xc000000000000000ull) >> 48; | |
406 | return r; | |
407 | } | |
4c9649a9 | 408 | |
f18cd223 AJ |
409 | uint64_t helper_memory_to_f (uint32_t a) |
410 | { | |
411 | uint64_t r; | |
412 | r = ((uint64_t)(a & 0x0000c000)) << 48; | |
413 | r |= ((uint64_t)(a & 0x003fffff)) << 45; | |
414 | r |= ((uint64_t)(a & 0xffff0000)) << 13; | |
415 | if (!(a & 0x00004000)) | |
416 | r |= 0x7ll << 59; | |
417 | return r; | |
4c9649a9 JM |
418 | } |
419 | ||
f18cd223 | 420 | uint64_t helper_addf (uint64_t a, uint64_t b) |
4c9649a9 | 421 | { |
f18cd223 | 422 | float32 fa, fb, fr; |
4c9649a9 | 423 | |
f18cd223 AJ |
424 | fa = f_to_float32(a); |
425 | fb = f_to_float32(b); | |
426 | fr = float32_add(fa, fb, &FP_STATUS); | |
427 | return float32_to_f(fr); | |
4c9649a9 JM |
428 | } |
429 | ||
f18cd223 | 430 | uint64_t helper_subf (uint64_t a, uint64_t b) |
4c9649a9 | 431 | { |
f18cd223 | 432 | float32 fa, fb, fr; |
4c9649a9 | 433 | |
f18cd223 AJ |
434 | fa = f_to_float32(a); |
435 | fb = f_to_float32(b); | |
436 | fr = float32_sub(fa, fb, &FP_STATUS); | |
437 | return float32_to_f(fr); | |
4c9649a9 JM |
438 | } |
439 | ||
f18cd223 | 440 | uint64_t helper_mulf (uint64_t a, uint64_t b) |
4c9649a9 | 441 | { |
f18cd223 | 442 | float32 fa, fb, fr; |
4c9649a9 | 443 | |
f18cd223 AJ |
444 | fa = f_to_float32(a); |
445 | fb = f_to_float32(b); | |
446 | fr = float32_mul(fa, fb, &FP_STATUS); | |
447 | return float32_to_f(fr); | |
4c9649a9 JM |
448 | } |
449 | ||
f18cd223 | 450 | uint64_t helper_divf (uint64_t a, uint64_t b) |
4c9649a9 | 451 | { |
f18cd223 | 452 | float32 fa, fb, fr; |
4c9649a9 | 453 | |
f18cd223 AJ |
454 | fa = f_to_float32(a); |
455 | fb = f_to_float32(b); | |
456 | fr = float32_div(fa, fb, &FP_STATUS); | |
457 | return float32_to_f(fr); | |
4c9649a9 JM |
458 | } |
459 | ||
f18cd223 | 460 | uint64_t helper_sqrtf (uint64_t t) |
4c9649a9 | 461 | { |
f18cd223 AJ |
462 | float32 ft, fr; |
463 | ||
464 | ft = f_to_float32(t); | |
465 | fr = float32_sqrt(ft, &FP_STATUS); | |
466 | return float32_to_f(fr); | |
4c9649a9 JM |
467 | } |
468 | ||
f18cd223 AJ |
469 | |
470 | /* G floating (VAX) */ | |
471 | static always_inline uint64_t float64_to_g (float64 fa) | |
4c9649a9 | 472 | { |
f18cd223 | 473 | uint64_t a, r, exp, mant, sig; |
4c9649a9 | 474 | |
f18cd223 AJ |
475 | a = *(uint64_t*)(&fa); |
476 | sig = a & 0x8000000000000000ull; | |
477 | exp = (a >> 52) & 0x7ff; | |
478 | mant = a & 0x000fffffffffffffull; | |
479 | ||
480 | if (exp == 2047) { | |
481 | /* NaN or infinity */ | |
482 | r = 1; /* VAX dirty zero */ | |
483 | } else if (exp == 0) { | |
484 | if (mant == 0) { | |
485 | /* Zero */ | |
486 | r = 0; | |
487 | } else { | |
488 | /* Denormalized */ | |
489 | r = sig | ((exp + 1) << 52) | mant; | |
490 | } | |
491 | } else { | |
492 | if (exp >= 2045) { | |
493 | /* Overflow */ | |
494 | r = 1; /* VAX dirty zero */ | |
495 | } else { | |
496 | r = sig | ((exp + 2) << 52); | |
497 | } | |
498 | } | |
499 | ||
500 | return r; | |
4c9649a9 JM |
501 | } |
502 | ||
f18cd223 | 503 | static always_inline float64 g_to_float64 (uint64_t a) |
4c9649a9 | 504 | { |
f18cd223 AJ |
505 | uint64_t r, exp, mant_sig; |
506 | ||
507 | exp = (a >> 52) & 0x7ff; | |
508 | mant_sig = a & 0x800fffffffffffffull; | |
509 | ||
510 | if (!exp && mant_sig) { | |
511 | /* Reserved operands / Dirty zero */ | |
512 | helper_excp(EXCP_OPCDEC, 0); | |
513 | } | |
4c9649a9 | 514 | |
f18cd223 AJ |
515 | if (exp < 3) { |
516 | /* Underflow */ | |
517 | r = 0; | |
518 | } else { | |
519 | r = ((exp - 2) << 52) | mant_sig; | |
520 | } | |
521 | ||
522 | return *(float64*)(&a); | |
4c9649a9 JM |
523 | } |
524 | ||
f18cd223 | 525 | uint64_t helper_g_to_memory (uint64_t a) |
4c9649a9 | 526 | { |
f18cd223 AJ |
527 | uint64_t r; |
528 | r = (a & 0x000000000000ffffull) << 48; | |
529 | r |= (a & 0x00000000ffff0000ull) << 16; | |
530 | r |= (a & 0x0000ffff00000000ull) >> 16; | |
531 | r |= (a & 0xffff000000000000ull) >> 48; | |
532 | return r; | |
533 | } | |
4c9649a9 | 534 | |
f18cd223 AJ |
535 | uint64_t helper_memory_to_g (uint64_t a) |
536 | { | |
537 | uint64_t r; | |
538 | r = (a & 0x000000000000ffffull) << 48; | |
539 | r |= (a & 0x00000000ffff0000ull) << 16; | |
540 | r |= (a & 0x0000ffff00000000ull) >> 16; | |
541 | r |= (a & 0xffff000000000000ull) >> 48; | |
542 | return r; | |
4c9649a9 JM |
543 | } |
544 | ||
f18cd223 | 545 | uint64_t helper_addg (uint64_t a, uint64_t b) |
4c9649a9 | 546 | { |
f18cd223 | 547 | float64 fa, fb, fr; |
4c9649a9 | 548 | |
f18cd223 AJ |
549 | fa = g_to_float64(a); |
550 | fb = g_to_float64(b); | |
551 | fr = float64_add(fa, fb, &FP_STATUS); | |
552 | return float64_to_g(fr); | |
4c9649a9 JM |
553 | } |
554 | ||
f18cd223 | 555 | uint64_t helper_subg (uint64_t a, uint64_t b) |
4c9649a9 | 556 | { |
f18cd223 | 557 | float64 fa, fb, fr; |
4c9649a9 | 558 | |
f18cd223 AJ |
559 | fa = g_to_float64(a); |
560 | fb = g_to_float64(b); | |
561 | fr = float64_sub(fa, fb, &FP_STATUS); | |
562 | return float64_to_g(fr); | |
4c9649a9 JM |
563 | } |
564 | ||
f18cd223 | 565 | uint64_t helper_mulg (uint64_t a, uint64_t b) |
4c9649a9 | 566 | { |
f18cd223 | 567 | float64 fa, fb, fr; |
4c9649a9 | 568 | |
f18cd223 AJ |
569 | fa = g_to_float64(a); |
570 | fb = g_to_float64(b); | |
571 | fr = float64_mul(fa, fb, &FP_STATUS); | |
572 | return float64_to_g(fr); | |
4c9649a9 JM |
573 | } |
574 | ||
f18cd223 | 575 | uint64_t helper_divg (uint64_t a, uint64_t b) |
4c9649a9 | 576 | { |
f18cd223 | 577 | float64 fa, fb, fr; |
4c9649a9 | 578 | |
f18cd223 AJ |
579 | fa = g_to_float64(a); |
580 | fb = g_to_float64(b); | |
581 | fr = float64_div(fa, fb, &FP_STATUS); | |
582 | return float64_to_g(fr); | |
583 | } | |
584 | ||
585 | uint64_t helper_sqrtg (uint64_t a) | |
586 | { | |
587 | float64 fa, fr; | |
4c9649a9 | 588 | |
f18cd223 AJ |
589 | fa = g_to_float64(a); |
590 | fr = float64_sqrt(fa, &FP_STATUS); | |
591 | return float64_to_g(fr); | |
4c9649a9 JM |
592 | } |
593 | ||
f18cd223 AJ |
594 | |
595 | /* S floating (single) */ | |
596 | static always_inline uint64_t float32_to_s (float32 fa) | |
4c9649a9 | 597 | { |
f18cd223 AJ |
598 | uint32_t a; |
599 | uint64_t r; | |
4c9649a9 | 600 | |
f18cd223 | 601 | a = *(uint32_t*)(&fa); |
4c9649a9 | 602 | |
f18cd223 AJ |
603 | r = (((uint64_t)(a & 0xc0000000)) << 32) | (((uint64_t)(a & 0x3fffffff)) << 29); |
604 | if (((a & 0x7f800000) != 0x7f800000) && (!(a & 0x40000000))) | |
605 | r |= 0x7ll << 59; | |
606 | return r; | |
4c9649a9 JM |
607 | } |
608 | ||
f18cd223 | 609 | static always_inline float32 s_to_float32 (uint64_t a) |
4c9649a9 | 610 | { |
f18cd223 AJ |
611 | uint32_t r = ((a >> 32) & 0xc0000000) | ((a >> 29) & 0x3fffffff); |
612 | return *(float32*)(&r); | |
613 | } | |
4c9649a9 | 614 | |
f18cd223 AJ |
615 | uint32_t helper_s_to_memory (uint64_t a) |
616 | { | |
617 | /* Memory format is the same as float32 */ | |
618 | float32 fa = s_to_float32(a); | |
619 | return *(uint32_t*)(&fa); | |
620 | } | |
4c9649a9 | 621 | |
f18cd223 AJ |
622 | uint64_t helper_memory_to_s (uint32_t a) |
623 | { | |
624 | /* Memory format is the same as float32 */ | |
625 | return float32_to_s(*(float32*)(&a)); | |
4c9649a9 JM |
626 | } |
627 | ||
f18cd223 | 628 | uint64_t helper_adds (uint64_t a, uint64_t b) |
4c9649a9 | 629 | { |
f18cd223 | 630 | float32 fa, fb, fr; |
4c9649a9 | 631 | |
f18cd223 AJ |
632 | fa = s_to_float32(a); |
633 | fb = s_to_float32(b); | |
634 | fr = float32_add(fa, fb, &FP_STATUS); | |
635 | return float32_to_s(fr); | |
4c9649a9 JM |
636 | } |
637 | ||
f18cd223 | 638 | uint64_t helper_subs (uint64_t a, uint64_t b) |
4c9649a9 | 639 | { |
f18cd223 | 640 | float32 fa, fb, fr; |
4c9649a9 | 641 | |
f18cd223 AJ |
642 | fa = s_to_float32(a); |
643 | fb = s_to_float32(b); | |
644 | fr = float32_sub(fa, fb, &FP_STATUS); | |
645 | return float32_to_s(fr); | |
4c9649a9 JM |
646 | } |
647 | ||
f18cd223 | 648 | uint64_t helper_muls (uint64_t a, uint64_t b) |
4c9649a9 | 649 | { |
f18cd223 | 650 | float32 fa, fb, fr; |
4c9649a9 | 651 | |
f18cd223 AJ |
652 | fa = s_to_float32(a); |
653 | fb = s_to_float32(b); | |
654 | fr = float32_mul(fa, fb, &FP_STATUS); | |
655 | return float32_to_s(fr); | |
4c9649a9 JM |
656 | } |
657 | ||
f18cd223 | 658 | uint64_t helper_divs (uint64_t a, uint64_t b) |
4c9649a9 | 659 | { |
f18cd223 | 660 | float32 fa, fb, fr; |
4c9649a9 | 661 | |
f18cd223 AJ |
662 | fa = s_to_float32(a); |
663 | fb = s_to_float32(b); | |
664 | fr = float32_div(fa, fb, &FP_STATUS); | |
665 | return float32_to_s(fr); | |
4c9649a9 JM |
666 | } |
667 | ||
f18cd223 | 668 | uint64_t helper_sqrts (uint64_t a) |
4c9649a9 | 669 | { |
f18cd223 | 670 | float32 fa, fr; |
4c9649a9 | 671 | |
f18cd223 AJ |
672 | fa = s_to_float32(a); |
673 | fr = float32_sqrt(fa, &FP_STATUS); | |
674 | return float32_to_s(fr); | |
4c9649a9 JM |
675 | } |
676 | ||
f18cd223 AJ |
677 | |
678 | /* T floating (double) */ | |
679 | static always_inline float64 t_to_float64 (uint64_t a) | |
4c9649a9 | 680 | { |
f18cd223 AJ |
681 | /* Memory format is the same as float64 */ |
682 | return *(float64*)(&a); | |
4c9649a9 JM |
683 | } |
684 | ||
f18cd223 | 685 | static always_inline uint64_t float64_to_t (float64 fa) |
4c9649a9 | 686 | { |
f18cd223 AJ |
687 | /* Memory format is the same as float64 */ |
688 | return *(uint64*)(&fa); | |
689 | } | |
4c9649a9 | 690 | |
f18cd223 AJ |
691 | uint64_t helper_addt (uint64_t a, uint64_t b) |
692 | { | |
693 | float64 fa, fb, fr; | |
4c9649a9 | 694 | |
f18cd223 AJ |
695 | fa = t_to_float64(a); |
696 | fb = t_to_float64(b); | |
697 | fr = float64_add(fa, fb, &FP_STATUS); | |
698 | return float64_to_t(fr); | |
4c9649a9 JM |
699 | } |
700 | ||
f18cd223 | 701 | uint64_t helper_subt (uint64_t a, uint64_t b) |
4c9649a9 | 702 | { |
f18cd223 | 703 | float64 fa, fb, fr; |
4c9649a9 | 704 | |
f18cd223 AJ |
705 | fa = t_to_float64(a); |
706 | fb = t_to_float64(b); | |
707 | fr = float64_sub(fa, fb, &FP_STATUS); | |
708 | return float64_to_t(fr); | |
4c9649a9 JM |
709 | } |
710 | ||
f18cd223 | 711 | uint64_t helper_mult (uint64_t a, uint64_t b) |
4c9649a9 | 712 | { |
f18cd223 | 713 | float64 fa, fb, fr; |
4c9649a9 | 714 | |
f18cd223 AJ |
715 | fa = t_to_float64(a); |
716 | fb = t_to_float64(b); | |
717 | fr = float64_mul(fa, fb, &FP_STATUS); | |
718 | return float64_to_t(fr); | |
4c9649a9 JM |
719 | } |
720 | ||
f18cd223 | 721 | uint64_t helper_divt (uint64_t a, uint64_t b) |
4c9649a9 | 722 | { |
f18cd223 | 723 | float64 fa, fb, fr; |
4c9649a9 | 724 | |
f18cd223 AJ |
725 | fa = t_to_float64(a); |
726 | fb = t_to_float64(b); | |
727 | fr = float64_div(fa, fb, &FP_STATUS); | |
728 | return float64_to_t(fr); | |
4c9649a9 JM |
729 | } |
730 | ||
f18cd223 | 731 | uint64_t helper_sqrtt (uint64_t a) |
4c9649a9 | 732 | { |
f18cd223 | 733 | float64 fa, fr; |
4c9649a9 | 734 | |
f18cd223 AJ |
735 | fa = t_to_float64(a); |
736 | fr = float64_sqrt(fa, &FP_STATUS); | |
737 | return float64_to_t(fr); | |
4c9649a9 JM |
738 | } |
739 | ||
4c9649a9 | 740 | |
f18cd223 AJ |
741 | /* Sign copy */ |
742 | uint64_t helper_cpys(uint64_t a, uint64_t b) | |
743 | { | |
744 | return (a & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL); | |
4c9649a9 JM |
745 | } |
746 | ||
f18cd223 | 747 | uint64_t helper_cpysn(uint64_t a, uint64_t b) |
4c9649a9 | 748 | { |
f18cd223 AJ |
749 | return ((~a) & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL); |
750 | } | |
4c9649a9 | 751 | |
f18cd223 AJ |
752 | uint64_t helper_cpyse(uint64_t a, uint64_t b) |
753 | { | |
754 | return (a & 0xFFF0000000000000ULL) | (b & ~0xFFF0000000000000ULL); | |
4c9649a9 JM |
755 | } |
756 | ||
f18cd223 AJ |
757 | |
758 | /* Comparisons */ | |
759 | uint64_t helper_cmptun (uint64_t a, uint64_t b) | |
4c9649a9 | 760 | { |
f18cd223 | 761 | float64 fa, fb; |
4c9649a9 | 762 | |
f18cd223 AJ |
763 | fa = t_to_float64(a); |
764 | fb = t_to_float64(b); | |
765 | ||
766 | if (float64_is_nan(fa) || float64_is_nan(fb)) | |
767 | return 0x4000000000000000ULL; | |
768 | else | |
769 | return 0; | |
4c9649a9 JM |
770 | } |
771 | ||
f18cd223 | 772 | uint64_t helper_cmpteq(uint64_t a, uint64_t b) |
4c9649a9 | 773 | { |
f18cd223 | 774 | float64 fa, fb; |
4c9649a9 | 775 | |
f18cd223 AJ |
776 | fa = t_to_float64(a); |
777 | fb = t_to_float64(b); | |
778 | ||
779 | if (float64_eq(fa, fb, &FP_STATUS)) | |
780 | return 0x4000000000000000ULL; | |
781 | else | |
782 | return 0; | |
4c9649a9 JM |
783 | } |
784 | ||
f18cd223 | 785 | uint64_t helper_cmptle(uint64_t a, uint64_t b) |
4c9649a9 | 786 | { |
f18cd223 | 787 | float64 fa, fb; |
4c9649a9 | 788 | |
f18cd223 AJ |
789 | fa = t_to_float64(a); |
790 | fb = t_to_float64(b); | |
791 | ||
792 | if (float64_le(fa, fb, &FP_STATUS)) | |
793 | return 0x4000000000000000ULL; | |
794 | else | |
795 | return 0; | |
4c9649a9 JM |
796 | } |
797 | ||
f18cd223 | 798 | uint64_t helper_cmptlt(uint64_t a, uint64_t b) |
4c9649a9 | 799 | { |
f18cd223 | 800 | float64 fa, fb; |
4c9649a9 | 801 | |
f18cd223 AJ |
802 | fa = t_to_float64(a); |
803 | fb = t_to_float64(b); | |
804 | ||
805 | if (float64_lt(fa, fb, &FP_STATUS)) | |
806 | return 0x4000000000000000ULL; | |
807 | else | |
808 | return 0; | |
4c9649a9 JM |
809 | } |
810 | ||
f18cd223 | 811 | uint64_t helper_cmpgeq(uint64_t a, uint64_t b) |
4c9649a9 | 812 | { |
f18cd223 | 813 | float64 fa, fb; |
4c9649a9 | 814 | |
f18cd223 AJ |
815 | fa = g_to_float64(a); |
816 | fb = g_to_float64(b); | |
817 | ||
818 | if (float64_eq(fa, fb, &FP_STATUS)) | |
819 | return 0x4000000000000000ULL; | |
820 | else | |
821 | return 0; | |
4c9649a9 JM |
822 | } |
823 | ||
f18cd223 | 824 | uint64_t helper_cmpgle(uint64_t a, uint64_t b) |
4c9649a9 | 825 | { |
f18cd223 AJ |
826 | float64 fa, fb; |
827 | ||
828 | fa = g_to_float64(a); | |
829 | fb = g_to_float64(b); | |
4c9649a9 | 830 | |
f18cd223 AJ |
831 | if (float64_le(fa, fb, &FP_STATUS)) |
832 | return 0x4000000000000000ULL; | |
833 | else | |
834 | return 0; | |
4c9649a9 JM |
835 | } |
836 | ||
f18cd223 | 837 | uint64_t helper_cmpglt(uint64_t a, uint64_t b) |
4c9649a9 | 838 | { |
f18cd223 AJ |
839 | float64 fa, fb; |
840 | ||
841 | fa = g_to_float64(a); | |
842 | fb = g_to_float64(b); | |
4c9649a9 | 843 | |
f18cd223 AJ |
844 | if (float64_lt(fa, fb, &FP_STATUS)) |
845 | return 0x4000000000000000ULL; | |
846 | else | |
847 | return 0; | |
4c9649a9 JM |
848 | } |
849 | ||
f18cd223 | 850 | uint64_t helper_cmpfeq (uint64_t a) |
4c9649a9 | 851 | { |
f18cd223 | 852 | return !(a & 0x7FFFFFFFFFFFFFFFULL); |
4c9649a9 JM |
853 | } |
854 | ||
f18cd223 | 855 | uint64_t helper_cmpfne (uint64_t a) |
4c9649a9 | 856 | { |
f18cd223 AJ |
857 | return (a & 0x7FFFFFFFFFFFFFFFULL); |
858 | } | |
4c9649a9 | 859 | |
f18cd223 AJ |
860 | uint64_t helper_cmpflt (uint64_t a) |
861 | { | |
862 | return (a & 0x8000000000000000ULL) && (a & 0x7FFFFFFFFFFFFFFFULL); | |
4c9649a9 JM |
863 | } |
864 | ||
f18cd223 | 865 | uint64_t helper_cmpfle (uint64_t a) |
4c9649a9 | 866 | { |
f18cd223 | 867 | return (a & 0x8000000000000000ULL) || !(a & 0x7FFFFFFFFFFFFFFFULL); |
4c9649a9 JM |
868 | } |
869 | ||
f18cd223 | 870 | uint64_t helper_cmpfgt (uint64_t a) |
4c9649a9 | 871 | { |
f18cd223 AJ |
872 | return !(a & 0x8000000000000000ULL) && (a & 0x7FFFFFFFFFFFFFFFULL); |
873 | } | |
4c9649a9 | 874 | |
f18cd223 AJ |
875 | uint64_t helper_cmpfge (uint64_t a) |
876 | { | |
877 | return !(a & 0x8000000000000000ULL) || !(a & 0x7FFFFFFFFFFFFFFFULL); | |
4c9649a9 JM |
878 | } |
879 | ||
f18cd223 AJ |
880 | |
881 | /* Floating point format conversion */ | |
882 | uint64_t helper_cvtts (uint64_t a) | |
4c9649a9 | 883 | { |
f18cd223 AJ |
884 | float64 fa; |
885 | float32 fr; | |
4c9649a9 | 886 | |
f18cd223 AJ |
887 | fa = t_to_float64(a); |
888 | fr = float64_to_float32(fa, &FP_STATUS); | |
889 | return float32_to_s(fr); | |
4c9649a9 JM |
890 | } |
891 | ||
f18cd223 | 892 | uint64_t helper_cvtst (uint64_t a) |
4c9649a9 | 893 | { |
f18cd223 AJ |
894 | float32 fa; |
895 | float64 fr; | |
896 | ||
897 | fa = s_to_float32(a); | |
898 | fr = float32_to_float64(fa, &FP_STATUS); | |
899 | return float64_to_t(fr); | |
4c9649a9 JM |
900 | } |
901 | ||
f18cd223 | 902 | uint64_t helper_cvtqs (uint64_t a) |
4c9649a9 | 903 | { |
f18cd223 AJ |
904 | float32 fr = int64_to_float32(a, &FP_STATUS); |
905 | return float32_to_s(fr); | |
4c9649a9 JM |
906 | } |
907 | ||
f18cd223 | 908 | uint64_t helper_cvttq (uint64_t a) |
4c9649a9 | 909 | { |
f18cd223 AJ |
910 | float64 fa = t_to_float64(a); |
911 | return float64_to_int64_round_to_zero(fa, &FP_STATUS); | |
912 | } | |
4c9649a9 | 913 | |
f18cd223 AJ |
914 | uint64_t helper_cvtqt (uint64_t a) |
915 | { | |
916 | float64 fr = int64_to_float64(a, &FP_STATUS); | |
917 | return float64_to_t(fr); | |
4c9649a9 JM |
918 | } |
919 | ||
f18cd223 | 920 | uint64_t helper_cvtqf (uint64_t a) |
4c9649a9 | 921 | { |
f18cd223 AJ |
922 | float32 fr = int64_to_float32(a, &FP_STATUS); |
923 | return float32_to_f(fr); | |
4c9649a9 JM |
924 | } |
925 | ||
f18cd223 | 926 | uint64_t helper_cvtgf (uint64_t a) |
4c9649a9 | 927 | { |
f18cd223 AJ |
928 | float64 fa; |
929 | float32 fr; | |
930 | ||
931 | fa = g_to_float64(a); | |
932 | fr = float64_to_float32(fa, &FP_STATUS); | |
933 | return float32_to_f(fr); | |
4c9649a9 JM |
934 | } |
935 | ||
f18cd223 | 936 | uint64_t helper_cvtgq (uint64_t a) |
4c9649a9 | 937 | { |
f18cd223 AJ |
938 | float64 fa = g_to_float64(a); |
939 | return float64_to_int64_round_to_zero(fa, &FP_STATUS); | |
4c9649a9 JM |
940 | } |
941 | ||
f18cd223 | 942 | uint64_t helper_cvtqg (uint64_t a) |
4c9649a9 | 943 | { |
f18cd223 AJ |
944 | float64 fr; |
945 | fr = int64_to_float64(a, &FP_STATUS); | |
946 | return float64_to_g(fr); | |
4c9649a9 JM |
947 | } |
948 | ||
f18cd223 | 949 | uint64_t helper_cvtlq (uint64_t a) |
4c9649a9 | 950 | { |
f18cd223 | 951 | return (int64_t)((int32_t)((a >> 32) | ((a >> 29) & 0x3FFFFFFF))); |
4c9649a9 JM |
952 | } |
953 | ||
f18cd223 | 954 | static always_inline uint64_t __helper_cvtql (uint64_t a, int s, int v) |
4c9649a9 | 955 | { |
f18cd223 AJ |
956 | uint64_t r; |
957 | ||
958 | r = ((uint64_t)(a & 0xC0000000)) << 32; | |
959 | r |= ((uint64_t)(a & 0x7FFFFFFF)) << 29; | |
960 | ||
961 | if (v && (int64_t)((int32_t)r) != (int64_t)r) { | |
962 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); | |
963 | } | |
964 | if (s) { | |
965 | /* TODO */ | |
966 | } | |
967 | return r; | |
4c9649a9 JM |
968 | } |
969 | ||
f18cd223 | 970 | uint64_t helper_cvtql (uint64_t a) |
4c9649a9 | 971 | { |
f18cd223 | 972 | return __helper_cvtql(a, 0, 0); |
4c9649a9 JM |
973 | } |
974 | ||
f18cd223 | 975 | uint64_t helper_cvtqlv (uint64_t a) |
4c9649a9 | 976 | { |
f18cd223 | 977 | return __helper_cvtql(a, 0, 1); |
4c9649a9 JM |
978 | } |
979 | ||
f18cd223 | 980 | uint64_t helper_cvtqlsv (uint64_t a) |
4c9649a9 | 981 | { |
f18cd223 | 982 | return __helper_cvtql(a, 1, 1); |
4c9649a9 JM |
983 | } |
984 | ||
8bb6e981 | 985 | /* PALcode support special instructions */ |
4c9649a9 | 986 | #if !defined (CONFIG_USER_ONLY) |
8bb6e981 AJ |
987 | void helper_hw_rei (void) |
988 | { | |
989 | env->pc = env->ipr[IPR_EXC_ADDR] & ~3; | |
990 | env->ipr[IPR_EXC_ADDR] = env->ipr[IPR_EXC_ADDR] & 1; | |
991 | /* XXX: re-enable interrupts and memory mapping */ | |
992 | } | |
993 | ||
994 | void helper_hw_ret (uint64_t a) | |
995 | { | |
996 | env->pc = a & ~3; | |
997 | env->ipr[IPR_EXC_ADDR] = a & 1; | |
998 | /* XXX: re-enable interrupts and memory mapping */ | |
999 | } | |
1000 | ||
1001 | uint64_t helper_mfpr (int iprn, uint64_t val) | |
1002 | { | |
1003 | uint64_t tmp; | |
1004 | ||
1005 | if (cpu_alpha_mfpr(env, iprn, &tmp) == 0) | |
1006 | val = tmp; | |
1007 | ||
1008 | return val; | |
1009 | } | |
1010 | ||
1011 | void helper_mtpr (int iprn, uint64_t val) | |
4c9649a9 | 1012 | { |
8bb6e981 AJ |
1013 | cpu_alpha_mtpr(env, iprn, val, NULL); |
1014 | } | |
4c9649a9 | 1015 | |
8bb6e981 AJ |
1016 | void helper_set_alt_mode (void) |
1017 | { | |
1018 | env->saved_mode = env->ps & 0xC; | |
1019 | env->ps = (env->ps & ~0xC) | (env->ipr[IPR_ALT_MODE] & 0xC); | |
4c9649a9 JM |
1020 | } |
1021 | ||
8bb6e981 | 1022 | void helper_restore_mode (void) |
4c9649a9 | 1023 | { |
8bb6e981 | 1024 | env->ps = (env->ps & ~0xC) | env->saved_mode; |
4c9649a9 | 1025 | } |
8bb6e981 | 1026 | |
4c9649a9 JM |
1027 | #endif |
1028 | ||
1029 | /*****************************************************************************/ | |
1030 | /* Softmmu support */ | |
1031 | #if !defined (CONFIG_USER_ONLY) | |
1032 | ||
4c9649a9 JM |
1033 | /* XXX: the two following helpers are pure hacks. |
1034 | * Hopefully, we emulate the PALcode, then we should never see | |
1035 | * HW_LD / HW_ST instructions. | |
1036 | */ | |
8bb6e981 | 1037 | uint64_t helper_ld_virt_to_phys (uint64_t virtaddr) |
4c9649a9 JM |
1038 | { |
1039 | uint64_t tlb_addr, physaddr; | |
6ebbf390 | 1040 | int index, mmu_idx; |
4c9649a9 JM |
1041 | void *retaddr; |
1042 | ||
6ebbf390 | 1043 | mmu_idx = cpu_mmu_index(env); |
8bb6e981 | 1044 | index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
4c9649a9 | 1045 | redo: |
6ebbf390 | 1046 | tlb_addr = env->tlb_table[mmu_idx][index].addr_read; |
8bb6e981 | 1047 | if ((virtaddr & TARGET_PAGE_MASK) == |
4c9649a9 | 1048 | (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
8bb6e981 | 1049 | physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend; |
4c9649a9 JM |
1050 | } else { |
1051 | /* the page is not in the TLB : fill it */ | |
1052 | retaddr = GETPC(); | |
8bb6e981 | 1053 | tlb_fill(virtaddr, 0, mmu_idx, retaddr); |
4c9649a9 JM |
1054 | goto redo; |
1055 | } | |
8bb6e981 | 1056 | return physaddr; |
4c9649a9 JM |
1057 | } |
1058 | ||
8bb6e981 | 1059 | uint64_t helper_st_virt_to_phys (uint64_t virtaddr) |
4c9649a9 JM |
1060 | { |
1061 | uint64_t tlb_addr, physaddr; | |
6ebbf390 | 1062 | int index, mmu_idx; |
4c9649a9 JM |
1063 | void *retaddr; |
1064 | ||
6ebbf390 | 1065 | mmu_idx = cpu_mmu_index(env); |
8bb6e981 | 1066 | index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
4c9649a9 | 1067 | redo: |
6ebbf390 | 1068 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
8bb6e981 | 1069 | if ((virtaddr & TARGET_PAGE_MASK) == |
4c9649a9 | 1070 | (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
8bb6e981 | 1071 | physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend; |
4c9649a9 JM |
1072 | } else { |
1073 | /* the page is not in the TLB : fill it */ | |
1074 | retaddr = GETPC(); | |
8bb6e981 | 1075 | tlb_fill(virtaddr, 1, mmu_idx, retaddr); |
4c9649a9 JM |
1076 | goto redo; |
1077 | } | |
8bb6e981 AJ |
1078 | return physaddr; |
1079 | } | |
1080 | ||
1081 | void helper_ldl_raw(uint64_t t0, uint64_t t1) | |
1082 | { | |
1083 | ldl_raw(t1, t0); | |
1084 | } | |
1085 | ||
1086 | void helper_ldq_raw(uint64_t t0, uint64_t t1) | |
1087 | { | |
1088 | ldq_raw(t1, t0); | |
1089 | } | |
1090 | ||
1091 | void helper_ldl_l_raw(uint64_t t0, uint64_t t1) | |
1092 | { | |
1093 | env->lock = t1; | |
1094 | ldl_raw(t1, t0); | |
1095 | } | |
1096 | ||
1097 | void helper_ldq_l_raw(uint64_t t0, uint64_t t1) | |
1098 | { | |
1099 | env->lock = t1; | |
1100 | ldl_raw(t1, t0); | |
1101 | } | |
1102 | ||
1103 | void helper_ldl_kernel(uint64_t t0, uint64_t t1) | |
1104 | { | |
1105 | ldl_kernel(t1, t0); | |
1106 | } | |
1107 | ||
1108 | void helper_ldq_kernel(uint64_t t0, uint64_t t1) | |
1109 | { | |
1110 | ldq_kernel(t1, t0); | |
1111 | } | |
1112 | ||
1113 | void helper_ldl_data(uint64_t t0, uint64_t t1) | |
1114 | { | |
1115 | ldl_data(t1, t0); | |
1116 | } | |
1117 | ||
1118 | void helper_ldq_data(uint64_t t0, uint64_t t1) | |
1119 | { | |
1120 | ldq_data(t1, t0); | |
1121 | } | |
1122 | ||
1123 | void helper_stl_raw(uint64_t t0, uint64_t t1) | |
1124 | { | |
1125 | stl_raw(t1, t0); | |
1126 | } | |
1127 | ||
1128 | void helper_stq_raw(uint64_t t0, uint64_t t1) | |
1129 | { | |
1130 | stq_raw(t1, t0); | |
1131 | } | |
1132 | ||
1133 | uint64_t helper_stl_c_raw(uint64_t t0, uint64_t t1) | |
1134 | { | |
1135 | uint64_t ret; | |
1136 | ||
1137 | if (t1 == env->lock) { | |
1138 | stl_raw(t1, t0); | |
1139 | ret = 0; | |
1140 | } else | |
1141 | ret = 1; | |
1142 | ||
1143 | env->lock = 1; | |
1144 | ||
1145 | return ret; | |
1146 | } | |
1147 | ||
1148 | uint64_t helper_stq_c_raw(uint64_t t0, uint64_t t1) | |
1149 | { | |
1150 | uint64_t ret; | |
1151 | ||
1152 | if (t1 == env->lock) { | |
1153 | stq_raw(t1, t0); | |
1154 | ret = 0; | |
1155 | } else | |
1156 | ret = 1; | |
1157 | ||
1158 | env->lock = 1; | |
1159 | ||
1160 | return ret; | |
4c9649a9 JM |
1161 | } |
1162 | ||
1163 | #define MMUSUFFIX _mmu | |
1164 | ||
1165 | #define SHIFT 0 | |
1166 | #include "softmmu_template.h" | |
1167 | ||
1168 | #define SHIFT 1 | |
1169 | #include "softmmu_template.h" | |
1170 | ||
1171 | #define SHIFT 2 | |
1172 | #include "softmmu_template.h" | |
1173 | ||
1174 | #define SHIFT 3 | |
1175 | #include "softmmu_template.h" | |
1176 | ||
1177 | /* try to fill the TLB and return an exception if error. If retaddr is | |
1178 | NULL, it means that the function was called in C code (i.e. not | |
1179 | from generated code or from helper.c) */ | |
1180 | /* XXX: fix it to restore all registers */ | |
6ebbf390 | 1181 | void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
4c9649a9 JM |
1182 | { |
1183 | TranslationBlock *tb; | |
1184 | CPUState *saved_env; | |
44f8625d | 1185 | unsigned long pc; |
4c9649a9 JM |
1186 | int ret; |
1187 | ||
1188 | /* XXX: hack to restore env in all cases, even if not called from | |
1189 | generated code */ | |
1190 | saved_env = env; | |
1191 | env = cpu_single_env; | |
6ebbf390 | 1192 | ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); |
4c9649a9 JM |
1193 | if (!likely(ret == 0)) { |
1194 | if (likely(retaddr)) { | |
1195 | /* now we have a real cpu fault */ | |
44f8625d | 1196 | pc = (unsigned long)retaddr; |
4c9649a9 JM |
1197 | tb = tb_find_pc(pc); |
1198 | if (likely(tb)) { | |
1199 | /* the PC is inside the translated code. It means that we have | |
1200 | a virtual CPU fault */ | |
1201 | cpu_restore_state(tb, env, pc, NULL); | |
1202 | } | |
1203 | } | |
1204 | /* Exception index and error code are already set */ | |
1205 | cpu_loop_exit(); | |
1206 | } | |
1207 | env = saved_env; | |
1208 | } | |
1209 | ||
1210 | #endif |