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d3e35a1f AG |
1 | /* |
2 | * AArch64 specific helpers | |
3 | * | |
4 | * Copyright (c) 2013 Alexander Graf <agraf@suse.de> | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "cpu.h" | |
21 | #include "exec/gdbstub.h" | |
22 | #include "helper.h" | |
23 | #include "qemu/host-utils.h" | |
24 | #include "sysemu/sysemu.h" | |
25 | #include "qemu/bitops.h" | |
8220e911 AG |
26 | |
27 | /* C2.4.7 Multiply and divide */ | |
28 | /* special cases for 0 and LLONG_MIN are mandated by the standard */ | |
29 | uint64_t HELPER(udiv64)(uint64_t num, uint64_t den) | |
30 | { | |
31 | if (den == 0) { | |
32 | return 0; | |
33 | } | |
34 | return num / den; | |
35 | } | |
36 | ||
37 | int64_t HELPER(sdiv64)(int64_t num, int64_t den) | |
38 | { | |
39 | if (den == 0) { | |
40 | return 0; | |
41 | } | |
42 | if (num == LLONG_MIN && den == -1) { | |
43 | return LLONG_MIN; | |
44 | } | |
45 | return num / den; | |
46 | } | |
680ead21 CF |
47 | |
48 | uint64_t HELPER(clz64)(uint64_t x) | |
49 | { | |
50 | return clz64(x); | |
51 | } | |
82e14b02 | 52 | |
e80c5020 CF |
53 | uint64_t HELPER(cls64)(uint64_t x) |
54 | { | |
55 | return clrsb64(x); | |
56 | } | |
57 | ||
58 | uint32_t HELPER(cls32)(uint32_t x) | |
59 | { | |
60 | return clrsb32(x); | |
61 | } | |
62 | ||
82e14b02 AG |
63 | uint64_t HELPER(rbit64)(uint64_t x) |
64 | { | |
65 | /* assign the correct byte position */ | |
66 | x = bswap64(x); | |
67 | ||
68 | /* assign the correct nibble position */ | |
69 | x = ((x & 0xf0f0f0f0f0f0f0f0ULL) >> 4) | |
70 | | ((x & 0x0f0f0f0f0f0f0f0fULL) << 4); | |
71 | ||
72 | /* assign the correct bit position */ | |
73 | x = ((x & 0x8888888888888888ULL) >> 3) | |
74 | | ((x & 0x4444444444444444ULL) >> 1) | |
75 | | ((x & 0x2222222222222222ULL) << 1) | |
76 | | ((x & 0x1111111111111111ULL) << 3); | |
77 | ||
78 | return x; | |
79 | } | |
da7dafe7 CF |
80 | |
81 | /* Convert a softfloat float_relation_ (as returned by | |
82 | * the float*_compare functions) to the correct ARM | |
83 | * NZCV flag state. | |
84 | */ | |
85 | static inline uint32_t float_rel_to_flags(int res) | |
86 | { | |
87 | uint64_t flags; | |
88 | switch (res) { | |
89 | case float_relation_equal: | |
90 | flags = PSTATE_Z | PSTATE_C; | |
91 | break; | |
92 | case float_relation_less: | |
93 | flags = PSTATE_N; | |
94 | break; | |
95 | case float_relation_greater: | |
96 | flags = PSTATE_C; | |
97 | break; | |
98 | case float_relation_unordered: | |
99 | default: | |
100 | flags = PSTATE_C | PSTATE_V; | |
101 | break; | |
102 | } | |
103 | return flags; | |
104 | } | |
105 | ||
106 | uint64_t HELPER(vfp_cmps_a64)(float32 x, float32 y, void *fp_status) | |
107 | { | |
108 | return float_rel_to_flags(float32_compare_quiet(x, y, fp_status)); | |
109 | } | |
110 | ||
111 | uint64_t HELPER(vfp_cmpes_a64)(float32 x, float32 y, void *fp_status) | |
112 | { | |
113 | return float_rel_to_flags(float32_compare(x, y, fp_status)); | |
114 | } | |
115 | ||
116 | uint64_t HELPER(vfp_cmpd_a64)(float64 x, float64 y, void *fp_status) | |
117 | { | |
118 | return float_rel_to_flags(float64_compare_quiet(x, y, fp_status)); | |
119 | } | |
120 | ||
121 | uint64_t HELPER(vfp_cmped_a64)(float64 x, float64 y, void *fp_status) | |
122 | { | |
123 | return float_rel_to_flags(float64_compare(x, y, fp_status)); | |
124 | } | |
7c51048f | 125 | |
f5e51e7f PM |
126 | float32 HELPER(vfp_mulxs)(float32 a, float32 b, void *fpstp) |
127 | { | |
128 | float_status *fpst = fpstp; | |
129 | ||
130 | if ((float32_is_zero(a) && float32_is_infinity(b)) || | |
131 | (float32_is_infinity(a) && float32_is_zero(b))) { | |
132 | /* 2.0 with the sign bit set to sign(A) XOR sign(B) */ | |
133 | return make_float32((1U << 30) | | |
134 | ((float32_val(a) ^ float32_val(b)) & (1U << 31))); | |
135 | } | |
136 | return float32_mul(a, b, fpst); | |
137 | } | |
138 | ||
139 | float64 HELPER(vfp_mulxd)(float64 a, float64 b, void *fpstp) | |
140 | { | |
141 | float_status *fpst = fpstp; | |
142 | ||
143 | if ((float64_is_zero(a) && float64_is_infinity(b)) || | |
144 | (float64_is_infinity(a) && float64_is_zero(b))) { | |
145 | /* 2.0 with the sign bit set to sign(A) XOR sign(B) */ | |
146 | return make_float64((1ULL << 62) | | |
147 | ((float64_val(a) ^ float64_val(b)) & (1ULL << 63))); | |
148 | } | |
149 | return float64_mul(a, b, fpst); | |
150 | } | |
151 | ||
7c51048f MM |
152 | uint64_t HELPER(simd_tbl)(CPUARMState *env, uint64_t result, uint64_t indices, |
153 | uint32_t rn, uint32_t numregs) | |
154 | { | |
155 | /* Helper function for SIMD TBL and TBX. We have to do the table | |
156 | * lookup part for the 64 bits worth of indices we're passed in. | |
157 | * result is the initial results vector (either zeroes for TBL | |
158 | * or some guest values for TBX), rn the register number where | |
159 | * the table starts, and numregs the number of registers in the table. | |
160 | * We return the results of the lookups. | |
161 | */ | |
162 | int shift; | |
163 | ||
164 | for (shift = 0; shift < 64; shift += 8) { | |
165 | int index = extract64(indices, shift, 8); | |
166 | if (index < 16 * numregs) { | |
167 | /* Convert index (a byte offset into the virtual table | |
168 | * which is a series of 128-bit vectors concatenated) | |
169 | * into the correct vfp.regs[] element plus a bit offset | |
170 | * into that element, bearing in mind that the table | |
171 | * can wrap around from V31 to V0. | |
172 | */ | |
173 | int elt = (rn * 2 + (index >> 3)) % 64; | |
174 | int bitidx = (index & 7) * 8; | |
175 | uint64_t val = extract64(env->vfp.regs[elt], bitidx, 8); | |
176 | ||
177 | result = deposit64(result, shift, 8, val); | |
178 | } | |
179 | } | |
180 | return result; | |
181 | } | |
8908f4d1 AB |
182 | |
183 | /* 64bit/double versions of the neon float compare functions */ | |
184 | uint64_t HELPER(neon_ceq_f64)(float64 a, float64 b, void *fpstp) | |
185 | { | |
186 | float_status *fpst = fpstp; | |
187 | return -float64_eq_quiet(a, b, fpst); | |
188 | } | |
189 | ||
190 | uint64_t HELPER(neon_cge_f64)(float64 a, float64 b, void *fpstp) | |
191 | { | |
192 | float_status *fpst = fpstp; | |
193 | return -float64_le(b, a, fpst); | |
194 | } | |
195 | ||
196 | uint64_t HELPER(neon_cgt_f64)(float64 a, float64 b, void *fpstp) | |
197 | { | |
198 | float_status *fpst = fpstp; | |
199 | return -float64_lt(b, a, fpst); | |
200 | } | |
057d5f62 PM |
201 | |
202 | /* Reciprocal step and sqrt step. Note that unlike the A32/T32 | |
203 | * versions, these do a fully fused multiply-add or | |
204 | * multiply-add-and-halve. | |
205 | */ | |
206 | #define float32_two make_float32(0x40000000) | |
207 | #define float32_three make_float32(0x40400000) | |
208 | #define float32_one_point_five make_float32(0x3fc00000) | |
209 | ||
210 | #define float64_two make_float64(0x4000000000000000ULL) | |
211 | #define float64_three make_float64(0x4008000000000000ULL) | |
212 | #define float64_one_point_five make_float64(0x3FF8000000000000ULL) | |
213 | ||
214 | float32 HELPER(recpsf_f32)(float32 a, float32 b, void *fpstp) | |
215 | { | |
216 | float_status *fpst = fpstp; | |
217 | ||
218 | a = float32_chs(a); | |
219 | if ((float32_is_infinity(a) && float32_is_zero(b)) || | |
220 | (float32_is_infinity(b) && float32_is_zero(a))) { | |
221 | return float32_two; | |
222 | } | |
223 | return float32_muladd(a, b, float32_two, 0, fpst); | |
224 | } | |
225 | ||
226 | float64 HELPER(recpsf_f64)(float64 a, float64 b, void *fpstp) | |
227 | { | |
228 | float_status *fpst = fpstp; | |
229 | ||
230 | a = float64_chs(a); | |
231 | if ((float64_is_infinity(a) && float64_is_zero(b)) || | |
232 | (float64_is_infinity(b) && float64_is_zero(a))) { | |
233 | return float64_two; | |
234 | } | |
235 | return float64_muladd(a, b, float64_two, 0, fpst); | |
236 | } | |
237 | ||
238 | float32 HELPER(rsqrtsf_f32)(float32 a, float32 b, void *fpstp) | |
239 | { | |
240 | float_status *fpst = fpstp; | |
241 | ||
242 | a = float32_chs(a); | |
243 | if ((float32_is_infinity(a) && float32_is_zero(b)) || | |
244 | (float32_is_infinity(b) && float32_is_zero(a))) { | |
245 | return float32_one_point_five; | |
246 | } | |
247 | return float32_muladd(a, b, float32_three, float_muladd_halve_result, fpst); | |
248 | } | |
249 | ||
250 | float64 HELPER(rsqrtsf_f64)(float64 a, float64 b, void *fpstp) | |
251 | { | |
252 | float_status *fpst = fpstp; | |
253 | ||
254 | a = float64_chs(a); | |
255 | if ((float64_is_infinity(a) && float64_is_zero(b)) || | |
256 | (float64_is_infinity(b) && float64_is_zero(a))) { | |
257 | return float64_one_point_five; | |
258 | } | |
259 | return float64_muladd(a, b, float64_three, float_muladd_halve_result, fpst); | |
260 | } |