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CommitLineData
b7bcbe95
FB
1/*
2 * ARM helper routines
5fafdf24 3 *
9ee6e8bb 4 * Copyright (c) 2005-2007 CodeSourcery, LLC
b7bcbe95
FB
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
b7bcbe95 18 */
3e457172
BS
19#include "cpu.h"
20#include "dyngen-exec.h"
7b59220e 21#include "helper.h"
b7bcbe95 22
ad69471c
PB
23#define SIGNBIT (uint32_t)0x80000000
24#define SIGNBIT64 ((uint64_t)1 << 63)
25
1ce94f81 26static void raise_exception(CPUARMState *env, int tt)
b7bcbe95
FB
27{
28 env->exception_index = tt;
1162c041 29 cpu_loop_exit(env);
b7bcbe95
FB
30}
31
9ef39277 32uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def,
8f8e3aa4 33 uint32_t rn, uint32_t maxindex)
9ee6e8bb
PB
34{
35 uint32_t val;
9ee6e8bb
PB
36 uint32_t tmp;
37 int index;
38 int shift;
39 uint64_t *table;
40 table = (uint64_t *)&env->vfp.regs[rn];
41 val = 0;
9ee6e8bb 42 for (shift = 0; shift < 32; shift += 8) {
8f8e3aa4
PB
43 index = (ireg >> shift) & 0xff;
44 if (index < maxindex) {
3018f259 45 tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
9ee6e8bb
PB
46 val |= tmp << shift;
47 } else {
8f8e3aa4 48 val |= def & (0xff << shift);
9ee6e8bb
PB
49 }
50 }
8f8e3aa4 51 return val;
9ee6e8bb
PB
52}
53
b5ff1b31
FB
54#if !defined(CONFIG_USER_ONLY)
55
3e457172
BS
56#include "softmmu_exec.h"
57
b5ff1b31 58#define MMUSUFFIX _mmu
b5ff1b31
FB
59
60#define SHIFT 0
61#include "softmmu_template.h"
62
63#define SHIFT 1
64#include "softmmu_template.h"
65
66#define SHIFT 2
67#include "softmmu_template.h"
68
69#define SHIFT 3
70#include "softmmu_template.h"
71
72/* try to fill the TLB and return an exception if error. If retaddr is
73 NULL, it means that the function was called in C code (i.e. not
74 from generated code or from helper.c) */
75/* XXX: fix it to restore all registers */
0ecb72a5 76void tlb_fill(CPUARMState *env1, target_ulong addr, int is_write, int mmu_idx,
20503968 77 uintptr_t retaddr)
b5ff1b31
FB
78{
79 TranslationBlock *tb;
0ecb72a5 80 CPUARMState *saved_env;
b5ff1b31
FB
81 int ret;
82
b5ff1b31 83 saved_env = env;
6e19a137 84 env = env1;
97b348e7 85 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx);
551bd27f 86 if (unlikely(ret)) {
b5ff1b31
FB
87 if (retaddr) {
88 /* now we have a real cpu fault */
20503968 89 tb = tb_find_pc(retaddr);
b5ff1b31
FB
90 if (tb) {
91 /* the PC is inside the translated code. It means that we have
92 a virtual CPU fault */
20503968 93 cpu_restore_state(tb, env, retaddr);
b5ff1b31
FB
94 }
95 }
1ce94f81 96 raise_exception(env, env->exception_index);
b5ff1b31
FB
97 }
98 env = saved_env;
99}
b5ff1b31 100#endif
1497c961 101
b90372ad 102/* FIXME: Pass an explicit pointer to QF to CPUARMState, and move saturating
ad69471c 103 instructions into helper.c */
9ef39277 104uint32_t HELPER(add_setq)(CPUARMState *env, uint32_t a, uint32_t b)
1497c961
PB
105{
106 uint32_t res = a + b;
107 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
108 env->QF = 1;
109 return res;
110}
111
9ef39277 112uint32_t HELPER(add_saturate)(CPUARMState *env, uint32_t a, uint32_t b)
1497c961
PB
113{
114 uint32_t res = a + b;
115 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
116 env->QF = 1;
117 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
118 }
119 return res;
120}
121
9ef39277 122uint32_t HELPER(sub_saturate)(CPUARMState *env, uint32_t a, uint32_t b)
1497c961
PB
123{
124 uint32_t res = a - b;
125 if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
126 env->QF = 1;
127 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
128 }
129 return res;
130}
131
9ef39277 132uint32_t HELPER(double_saturate)(CPUARMState *env, int32_t val)
1497c961
PB
133{
134 uint32_t res;
135 if (val >= 0x40000000) {
136 res = ~SIGNBIT;
137 env->QF = 1;
138 } else if (val <= (int32_t)0xc0000000) {
139 res = SIGNBIT;
140 env->QF = 1;
141 } else {
142 res = val << 1;
143 }
144 return res;
145}
146
9ef39277 147uint32_t HELPER(add_usaturate)(CPUARMState *env, uint32_t a, uint32_t b)
1497c961
PB
148{
149 uint32_t res = a + b;
150 if (res < a) {
151 env->QF = 1;
152 res = ~0;
153 }
154 return res;
155}
156
9ef39277 157uint32_t HELPER(sub_usaturate)(CPUARMState *env, uint32_t a, uint32_t b)
1497c961
PB
158{
159 uint32_t res = a - b;
160 if (res > a) {
161 env->QF = 1;
162 res = 0;
163 }
164 return res;
165}
166
6ddbc6e4 167/* Signed saturation. */
9ef39277 168static inline uint32_t do_ssat(CPUARMState *env, int32_t val, int shift)
6ddbc6e4
PB
169{
170 int32_t top;
171 uint32_t mask;
172
6ddbc6e4
PB
173 top = val >> shift;
174 mask = (1u << shift) - 1;
175 if (top > 0) {
176 env->QF = 1;
177 return mask;
178 } else if (top < -1) {
179 env->QF = 1;
180 return ~mask;
181 }
182 return val;
183}
184
185/* Unsigned saturation. */
9ef39277 186static inline uint32_t do_usat(CPUARMState *env, int32_t val, int shift)
6ddbc6e4
PB
187{
188 uint32_t max;
189
6ddbc6e4
PB
190 max = (1u << shift) - 1;
191 if (val < 0) {
192 env->QF = 1;
193 return 0;
194 } else if (val > max) {
195 env->QF = 1;
196 return max;
197 }
198 return val;
199}
200
201/* Signed saturate. */
9ef39277 202uint32_t HELPER(ssat)(CPUARMState *env, uint32_t x, uint32_t shift)
6ddbc6e4 203{
9ef39277 204 return do_ssat(env, x, shift);
6ddbc6e4
PB
205}
206
207/* Dual halfword signed saturate. */
9ef39277 208uint32_t HELPER(ssat16)(CPUARMState *env, uint32_t x, uint32_t shift)
6ddbc6e4
PB
209{
210 uint32_t res;
211
9ef39277
BS
212 res = (uint16_t)do_ssat(env, (int16_t)x, shift);
213 res |= do_ssat(env, ((int32_t)x) >> 16, shift) << 16;
6ddbc6e4
PB
214 return res;
215}
216
217/* Unsigned saturate. */
9ef39277 218uint32_t HELPER(usat)(CPUARMState *env, uint32_t x, uint32_t shift)
6ddbc6e4 219{
9ef39277 220 return do_usat(env, x, shift);
6ddbc6e4
PB
221}
222
223/* Dual halfword unsigned saturate. */
9ef39277 224uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x, uint32_t shift)
6ddbc6e4
PB
225{
226 uint32_t res;
227
9ef39277
BS
228 res = (uint16_t)do_usat(env, (int16_t)x, shift);
229 res |= do_usat(env, ((int32_t)x) >> 16, shift) << 16;
6ddbc6e4
PB
230 return res;
231}
d9ba4830 232
1ce94f81 233void HELPER(wfi)(CPUARMState *env)
d9ba4830
PB
234{
235 env->exception_index = EXCP_HLT;
236 env->halted = 1;
1162c041 237 cpu_loop_exit(env);
d9ba4830
PB
238}
239
1ce94f81 240void HELPER(exception)(CPUARMState *env, uint32_t excp)
d9ba4830
PB
241{
242 env->exception_index = excp;
1162c041 243 cpu_loop_exit(env);
d9ba4830
PB
244}
245
9ef39277 246uint32_t HELPER(cpsr_read)(CPUARMState *env)
d9ba4830
PB
247{
248 return cpsr_read(env) & ~CPSR_EXEC;
249}
250
1ce94f81 251void HELPER(cpsr_write)(CPUARMState *env, uint32_t val, uint32_t mask)
d9ba4830
PB
252{
253 cpsr_write(env, val, mask);
254}
b0109805
PB
255
256/* Access to user mode registers from privileged modes. */
9ef39277 257uint32_t HELPER(get_user_reg)(CPUARMState *env, uint32_t regno)
b0109805
PB
258{
259 uint32_t val;
260
261 if (regno == 13) {
262 val = env->banked_r13[0];
263 } else if (regno == 14) {
264 val = env->banked_r14[0];
265 } else if (regno >= 8
266 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
267 val = env->usr_regs[regno - 8];
268 } else {
269 val = env->regs[regno];
270 }
271 return val;
272}
273
1ce94f81 274void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val)
b0109805
PB
275{
276 if (regno == 13) {
277 env->banked_r13[0] = val;
278 } else if (regno == 14) {
279 env->banked_r14[0] = val;
280 } else if (regno >= 8
281 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
282 env->usr_regs[regno - 8] = val;
283 } else {
284 env->regs[regno] = val;
285 }
286}
4b6a83fb
PM
287
288void HELPER(set_cp_reg)(CPUARMState *env, void *rip, uint32_t value)
289{
290 const ARMCPRegInfo *ri = rip;
291 int excp = ri->writefn(env, ri, value);
292 if (excp) {
1ce94f81 293 raise_exception(env, excp);
4b6a83fb
PM
294 }
295}
296
297uint32_t HELPER(get_cp_reg)(CPUARMState *env, void *rip)
298{
299 const ARMCPRegInfo *ri = rip;
300 uint64_t value;
301 int excp = ri->readfn(env, ri, &value);
302 if (excp) {
1ce94f81 303 raise_exception(env, excp);
4b6a83fb
PM
304 }
305 return value;
306}
307
308void HELPER(set_cp_reg64)(CPUARMState *env, void *rip, uint64_t value)
309{
310 const ARMCPRegInfo *ri = rip;
311 int excp = ri->writefn(env, ri, value);
312 if (excp) {
1ce94f81 313 raise_exception(env, excp);
4b6a83fb
PM
314 }
315}
316
317uint64_t HELPER(get_cp_reg64)(CPUARMState *env, void *rip)
318{
319 const ARMCPRegInfo *ri = rip;
320 uint64_t value;
321 int excp = ri->readfn(env, ri, &value);
322 if (excp) {
1ce94f81 323 raise_exception(env, excp);
4b6a83fb
PM
324 }
325 return value;
326}
b0109805 327
8984bd2e
PB
328/* ??? Flag setting arithmetic is awkward because we need to do comparisons.
329 The only way to do that in TCG is a conditional branch, which clobbers
330 all our temporaries. For now implement these as helper functions. */
331
9ef39277 332uint32_t HELPER (add_cc)(CPUARMState *env, uint32_t a, uint32_t b)
8984bd2e
PB
333{
334 uint32_t result;
37f9ba46 335 result = a + b;
6fbe23d5 336 env->NF = env->ZF = result;
8984bd2e
PB
337 env->CF = result < a;
338 env->VF = (a ^ b ^ -1) & (a ^ result);
339 return result;
340}
341
9ef39277 342uint32_t HELPER(adc_cc)(CPUARMState *env, uint32_t a, uint32_t b)
8984bd2e
PB
343{
344 uint32_t result;
345 if (!env->CF) {
346 result = a + b;
347 env->CF = result < a;
348 } else {
349 result = a + b + 1;
350 env->CF = result <= a;
351 }
352 env->VF = (a ^ b ^ -1) & (a ^ result);
6fbe23d5 353 env->NF = env->ZF = result;
8984bd2e
PB
354 return result;
355}
356
9ef39277 357uint32_t HELPER(sub_cc)(CPUARMState *env, uint32_t a, uint32_t b)
8984bd2e
PB
358{
359 uint32_t result;
360 result = a - b;
6fbe23d5 361 env->NF = env->ZF = result;
8984bd2e
PB
362 env->CF = a >= b;
363 env->VF = (a ^ b) & (a ^ result);
364 return result;
365}
366
9ef39277 367uint32_t HELPER(sbc_cc)(CPUARMState *env, uint32_t a, uint32_t b)
8984bd2e
PB
368{
369 uint32_t result;
370 if (!env->CF) {
371 result = a - b - 1;
372 env->CF = a > b;
373 } else {
374 result = a - b;
375 env->CF = a >= b;
376 }
377 env->VF = (a ^ b) & (a ^ result);
6fbe23d5 378 env->NF = env->ZF = result;
8984bd2e
PB
379 return result;
380}
381
382/* Similarly for variable shift instructions. */
383
9ef39277 384uint32_t HELPER(shl)(CPUARMState *env, uint32_t x, uint32_t i)
8984bd2e
PB
385{
386 int shift = i & 0xff;
387 if (shift >= 32)
388 return 0;
389 return x << shift;
390}
391
9ef39277 392uint32_t HELPER(shr)(CPUARMState *env, uint32_t x, uint32_t i)
8984bd2e
PB
393{
394 int shift = i & 0xff;
395 if (shift >= 32)
396 return 0;
397 return (uint32_t)x >> shift;
398}
399
9ef39277 400uint32_t HELPER(sar)(CPUARMState *env, uint32_t x, uint32_t i)
8984bd2e
PB
401{
402 int shift = i & 0xff;
403 if (shift >= 32)
404 shift = 31;
405 return (int32_t)x >> shift;
406}
407
9ef39277 408uint32_t HELPER(shl_cc)(CPUARMState *env, uint32_t x, uint32_t i)
8984bd2e
PB
409{
410 int shift = i & 0xff;
411 if (shift >= 32) {
412 if (shift == 32)
413 env->CF = x & 1;
414 else
415 env->CF = 0;
416 return 0;
417 } else if (shift != 0) {
418 env->CF = (x >> (32 - shift)) & 1;
419 return x << shift;
420 }
421 return x;
422}
423
9ef39277 424uint32_t HELPER(shr_cc)(CPUARMState *env, uint32_t x, uint32_t i)
8984bd2e
PB
425{
426 int shift = i & 0xff;
427 if (shift >= 32) {
428 if (shift == 32)
429 env->CF = (x >> 31) & 1;
430 else
431 env->CF = 0;
432 return 0;
433 } else if (shift != 0) {
434 env->CF = (x >> (shift - 1)) & 1;
435 return x >> shift;
436 }
437 return x;
438}
439
9ef39277 440uint32_t HELPER(sar_cc)(CPUARMState *env, uint32_t x, uint32_t i)
8984bd2e
PB
441{
442 int shift = i & 0xff;
443 if (shift >= 32) {
444 env->CF = (x >> 31) & 1;
445 return (int32_t)x >> 31;
446 } else if (shift != 0) {
447 env->CF = (x >> (shift - 1)) & 1;
448 return (int32_t)x >> shift;
449 }
450 return x;
451}
452
9ef39277 453uint32_t HELPER(ror_cc)(CPUARMState *env, uint32_t x, uint32_t i)
8984bd2e
PB
454{
455 int shift1, shift;
456 shift1 = i & 0xff;
457 shift = shift1 & 0x1f;
458 if (shift == 0) {
459 if (shift1 != 0)
460 env->CF = (x >> 31) & 1;
461 return x;
462 } else {
463 env->CF = (x >> (shift - 1)) & 1;
464 return ((uint32_t)x >> shift) | (x << (32 - shift));
465 }
466}