[mirror_qemu.git] / target-cris / op_helper.c

/*
 *  CRIS helper routines
 *
 *  Copyright (c) 2007 AXIS Communications
 *  Written by Edgar E. Iglesias
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "cpu.h"
#include "mmu.h"
#include "helper.h"
#include "host-utils.h"

//#define CRIS_OP_HELPER_DEBUG


#ifdef CRIS_OP_HELPER_DEBUG
#define D(x) x
#define D_LOG(...) qemu_log(__VA__ARGS__)
#else
#define D(x)
#define D_LOG(...) do { } while (0)
#endif

#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"

#define MMUSUFFIX _mmu

#define SHIFT 0
#include "softmmu_template.h"

#define SHIFT 1
#include "softmmu_template.h"

#define SHIFT 2
#include "softmmu_template.h"

#define SHIFT 3
#include "softmmu_template.h"

/* Try to fill the TLB and return an exception if error. If retaddr is
   NULL, it means that the function was called in C code (i.e. not
   from generated code or from helper.c) */
void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx,
              uintptr_t retaddr)
{
    TranslationBlock *tb;
    int ret;

    D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
          env->pc, env->debug1, (void *)retaddr);
    ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx);
    if (unlikely(ret)) {
        if (retaddr) {
            /* now we have a real cpu fault */
            tb = tb_find_pc(retaddr);
            if (tb) {
                /* the PC is inside the translated code. It means that we have
                   a virtual CPU fault */
                cpu_restore_state(tb, env, retaddr);

		/* Evaluate flags after retranslation.  */
                helper_top_evaluate_flags(env);
            }
        }
        cpu_loop_exit(env);
    }
}

#endif

void helper_raise_exception(CPUCRISState *env, uint32_t index)
{
	env->exception_index = index;
        cpu_loop_exit(env);
}

void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
{
#if !defined(CONFIG_USER_ONLY)
	pid &= 0xff;
	if (pid != (env->pregs[PR_PID] & 0xff))
		cris_mmu_flush_pid(env, env->pregs[PR_PID]);
#endif
}

void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
{
#if !defined(CONFIG_USER_ONLY)
	tlb_flush_page(env, env->pregs[PR_SPC]);
	tlb_flush_page(env, new_spc);
#endif
}

void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
{
	qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
}

/* Used by the tlb decoder.  */
#define EXTRACT_FIELD(src, start, end) \
	    (((src) >> start) & ((1 << (end - start + 1)) - 1))

void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
{
	uint32_t srs;
	srs = env->pregs[PR_SRS];
	srs &= 3;
	env->sregs[srs][sreg] = env->regs[reg];

#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2) {
		if (sreg == 6) {
			/* Writes to tlb-hi write to mm_cause as a side 
			   effect.  */
			env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
			env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
		}
		else if (sreg == 5) {
			uint32_t set;
			uint32_t idx;
			uint32_t lo, hi;
			uint32_t vaddr;
			int tlb_v;

			idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
			set >>= 4;
			set &= 3;

			idx &= 15;
			/* We've just made a write to tlb_lo.  */
			lo = env->sregs[SFR_RW_MM_TLB_LO];
			/* Writes are done via r_mm_cause.  */
			hi = env->sregs[SFR_R_MM_CAUSE];

			vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
					      13, 31);
			vaddr <<= TARGET_PAGE_BITS;
			tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
					    3, 3);
			env->tlbsets[srs - 1][set][idx].lo = lo;
			env->tlbsets[srs - 1][set][idx].hi = hi;

			D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", 
				  vaddr, tlb_v, env->pc);
			if (tlb_v) {
				tlb_flush_page(env, vaddr);
			}
		}
	}
#endif
}

void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
{
	uint32_t srs;
	env->pregs[PR_SRS] &= 3;
	srs = env->pregs[PR_SRS];
	
#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2)
	{
		uint32_t set;
		uint32_t idx;
		uint32_t lo, hi;

		idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
		set >>= 4;
		set &= 3;
		idx &= 15;

		/* Update the mirror regs.  */
		hi = env->tlbsets[srs - 1][set][idx].hi;
		lo = env->tlbsets[srs - 1][set][idx].lo;
		env->sregs[SFR_RW_MM_TLB_HI] = hi;
		env->sregs[SFR_RW_MM_TLB_LO] = lo;
	}
#endif
	env->regs[reg] = env->sregs[srs][sreg];
}

static void cris_ccs_rshift(CPUCRISState *env)
{
	uint32_t ccs;

	/* Apply the ccs shift.  */
	ccs = env->pregs[PR_CCS];
	ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
	if (ccs & U_FLAG)
	{
		/* Enter user mode.  */
		env->ksp = env->regs[R_SP];
		env->regs[R_SP] = env->pregs[PR_USP];
	}

	env->pregs[PR_CCS] = ccs;
}

void helper_rfe(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* RFE sets the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;
}

void helper_rfn(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* Set the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;

	/* Always set the M flag.  */
	env->pregs[PR_CCS] |= M_FLAG_V32;
}

uint32_t helper_lz(uint32_t t0)
{
	return clz32(t0);
}

uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
{
	/* FIXME: clean this up.  */

	/* des ref:
	   The N flag is set according to the selected bit in the dest reg.
	   The Z flag is set if the selected bit and all bits to the right are
	   zero.
	   The X flag is cleared.
	   Other flags are left untouched.
	   The destination reg is not affected.*/
	unsigned int fz, sbit, bset, mask, masked_t0;

	sbit = t1 & 31;
	bset = !!(t0 & (1 << sbit));
	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	masked_t0 = t0 & mask;
	fz = !(masked_t0 | bset);

	/* Clear the X, N and Z flags.  */
	ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
	if (env->pregs[PR_VR] < 32)
		ccs &= ~(V_FLAG | C_FLAG);
	/* Set the N and Z flags accordingly.  */
	ccs |= (bset << 3) | (fz << 2);
	return ccs;
}

static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
                                                uint32_t flags, uint32_t ccs)
{
	unsigned int x, z, mask;

	/* Extended arithmetics, leave the z flag alone.  */
	x = env->cc_x;
	mask = env->cc_mask | X_FLAG;
        if (x) {
		z = flags & Z_FLAG;
		mask = mask & ~z;
	}
	flags &= mask;

	/* all insn clear the x-flag except setf or clrf.  */
	ccs &= ~mask;
	ccs |= flags;
	return ccs;
}

uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	int64_t tmp;
	int dneg;

	dneg = ((int32_t)res) < 0;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp < 0)
		flags |= N_FLAG;
	if ((dneg && mof != -1)
	    || (!dneg && mof != 0))
		flags |= V_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	uint64_t tmp;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp >> 63)
		flags |= N_FLAG;
	if (mof)
		flags |= V_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
				   uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= R_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= R_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = (~src) & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

	flags ^= C_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int32_t)res < 0)
		flags |= N_FLAG;
	else if (res == 0L)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}
uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int16_t)res < 0L)
		flags |= N_FLAG;
	else if (res == 0)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

/* TODO: This is expensive. We could split things up and only evaluate part of
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
void helper_evaluate_flags(CPUCRISState *env)
{
	uint32_t src, dst, res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	/* Now, evaluate the flags. This stuff is based on
	   Per Zander's CRISv10 simulator.  */
	switch (env->cc_size)
	{
		case 1:
			if ((res & 0x80L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80L) == 0L)
				    && ((dst & 0x80L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80L) != 0L)
					 && ((dst & 0x80L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x80L) != 0L)
				    && ((dst & 0x80L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x80L) != 0L
				    || (src & 0x80L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 2:
			if ((res & 0x8000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x8000L) == 0L)
				    && ((dst & 0x8000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x8000L) != 0L)
					 && ((dst & 0x8000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x8000L) != 0L)
				    && ((dst & 0x8000L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x8000L) != 0L
				    || (src & 0x8000L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 4:
			if ((res & 0x80000000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80000000L) == 0L)
				    && ((dst & 0x80000000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80000000L) != 0L) &&
					 ((dst & 0x80000000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if (res == 0L)
					flags |= Z_FLAG;
				if (((src & 0x80000000L) != 0L)
				    && ((dst & 0x80000000L) != 0L))
					flags |= V_FLAG;
				if ((dst & 0x80000000L) != 0L
				    || (src & 0x80000000L) != 0L)
					flags |= C_FLAG;
			}
			break;
		default:
			break;
	}

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		flags ^= C_FLAG;

        env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
                                                      env->pregs[PR_CCS]);
}

void helper_top_evaluate_flags(CPUCRISState *env)
{
	switch (env->cc_op)
	{
		case CC_OP_MCP:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
					env->pregs[PR_CCS], env->cc_src,
					env->cc_dest, env->cc_result);
			break;
		case CC_OP_MULS:
                        env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MULU:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MOVE:
		case CC_OP_AND:
		case CC_OP_OR:
		case CC_OP_XOR:
		case CC_OP_ASR:
		case CC_OP_LSR:
		case CC_OP_LSL:
		switch (env->cc_size)
		{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_4(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			case 2:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_2(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
		}
		break;
		case CC_OP_FLAGS:
			/* live.  */
			break;
		case CC_OP_SUB:
		case CC_OP_CMP:
			if (env->cc_size == 4)
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_sub_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
			else
                                helper_evaluate_flags(env);
			break;
		default:
		{
			switch (env->cc_size)
			{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_alu_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
			}
		}
		break;
	}
}
Commit	Line	Data
81fdc5f8 TS	1	/*
	2	* CRIS helper routines
	3	*
	4	* Copyright (c) 2007 AXIS Communications
	5	* Written by Edgar E. Iglesias
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
8167ee88	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
81fdc5f8 TS	19	*/
81fdc5f8 TS	20
3e457172	21	#include "cpu.h"
786c02f1	22	#include "mmu.h"
30abcfc7	23	#include "helper.h"
c38ac98d	24	#include "host-utils.h"
81fdc5f8	25
d12d51d5 AL	26	//#define CRIS_OP_HELPER_DEBUG
	27
	28
	29	#ifdef CRIS_OP_HELPER_DEBUG
	30	#define D(x) x
93fcfe39	31	#define D_LOG(...) qemu_log(__VA__ARGS__)
d12d51d5	32	#else
e2eef170	33	#define D(x)
d12d51d5 AL	34	#define D_LOG(...) do { } while (0)
d12d51d5 AL	35	#endif
e2eef170 PB	36
e2eef170 PB	37	#if !defined(CONFIG_USER_ONLY)
3e457172	38	#include "softmmu_exec.h"
e2eef170	39
81fdc5f8	40	#define MMUSUFFIX _mmu
81fdc5f8 TS	41
	42	#define SHIFT 0
	43	#include "softmmu_template.h"
	44
	45	#define SHIFT 1
	46	#include "softmmu_template.h"
	47
	48	#define SHIFT 2
	49	#include "softmmu_template.h"
	50
	51	#define SHIFT 3
	52	#include "softmmu_template.h"
	53
	54	/* Try to fill the TLB and return an exception if error. If retaddr is
	55	NULL, it means that the function was called in C code (i.e. not
	56	from generated code or from helper.c) */
cf7e0c80	57	void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx,
20503968	58	uintptr_t retaddr)
81fdc5f8 TS	59	{
81fdc5f8 TS	60	TranslationBlock *tb;
81fdc5f8 TS	61	int ret;
81fdc5f8 TS	62
20503968 BS	63	D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
20503968 BS	64	env->pc, env->debug1, (void *)retaddr);
97b348e7	65	ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx);
551bd27f	66	if (unlikely(ret)) {
81fdc5f8 TS	67	if (retaddr) {
81fdc5f8 TS	68	/* now we have a real cpu fault */
20503968	69	tb = tb_find_pc(retaddr);
81fdc5f8 TS	70	if (tb) {
	71	/* the PC is inside the translated code. It means that we have
	72	a virtual CPU fault */
20503968	73	cpu_restore_state(tb, env, retaddr);
30abcfc7 EI	74
30abcfc7 EI	75	/* Evaluate flags after retranslation. */
febc9920	76	helper_top_evaluate_flags(env);
81fdc5f8 TS	77	}
81fdc5f8 TS	78	}
1162c041	79	cpu_loop_exit(env);
81fdc5f8	80	}
81fdc5f8 TS	81	}
81fdc5f8 TS	82
e2eef170 PB	83	#endif
e2eef170 PB	84
febc9920	85	void helper_raise_exception(CPUCRISState *env, uint32_t index)
786c02f1	86	{
dceaf394	87	env->exception_index = index;
1162c041	88	cpu_loop_exit(env);
786c02f1 EI	89	}
786c02f1 EI	90
febc9920	91	void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
cf1d97f0 EI	92	{
cf1d97f0 EI	93	#if !defined(CONFIG_USER_ONLY)
28de16da EI	94	pid &= 0xff;
	95	if (pid != (env->pregs[PR_PID] & 0xff))
	96	cris_mmu_flush_pid(env, env->pregs[PR_PID]);
cf1d97f0 EI	97	#endif
	98	}
	99
febc9920	100	void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
a1aebcb8 EI	101	{
	102	#if !defined(CONFIG_USER_ONLY)
	103	tlb_flush_page(env, env->pregs[PR_SPC]);
	104	tlb_flush_page(env, new_spc);
	105	#endif
	106	}
	107
30abcfc7	108	void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
b41f7df0	109	{
93fcfe39	110	qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
b41f7df0 EI	111	}
b41f7df0 EI	112
cf1d97f0 EI	113	/* Used by the tlb decoder. */
	114	#define EXTRACT_FIELD(src, start, end) \
	115	(((src) >> start) & ((1 << (end - start + 1)) - 1))
	116
febc9920	117	void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
dceaf394 EI	118	{
	119	uint32_t srs;
	120	srs = env->pregs[PR_SRS];
	121	srs &= 3;
	122	env->sregs[srs][sreg] = env->regs[reg];
	123
	124	#if !defined(CONFIG_USER_ONLY)
	125	if (srs == 1 \|\| srs == 2) {
	126	if (sreg == 6) {
	127	/* Writes to tlb-hi write to mm_cause as a side
	128	effect. */
6913ba56 EI	129	env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
6913ba56 EI	130	env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
dceaf394 EI	131	}
	132	else if (sreg == 5) {
	133	uint32_t set;
	134	uint32_t idx;
	135	uint32_t lo, hi;
	136	uint32_t vaddr;
cf1d97f0	137	int tlb_v;
dceaf394 EI	138
	139	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	140	set >>= 4;
	141	set &= 3;
	142
	143	idx &= 15;
	144	/* We've just made a write to tlb_lo. */
	145	lo = env->sregs[SFR_RW_MM_TLB_LO];
	146	/* Writes are done via r_mm_cause. */
	147	hi = env->sregs[SFR_R_MM_CAUSE];
cf1d97f0 EI	148
	149	vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
	150	13, 31);
	151	vaddr <<= TARGET_PAGE_BITS;
	152	tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
	153	3, 3);
dceaf394 EI	154	env->tlbsets[srs - 1][set][idx].lo = lo;
dceaf394 EI	155	env->tlbsets[srs - 1][set][idx].hi = hi;
cf1d97f0	156
d12d51d5 AL	157	D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
d12d51d5 AL	158	vaddr, tlb_v, env->pc);
3e18c6bf EI	159	if (tlb_v) {
	160	tlb_flush_page(env, vaddr);
	161	}
dceaf394 EI	162	}
	163	}
	164	#endif
	165	}
	166
febc9920	167	void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
dceaf394 EI	168	{
	169	uint32_t srs;
	170	env->pregs[PR_SRS] &= 3;
	171	srs = env->pregs[PR_SRS];
	172
	173	#if !defined(CONFIG_USER_ONLY)
	174	if (srs == 1 \|\| srs == 2)
	175	{
	176	uint32_t set;
	177	uint32_t idx;
	178	uint32_t lo, hi;
	179
	180	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	181	set >>= 4;
	182	set &= 3;
	183	idx &= 15;
	184
	185	/* Update the mirror regs. */
	186	hi = env->tlbsets[srs - 1][set][idx].hi;
	187	lo = env->tlbsets[srs - 1][set][idx].lo;
	188	env->sregs[SFR_RW_MM_TLB_HI] = hi;
	189	env->sregs[SFR_RW_MM_TLB_LO] = lo;
	190	}
	191	#endif
	192	env->regs[reg] = env->sregs[srs][sreg];
dceaf394 EI	193	}
dceaf394 EI	194
a1170bfd	195	static void cris_ccs_rshift(CPUCRISState *env)
dceaf394 EI	196	{
	197	uint32_t ccs;
	198
	199	/* Apply the ccs shift. */
	200	ccs = env->pregs[PR_CCS];
	201	ccs = (ccs & 0xc0000000) \| ((ccs & 0x0fffffff) >> 10);
	202	if (ccs & U_FLAG)
	203	{
	204	/* Enter user mode. */
	205	env->ksp = env->regs[R_SP];
	206	env->regs[R_SP] = env->pregs[PR_USP];
	207	}
	208
	209	env->pregs[PR_CCS] = ccs;
	210	}
	211
febc9920	212	void helper_rfe(CPUCRISState *env)
b41f7df0	213	{
bf443337 EI	214	int rflag = env->pregs[PR_CCS] & R_FLAG;
bf443337 EI	215
d12d51d5	216	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
b41f7df0 EI	217	env->pregs[PR_ERP], env->pregs[PR_PID],
b41f7df0 EI	218	env->pregs[PR_CCS],
d12d51d5	219	env->btarget);
dceaf394 EI	220
	221	cris_ccs_rshift(env);
	222
	223	/* RFE sets the P_FLAG only if the R_FLAG is not set. */
bf443337	224	if (!rflag)
dceaf394	225	env->pregs[PR_CCS] \|= P_FLAG;
b41f7df0 EI	226	}
b41f7df0 EI	227
febc9920	228	void helper_rfn(CPUCRISState *env)
5bf8f1ab EI	229	{
	230	int rflag = env->pregs[PR_CCS] & R_FLAG;
	231
d12d51d5	232	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
5bf8f1ab EI	233	env->pregs[PR_ERP], env->pregs[PR_PID],
5bf8f1ab EI	234	env->pregs[PR_CCS],
d12d51d5	235	env->btarget);
5bf8f1ab EI	236
	237	cris_ccs_rshift(env);
	238
	239	/* Set the P_FLAG only if the R_FLAG is not set. */
	240	if (!rflag)
	241	env->pregs[PR_CCS] \|= P_FLAG;
	242
8219314b LP	243	/* Always set the M flag. */
8219314b LP	244	env->pregs[PR_CCS] \|= M_FLAG_V32;
5bf8f1ab EI	245	}
5bf8f1ab EI	246
c38ac98d EI	247	uint32_t helper_lz(uint32_t t0)
	248	{
	249	return clz32(t0);
	250	}
	251
febc9920	252	uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
abd5c94e EI	253	{
	254	/* FIXME: clean this up. */
	255
	256	/* des ref:
	257	The N flag is set according to the selected bit in the dest reg.
	258	The Z flag is set if the selected bit and all bits to the right are
	259	zero.
	260	The X flag is cleared.
	261	Other flags are left untouched.
	262	The destination reg is not affected.*/
	263	unsigned int fz, sbit, bset, mask, masked_t0;
	264
	265	sbit = t1 & 31;
	266	bset = !!(t0 & (1 << sbit));
	267	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	268	masked_t0 = t0 & mask;
	269	fz = !(masked_t0 \| bset);
	270
	271	/* Clear the X, N and Z flags. */
	272	ccs = ccs & ~(X_FLAG \| N_FLAG \| Z_FLAG);
95475216 EI	273	if (env->pregs[PR_VR] < 32)
95475216 EI	274	ccs &= ~(V_FLAG \| C_FLAG);
abd5c94e EI	275	/* Set the N and Z flags accordingly. */
	276	ccs \|= (bset << 3) \| (fz << 2);
	277	return ccs;
	278	}
	279
febc9920 AJ	280	static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
febc9920 AJ	281	uint32_t flags, uint32_t ccs)
b41f7df0	282	{
a8cf66bb	283	unsigned int x, z, mask;
b41f7df0 EI	284
b41f7df0 EI	285	/* Extended arithmetics, leave the z flag alone. */
30abcfc7	286	x = env->cc_x;
a8cf66bb EI	287	mask = env->cc_mask \| X_FLAG;
	288	if (x) {
	289	z = flags & Z_FLAG;
	290	mask = mask & ~z;
	291	}
	292	flags &= mask;
b41f7df0 EI	293
b41f7df0 EI	294	/* all insn clear the x-flag except setf or clrf. */
6231868b EI	295	ccs &= ~mask;
	296	ccs \|= flags;
	297	return ccs;
b41f7df0 EI	298	}
b41f7df0 EI	299
febc9920 AJ	300	uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
febc9920 AJ	301	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	302	{
b41f7df0	303	uint32_t flags = 0;
dceaf394	304	int64_t tmp;
b41f7df0 EI	305	int dneg;
b41f7df0 EI	306
b41f7df0 EI	307	dneg = ((int32_t)res) < 0;
b41f7df0 EI	308
dceaf394 EI	309	tmp = mof;
	310	tmp <<= 32;
	311	tmp \|= res;
b41f7df0 EI	312	if (tmp == 0)
	313	flags \|= Z_FLAG;
	314	else if (tmp < 0)
	315	flags \|= N_FLAG;
	316	if ((dneg && mof != -1)
	317	\|\| (!dneg && mof != 0))
	318	flags \|= V_FLAG;
febc9920	319	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	320	}
b41f7df0 EI	321
febc9920 AJ	322	uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
febc9920 AJ	323	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	324	{
b41f7df0	325	uint32_t flags = 0;
dceaf394	326	uint64_t tmp;
b41f7df0	327
dceaf394 EI	328	tmp = mof;
	329	tmp <<= 32;
	330	tmp \|= res;
b41f7df0 EI	331	if (tmp == 0)
	332	flags \|= Z_FLAG;
	333	else if (tmp >> 63)
	334	flags \|= N_FLAG;
	335	if (mof)
	336	flags \|= V_FLAG;
	337
febc9920	338	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	339	}
b41f7df0 EI	340
febc9920	341	uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
6231868b	342	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	343	{
b41f7df0 EI	344	uint32_t flags = 0;
b41f7df0 EI	345
6231868b EI	346	src = src & 0x80000000;
6231868b EI	347	dst = dst & 0x80000000;
b41f7df0 EI	348
	349	if ((res & 0x80000000L) != 0L)
	350	{
	351	flags \|= N_FLAG;
a8cf66bb	352	if (!src && !dst)
b41f7df0	353	flags \|= V_FLAG;
a8cf66bb	354	else if (src & dst)
b41f7df0	355	flags \|= R_FLAG;
b41f7df0 EI	356	}
	357	else
	358	{
	359	if (res == 0L)
	360	flags \|= Z_FLAG;
a8cf66bb	361	if (src & dst)
b41f7df0	362	flags \|= V_FLAG;
a8cf66bb	363	if (dst \| src)
b41f7df0 EI	364	flags \|= R_FLAG;
	365	}
	366
febc9920	367	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	368	}
b41f7df0 EI	369
febc9920	370	uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
6231868b	371	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	372	{
b41f7df0 EI	373	uint32_t flags = 0;
b41f7df0 EI	374
6231868b EI	375	src = src & 0x80000000;
6231868b EI	376	dst = dst & 0x80000000;
30abcfc7	377
a8cf66bb	378	if ((res & 0x80000000L) != 0L)
30abcfc7	379	{
a8cf66bb EI	380	flags \|= N_FLAG;
	381	if (!src && !dst)
	382	flags \|= V_FLAG;
	383	else if (src & dst)
	384	flags \|= C_FLAG;
	385	}
	386	else
	387	{
	388	if (res == 0L)
	389	flags \|= Z_FLAG;
	390	if (src & dst)
	391	flags \|= V_FLAG;
	392	if (dst \| src)
	393	flags \|= C_FLAG;
30abcfc7 EI	394	}
30abcfc7 EI	395
febc9920	396	return evaluate_flags_writeback(env, flags, ccs);
a8cf66bb EI	397	}
a8cf66bb EI	398
febc9920	399	uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
6231868b	400	uint32_t src, uint32_t dst, uint32_t res)
a8cf66bb	401	{
a8cf66bb EI	402	uint32_t flags = 0;
a8cf66bb EI	403
6231868b EI	404	src = (~src) & 0x80000000;
6231868b EI	405	dst = dst & 0x80000000;
b41f7df0 EI	406
	407	if ((res & 0x80000000L) != 0L)
	408	{
	409	flags \|= N_FLAG;
a8cf66bb	410	if (!src && !dst)
b41f7df0	411	flags \|= V_FLAG;
a8cf66bb	412	else if (src & dst)
b41f7df0	413	flags \|= C_FLAG;
b41f7df0 EI	414	}
	415	else
	416	{
	417	if (res == 0L)
	418	flags \|= Z_FLAG;
a8cf66bb	419	if (src & dst)
b41f7df0	420	flags \|= V_FLAG;
a8cf66bb	421	if (dst \| src)
b41f7df0 EI	422	flags \|= C_FLAG;
	423	}
	424
a8cf66bb	425	flags ^= C_FLAG;
febc9920	426	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	427	}
b41f7df0 EI	428
febc9920 AJ	429	uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
febc9920 AJ	430	uint32_t ccs, uint32_t res)
b41f7df0	431	{
b41f7df0 EI	432	uint32_t flags = 0;
b41f7df0 EI	433
b41f7df0 EI	434	if ((int32_t)res < 0)
	435	flags \|= N_FLAG;
	436	else if (res == 0L)
	437	flags \|= Z_FLAG;
	438
febc9920	439	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0	440	}
febc9920 AJ	441	uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
febc9920 AJ	442	uint32_t ccs, uint32_t res)
b41f7df0	443	{
b41f7df0	444	uint32_t flags = 0;
b41f7df0 EI	445
	446	if ((int16_t)res < 0L)
	447	flags \|= N_FLAG;
	448	else if (res == 0)
	449	flags \|= Z_FLAG;
	450
febc9920	451	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	452	}
	453
	454	/* TODO: This is expensive. We could split things up and only evaluate part of
	455	CCR on a need to know basis. For now, we simply re-evaluate everything. */
febc9920	456	void helper_evaluate_flags(CPUCRISState *env)
b41f7df0	457	{
6231868b	458	uint32_t src, dst, res;
b41f7df0 EI	459	uint32_t flags = 0;
	460
	461	src = env->cc_src;
	462	dst = env->cc_dest;
	463	res = env->cc_result;
	464
30abcfc7 EI	465	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
30abcfc7 EI	466	src = ~src;
b41f7df0 EI	467
	468	/* Now, evaluate the flags. This stuff is based on
	469	Per Zander's CRISv10 simulator. */
	470	switch (env->cc_size)
	471	{
	472	case 1:
	473	if ((res & 0x80L) != 0L)
	474	{
	475	flags \|= N_FLAG;
	476	if (((src & 0x80L) == 0L)
	477	&& ((dst & 0x80L) == 0L))
	478	{
	479	flags \|= V_FLAG;
	480	}
	481	else if (((src & 0x80L) != 0L)
	482	&& ((dst & 0x80L) != 0L))
	483	{
	484	flags \|= C_FLAG;
	485	}
	486	}
	487	else
	488	{
	489	if ((res & 0xFFL) == 0L)
	490	{
	491	flags \|= Z_FLAG;
	492	}
	493	if (((src & 0x80L) != 0L)
	494	&& ((dst & 0x80L) != 0L))
	495	{
	496	flags \|= V_FLAG;
	497	}
	498	if ((dst & 0x80L) != 0L
	499	\|\| (src & 0x80L) != 0L)
	500	{
	501	flags \|= C_FLAG;
	502	}
	503	}
	504	break;
	505	case 2:
	506	if ((res & 0x8000L) != 0L)
	507	{
	508	flags \|= N_FLAG;
	509	if (((src & 0x8000L) == 0L)
	510	&& ((dst & 0x8000L) == 0L))
	511	{
	512	flags \|= V_FLAG;
	513	}
	514	else if (((src & 0x8000L) != 0L)
	515	&& ((dst & 0x8000L) != 0L))
	516	{
	517	flags \|= C_FLAG;
	518	}
	519	}
	520	else
	521	{
	522	if ((res & 0xFFFFL) == 0L)
	523	{
	524	flags \|= Z_FLAG;
	525	}
	526	if (((src & 0x8000L) != 0L)
	527	&& ((dst & 0x8000L) != 0L))
	528	{
	529	flags \|= V_FLAG;
	530	}
531	if ((dst & 0x8000L) != 0L
532	\|\| (src & 0x8000L) != 0L)
533	{
534	flags \|= C_FLAG;
535	}
536	}
537	break;
538	case 4:
539	if ((res & 0x80000000L) != 0L)
540	{
541	flags \|= N_FLAG;
542	if (((src & 0x80000000L) == 0L)
543	&& ((dst & 0x80000000L) == 0L))
544	{
545	flags \|= V_FLAG;
546	}
547	else if (((src & 0x80000000L) != 0L) &&
548	((dst & 0x80000000L) != 0L))
549	{
550	flags \|= C_FLAG;
551	}
552	}
553	else
554	{
555	if (res == 0L)
556	flags \|= Z_FLAG;
557	if (((src & 0x80000000L) != 0L)
558	&& ((dst & 0x80000000L) != 0L))
559	flags \|= V_FLAG;
560	if ((dst & 0x80000000L) != 0L
561	\|\| (src & 0x80000000L) != 0L)
562	flags \|= C_FLAG;
563	}
564	break;
565	default:
566	break;
567	}
568
6231868b	569	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
b41f7df0	570	flags ^= C_FLAG;
6231868b	571
febc9920 AJ	572	env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
febc9920 AJ	573	env->pregs[PR_CCS]);
b41f7df0	574	}
30abcfc7	575
febc9920	576	void helper_top_evaluate_flags(CPUCRISState *env)
30abcfc7 EI	577	{
	578	switch (env->cc_op)
	579	{
	580	case CC_OP_MCP:
febc9920	581	env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
6231868b EI	582	env->pregs[PR_CCS], env->cc_src,
6231868b EI	583	env->cc_dest, env->cc_result);
30abcfc7 EI	584	break;
30abcfc7 EI	585	case CC_OP_MULS:
febc9920	586	env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
6231868b EI	587	env->pregs[PR_CCS], env->cc_result,
6231868b EI	588	env->pregs[PR_MOF]);
30abcfc7 EI	589	break;
30abcfc7 EI	590	case CC_OP_MULU:
febc9920	591	env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
6231868b EI	592	env->pregs[PR_CCS], env->cc_result,
6231868b EI	593	env->pregs[PR_MOF]);
30abcfc7 EI	594	break;
	595	case CC_OP_MOVE:
	596	case CC_OP_AND:
	597	case CC_OP_OR:
	598	case CC_OP_XOR:
	599	case CC_OP_ASR:
	600	case CC_OP_LSR:
	601	case CC_OP_LSL:
6231868b EI	602	switch (env->cc_size)
	603	{
	604	case 4:
	605	env->pregs[PR_CCS] =
febc9920	606	helper_evaluate_flags_move_4(env,
6231868b EI	607	env->pregs[PR_CCS],
	608	env->cc_result);
	609	break;
	610	case 2:
	611	env->pregs[PR_CCS] =
febc9920	612	helper_evaluate_flags_move_2(env,
6231868b EI	613	env->pregs[PR_CCS],
	614	env->cc_result);
	615	break;
	616	default:
febc9920	617	helper_evaluate_flags(env);
6231868b EI	618	break;
	619	}
	620	break;
30abcfc7 EI	621	case CC_OP_FLAGS:
	622	/* live. */
	623	break;
a8cf66bb EI	624	case CC_OP_SUB:
	625	case CC_OP_CMP:
	626	if (env->cc_size == 4)
6231868b	627	env->pregs[PR_CCS] =
febc9920	628	helper_evaluate_flags_sub_4(env,
6231868b EI	629	env->pregs[PR_CCS],
	630	env->cc_src, env->cc_dest,
	631	env->cc_result);
a8cf66bb	632	else
febc9920	633	helper_evaluate_flags(env);
a8cf66bb	634	break;
30abcfc7 EI	635	default:
	636	{
	637	switch (env->cc_size)
	638	{
6231868b EI	639	case 4:
6231868b EI	640	env->pregs[PR_CCS] =
febc9920	641	helper_evaluate_flags_alu_4(env,
6231868b EI	642	env->pregs[PR_CCS],
	643	env->cc_src, env->cc_dest,
	644	env->cc_result);
	645	break;
	646	default:
febc9920	647	helper_evaluate_flags(env);
6231868b	648	break;
30abcfc7 EI	649	}
	650	}
	651	break;
	652	}
	653	}