[mirror_qemu.git] / target-cris / op_helper.c

/*
 *  CRIS helper routines
 *
 *  Copyright (c) 2007 AXIS Communications
 *  Written by Edgar E. Iglesias
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */

#include "qemu/osdep.h"
#include "cpu.h"
#include "mmu.h"
#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"

//#define CRIS_OP_HELPER_DEBUG


#ifdef CRIS_OP_HELPER_DEBUG
#define D(x) x
#define D_LOG(...) qemu_log(__VA_ARGS__)
#else
#define D(x)
#define D_LOG(...) do { } while (0)
#endif

#if !defined(CONFIG_USER_ONLY)
/* Try to fill the TLB and return an exception if error. If retaddr is
   NULL, it means that the function was called in C code (i.e. not
   from generated code or from helper.c) */
void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
              uintptr_t retaddr)
{
    CRISCPU *cpu = CRIS_CPU(cs);
    CPUCRISState *env = &cpu->env;
    int ret;

    D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
          env->pc, env->pregs[PR_EDA], (void *)retaddr);
    ret = cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
    if (unlikely(ret)) {
        if (retaddr) {
            /* now we have a real cpu fault */
            if (cpu_restore_state(cs, retaddr)) {
		/* Evaluate flags after retranslation.  */
                helper_top_evaluate_flags(env);
            }
        }
        cpu_loop_exit(cs);
    }
}

#endif

void helper_raise_exception(CPUCRISState *env, uint32_t index)
{
    CPUState *cs = CPU(cris_env_get_cpu(env));

    cs->exception_index = index;
    cpu_loop_exit(cs);
}

void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
{
#if !defined(CONFIG_USER_ONLY)
	pid &= 0xff;
	if (pid != (env->pregs[PR_PID] & 0xff))
		cris_mmu_flush_pid(env, env->pregs[PR_PID]);
#endif
}

void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
{
#if !defined(CONFIG_USER_ONLY)
    CRISCPU *cpu = cris_env_get_cpu(env);
    CPUState *cs = CPU(cpu);

    tlb_flush_page(cs, env->pregs[PR_SPC]);
    tlb_flush_page(cs, new_spc);
#endif
}

/* Used by the tlb decoder.  */
#define EXTRACT_FIELD(src, start, end) \
	    (((src) >> start) & ((1 << (end - start + 1)) - 1))

void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
{
#if !defined(CONFIG_USER_ONLY)
    CRISCPU *cpu = cris_env_get_cpu(env);
#endif
	uint32_t srs;
	srs = env->pregs[PR_SRS];
	srs &= 3;
	env->sregs[srs][sreg] = env->regs[reg];

#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2) {
		if (sreg == 6) {
			/* Writes to tlb-hi write to mm_cause as a side 
			   effect.  */
			env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
			env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
		}
		else if (sreg == 5) {
			uint32_t set;
			uint32_t idx;
			uint32_t lo, hi;
			uint32_t vaddr;
			int tlb_v;

			idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
			set >>= 4;
			set &= 3;

			idx &= 15;
			/* We've just made a write to tlb_lo.  */
			lo = env->sregs[SFR_RW_MM_TLB_LO];
			/* Writes are done via r_mm_cause.  */
			hi = env->sregs[SFR_R_MM_CAUSE];

			vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
					      13, 31);
			vaddr <<= TARGET_PAGE_BITS;
			tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
					    3, 3);
			env->tlbsets[srs - 1][set][idx].lo = lo;
			env->tlbsets[srs - 1][set][idx].hi = hi;

			D_LOG("tlb flush vaddr=%x v=%d pc=%x\n", 
				  vaddr, tlb_v, env->pc);
			if (tlb_v) {
                tlb_flush_page(CPU(cpu), vaddr);
			}
		}
	}
#endif
}

void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
{
	uint32_t srs;
	env->pregs[PR_SRS] &= 3;
	srs = env->pregs[PR_SRS];
	
#if !defined(CONFIG_USER_ONLY)
	if (srs == 1 || srs == 2)
	{
		uint32_t set;
		uint32_t idx;
		uint32_t lo, hi;

		idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
		set >>= 4;
		set &= 3;
		idx &= 15;

		/* Update the mirror regs.  */
		hi = env->tlbsets[srs - 1][set][idx].hi;
		lo = env->tlbsets[srs - 1][set][idx].lo;
		env->sregs[SFR_RW_MM_TLB_HI] = hi;
		env->sregs[SFR_RW_MM_TLB_LO] = lo;
	}
#endif
	env->regs[reg] = env->sregs[srs][sreg];
}

static void cris_ccs_rshift(CPUCRISState *env)
{
	uint32_t ccs;

	/* Apply the ccs shift.  */
	ccs = env->pregs[PR_CCS];
	ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
	if (ccs & U_FLAG)
	{
		/* Enter user mode.  */
		env->ksp = env->regs[R_SP];
		env->regs[R_SP] = env->pregs[PR_USP];
	}

	env->pregs[PR_CCS] = ccs;
}

void helper_rfe(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* RFE sets the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;
}

void helper_rfn(CPUCRISState *env)
{
	int rflag = env->pregs[PR_CCS] & R_FLAG;

	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n", 
		 env->pregs[PR_ERP], env->pregs[PR_PID],
		 env->pregs[PR_CCS],
		 env->btarget);

	cris_ccs_rshift(env);

	/* Set the P_FLAG only if the R_FLAG is not set.  */
	if (!rflag)
		env->pregs[PR_CCS] |= P_FLAG;

	/* Always set the M flag.  */
	env->pregs[PR_CCS] |= M_FLAG_V32;
}

uint32_t helper_lz(uint32_t t0)
{
	return clz32(t0);
}

uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
{
	/* FIXME: clean this up.  */

	/* des ref:
	   The N flag is set according to the selected bit in the dest reg.
	   The Z flag is set if the selected bit and all bits to the right are
	   zero.
	   The X flag is cleared.
	   Other flags are left untouched.
	   The destination reg is not affected.*/
	unsigned int fz, sbit, bset, mask, masked_t0;

	sbit = t1 & 31;
	bset = !!(t0 & (1 << sbit));
	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	masked_t0 = t0 & mask;
	fz = !(masked_t0 | bset);

	/* Clear the X, N and Z flags.  */
	ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
	if (env->pregs[PR_VR] < 32)
		ccs &= ~(V_FLAG | C_FLAG);
	/* Set the N and Z flags accordingly.  */
	ccs |= (bset << 3) | (fz << 2);
	return ccs;
}

static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
                                                uint32_t flags, uint32_t ccs)
{
	unsigned int x, z, mask;

	/* Extended arithmetics, leave the z flag alone.  */
	x = env->cc_x;
	mask = env->cc_mask | X_FLAG;
        if (x) {
		z = flags & Z_FLAG;
		mask = mask & ~z;
	}
	flags &= mask;

	/* all insn clear the x-flag except setf or clrf.  */
	ccs &= ~mask;
	ccs |= flags;
	return ccs;
}

uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	int64_t tmp;
	int dneg;

	dneg = ((int32_t)res) < 0;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp < 0)
		flags |= N_FLAG;
	if ((dneg && mof != -1)
	    || (!dneg && mof != 0))
		flags |= V_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
                                    uint32_t ccs, uint32_t res, uint32_t mof)
{
	uint32_t flags = 0;
	uint64_t tmp;

	tmp = mof;
	tmp <<= 32;
	tmp |= res;
	if (tmp == 0)
		flags |= Z_FLAG;
	else if (tmp >> 63)
		flags |= N_FLAG;
	if (mof)
		flags |= V_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
				   uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= R_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= R_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = src & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
				     uint32_t src, uint32_t dst, uint32_t res)
{
	uint32_t flags = 0;

	src = (~src) & 0x80000000;
	dst = dst & 0x80000000;

	if ((res & 0x80000000L) != 0L)
	{
		flags |= N_FLAG;
		if (!src && !dst)
			flags |= V_FLAG;
		else if (src & dst)
			flags |= C_FLAG;
	}
	else
	{
		if (res == 0L)
			flags |= Z_FLAG;
		if (src & dst) 
			flags |= V_FLAG;
		if (dst | src) 
			flags |= C_FLAG;
	}

	flags ^= C_FLAG;
        return evaluate_flags_writeback(env, flags, ccs);
}

uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int32_t)res < 0)
		flags |= N_FLAG;
	else if (res == 0L)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}
uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
                                      uint32_t ccs, uint32_t res)
{
	uint32_t flags = 0;

	if ((int16_t)res < 0L)
		flags |= N_FLAG;
	else if (res == 0)
		flags |= Z_FLAG;

        return evaluate_flags_writeback(env, flags, ccs);
}

/* TODO: This is expensive. We could split things up and only evaluate part of
   CCR on a need to know basis. For now, we simply re-evaluate everything.  */
void helper_evaluate_flags(CPUCRISState *env)
{
	uint32_t src, dst, res;
	uint32_t flags = 0;

	src = env->cc_src;
	dst = env->cc_dest;
	res = env->cc_result;

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		src = ~src;

	/* Now, evaluate the flags. This stuff is based on
	   Per Zander's CRISv10 simulator.  */
	switch (env->cc_size)
	{
		case 1:
			if ((res & 0x80L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80L) == 0L)
				    && ((dst & 0x80L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80L) != 0L)
					 && ((dst & 0x80L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x80L) != 0L)
				    && ((dst & 0x80L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x80L) != 0L
				    || (src & 0x80L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 2:
			if ((res & 0x8000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x8000L) == 0L)
				    && ((dst & 0x8000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x8000L) != 0L)
					 && ((dst & 0x8000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if ((res & 0xFFFFL) == 0L)
				{
					flags |= Z_FLAG;
				}
				if (((src & 0x8000L) != 0L)
				    && ((dst & 0x8000L) != 0L))
				{
					flags |= V_FLAG;
				}
				if ((dst & 0x8000L) != 0L
				    || (src & 0x8000L) != 0L)
				{
					flags |= C_FLAG;
				}
			}
			break;
		case 4:
			if ((res & 0x80000000L) != 0L)
			{
				flags |= N_FLAG;
				if (((src & 0x80000000L) == 0L)
				    && ((dst & 0x80000000L) == 0L))
				{
					flags |= V_FLAG;
				}
				else if (((src & 0x80000000L) != 0L) &&
					 ((dst & 0x80000000L) != 0L))
				{
					flags |= C_FLAG;
				}
			}
			else
			{
				if (res == 0L)
					flags |= Z_FLAG;
				if (((src & 0x80000000L) != 0L)
				    && ((dst & 0x80000000L) != 0L))
					flags |= V_FLAG;
				if ((dst & 0x80000000L) != 0L
				    || (src & 0x80000000L) != 0L)
					flags |= C_FLAG;
			}
			break;
		default:
			break;
	}

	if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
		flags ^= C_FLAG;

        env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
                                                      env->pregs[PR_CCS]);
}

void helper_top_evaluate_flags(CPUCRISState *env)
{
	switch (env->cc_op)
	{
		case CC_OP_MCP:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
					env->pregs[PR_CCS], env->cc_src,
					env->cc_dest, env->cc_result);
			break;
		case CC_OP_MULS:
                        env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MULU:
                        env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
					env->pregs[PR_CCS], env->cc_result,
					env->pregs[PR_MOF]);
			break;
		case CC_OP_MOVE:
		case CC_OP_AND:
		case CC_OP_OR:
		case CC_OP_XOR:
		case CC_OP_ASR:
		case CC_OP_LSR:
		case CC_OP_LSL:
		switch (env->cc_size)
		{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_4(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			case 2:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_move_2(env,
							env->pregs[PR_CCS],
							env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
		}
		break;
		case CC_OP_FLAGS:
			/* live.  */
			break;
		case CC_OP_SUB:
		case CC_OP_CMP:
			if (env->cc_size == 4)
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_sub_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
			else
                                helper_evaluate_flags(env);
			break;
		default:
		{
			switch (env->cc_size)
			{
			case 4:
				env->pregs[PR_CCS] =
                                        helper_evaluate_flags_alu_4(env,
						env->pregs[PR_CCS],
						env->cc_src, env->cc_dest,
						env->cc_result);
				break;
			default:
                                helper_evaluate_flags(env);
				break;
			}
		}
		break;
	}
}
Commit	Line	Data
81fdc5f8 TS	1	/*
	2	* CRIS helper routines
	3	*
	4	* Copyright (c) 2007 AXIS Communications
	5	* Written by Edgar E. Iglesias
	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
8167ee88	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
81fdc5f8 TS	19	*/
81fdc5f8 TS	20
23b0d7df	21	#include "qemu/osdep.h"
3e457172	22	#include "cpu.h"
786c02f1	23	#include "mmu.h"
2ef6175a	24	#include "exec/helper-proto.h"
1de7afc9	25	#include "qemu/host-utils.h"
63c91552	26	#include "exec/exec-all.h"
f08b6170	27	#include "exec/cpu_ldst.h"
81fdc5f8	28
d12d51d5 AL	29	//#define CRIS_OP_HELPER_DEBUG
	30
	31
	32	#ifdef CRIS_OP_HELPER_DEBUG
	33	#define D(x) x
3f668b6c	34	#define D_LOG(...) qemu_log(__VA_ARGS__)
d12d51d5	35	#else
e2eef170	36	#define D(x)
d12d51d5 AL	37	#define D_LOG(...) do { } while (0)
d12d51d5 AL	38	#endif
e2eef170 PB	39
e2eef170 PB	40	#if !defined(CONFIG_USER_ONLY)
81fdc5f8 TS	41	/* Try to fill the TLB and return an exception if error. If retaddr is
	42	NULL, it means that the function was called in C code (i.e. not
	43	from generated code or from helper.c) */
d5a11fef	44	void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
20503968	45	uintptr_t retaddr)
81fdc5f8	46	{
d5a11fef AF	47	CRISCPU *cpu = CRIS_CPU(cs);
d5a11fef AF	48	CPUCRISState *env = &cpu->env;
81fdc5f8 TS	49	int ret;
81fdc5f8 TS	50
20503968	51	D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
ff057ccb	52	env->pc, env->pregs[PR_EDA], (void *)retaddr);
d5a11fef	53	ret = cris_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
551bd27f	54	if (unlikely(ret)) {
81fdc5f8 TS	55	if (retaddr) {
81fdc5f8 TS	56	/* now we have a real cpu fault */
3f38f309	57	if (cpu_restore_state(cs, retaddr)) {
30abcfc7	58	/* Evaluate flags after retranslation. */
febc9920	59	helper_top_evaluate_flags(env);
81fdc5f8 TS	60	}
81fdc5f8 TS	61	}
5638d180	62	cpu_loop_exit(cs);
81fdc5f8	63	}
81fdc5f8 TS	64	}
81fdc5f8 TS	65
e2eef170 PB	66	#endif
e2eef170 PB	67
febc9920	68	void helper_raise_exception(CPUCRISState *env, uint32_t index)
786c02f1	69	{
27103424 AF	70	CPUState *cs = CPU(cris_env_get_cpu(env));
	71
	72	cs->exception_index = index;
5638d180	73	cpu_loop_exit(cs);
786c02f1 EI	74	}
786c02f1 EI	75
febc9920	76	void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
cf1d97f0 EI	77	{
cf1d97f0 EI	78	#if !defined(CONFIG_USER_ONLY)
28de16da EI	79	pid &= 0xff;
	80	if (pid != (env->pregs[PR_PID] & 0xff))
	81	cris_mmu_flush_pid(env, env->pregs[PR_PID]);
cf1d97f0 EI	82	#endif
	83	}
	84
febc9920	85	void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
a1aebcb8 EI	86	{
a1aebcb8 EI	87	#if !defined(CONFIG_USER_ONLY)
31b030d4 AF	88	CRISCPU *cpu = cris_env_get_cpu(env);
	89	CPUState *cs = CPU(cpu);
	90
	91	tlb_flush_page(cs, env->pregs[PR_SPC]);
	92	tlb_flush_page(cs, new_spc);
a1aebcb8 EI	93	#endif
	94	}
	95
cf1d97f0 EI	96	/* Used by the tlb decoder. */
	97	#define EXTRACT_FIELD(src, start, end) \
	98	(((src) >> start) & ((1 << (end - start + 1)) - 1))
	99
febc9920	100	void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
dceaf394	101	{
31b030d4 AF	102	#if !defined(CONFIG_USER_ONLY)
	103	CRISCPU *cpu = cris_env_get_cpu(env);
	104	#endif
dceaf394 EI	105	uint32_t srs;
	106	srs = env->pregs[PR_SRS];
	107	srs &= 3;
	108	env->sregs[srs][sreg] = env->regs[reg];
	109
	110	#if !defined(CONFIG_USER_ONLY)
	111	if (srs == 1 \|\| srs == 2) {
	112	if (sreg == 6) {
	113	/* Writes to tlb-hi write to mm_cause as a side
	114	effect. */
6913ba56 EI	115	env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
6913ba56 EI	116	env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
dceaf394 EI	117	}
	118	else if (sreg == 5) {
	119	uint32_t set;
	120	uint32_t idx;
	121	uint32_t lo, hi;
	122	uint32_t vaddr;
cf1d97f0	123	int tlb_v;
dceaf394 EI	124
	125	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	126	set >>= 4;
	127	set &= 3;
	128
	129	idx &= 15;
	130	/* We've just made a write to tlb_lo. */
	131	lo = env->sregs[SFR_RW_MM_TLB_LO];
	132	/* Writes are done via r_mm_cause. */
	133	hi = env->sregs[SFR_R_MM_CAUSE];
cf1d97f0 EI	134
	135	vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
	136	13, 31);
	137	vaddr <<= TARGET_PAGE_BITS;
	138	tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
	139	3, 3);
dceaf394 EI	140	env->tlbsets[srs - 1][set][idx].lo = lo;
dceaf394 EI	141	env->tlbsets[srs - 1][set][idx].hi = hi;
cf1d97f0	142
d12d51d5 AL	143	D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
d12d51d5 AL	144	vaddr, tlb_v, env->pc);
3e18c6bf	145	if (tlb_v) {
31b030d4	146	tlb_flush_page(CPU(cpu), vaddr);
3e18c6bf	147	}
dceaf394 EI	148	}
	149	}
	150	#endif
	151	}
	152
febc9920	153	void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
dceaf394 EI	154	{
	155	uint32_t srs;
	156	env->pregs[PR_SRS] &= 3;
	157	srs = env->pregs[PR_SRS];
	158
	159	#if !defined(CONFIG_USER_ONLY)
	160	if (srs == 1 \|\| srs == 2)
	161	{
	162	uint32_t set;
	163	uint32_t idx;
	164	uint32_t lo, hi;
	165
	166	idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
	167	set >>= 4;
	168	set &= 3;
	169	idx &= 15;
	170
	171	/* Update the mirror regs. */
	172	hi = env->tlbsets[srs - 1][set][idx].hi;
	173	lo = env->tlbsets[srs - 1][set][idx].lo;
	174	env->sregs[SFR_RW_MM_TLB_HI] = hi;
	175	env->sregs[SFR_RW_MM_TLB_LO] = lo;
	176	}
	177	#endif
	178	env->regs[reg] = env->sregs[srs][sreg];
dceaf394 EI	179	}
dceaf394 EI	180
a1170bfd	181	static void cris_ccs_rshift(CPUCRISState *env)
dceaf394 EI	182	{
	183	uint32_t ccs;
	184
	185	/* Apply the ccs shift. */
	186	ccs = env->pregs[PR_CCS];
	187	ccs = (ccs & 0xc0000000) \| ((ccs & 0x0fffffff) >> 10);
	188	if (ccs & U_FLAG)
	189	{
	190	/* Enter user mode. */
	191	env->ksp = env->regs[R_SP];
	192	env->regs[R_SP] = env->pregs[PR_USP];
	193	}
	194
	195	env->pregs[PR_CCS] = ccs;
	196	}
	197
febc9920	198	void helper_rfe(CPUCRISState *env)
b41f7df0	199	{
bf443337 EI	200	int rflag = env->pregs[PR_CCS] & R_FLAG;
bf443337 EI	201
d12d51d5	202	D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
b41f7df0 EI	203	env->pregs[PR_ERP], env->pregs[PR_PID],
b41f7df0 EI	204	env->pregs[PR_CCS],
d12d51d5	205	env->btarget);
dceaf394 EI	206
	207	cris_ccs_rshift(env);
	208
	209	/* RFE sets the P_FLAG only if the R_FLAG is not set. */
bf443337	210	if (!rflag)
dceaf394	211	env->pregs[PR_CCS] \|= P_FLAG;
b41f7df0 EI	212	}
b41f7df0 EI	213
febc9920	214	void helper_rfn(CPUCRISState *env)
5bf8f1ab EI	215	{
	216	int rflag = env->pregs[PR_CCS] & R_FLAG;
	217
d12d51d5	218	D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
5bf8f1ab EI	219	env->pregs[PR_ERP], env->pregs[PR_PID],
5bf8f1ab EI	220	env->pregs[PR_CCS],
d12d51d5	221	env->btarget);
5bf8f1ab EI	222
	223	cris_ccs_rshift(env);
	224
	225	/* Set the P_FLAG only if the R_FLAG is not set. */
	226	if (!rflag)
	227	env->pregs[PR_CCS] \|= P_FLAG;
	228
8219314b LP	229	/* Always set the M flag. */
8219314b LP	230	env->pregs[PR_CCS] \|= M_FLAG_V32;
5bf8f1ab EI	231	}
5bf8f1ab EI	232
c38ac98d EI	233	uint32_t helper_lz(uint32_t t0)
	234	{
	235	return clz32(t0);
	236	}
	237
febc9920	238	uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
abd5c94e EI	239	{
	240	/* FIXME: clean this up. */
	241
	242	/* des ref:
	243	The N flag is set according to the selected bit in the dest reg.
	244	The Z flag is set if the selected bit and all bits to the right are
	245	zero.
	246	The X flag is cleared.
	247	Other flags are left untouched.
	248	The destination reg is not affected.*/
	249	unsigned int fz, sbit, bset, mask, masked_t0;
	250
	251	sbit = t1 & 31;
	252	bset = !!(t0 & (1 << sbit));
	253	mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
	254	masked_t0 = t0 & mask;
	255	fz = !(masked_t0 \| bset);
	256
	257	/* Clear the X, N and Z flags. */
	258	ccs = ccs & ~(X_FLAG \| N_FLAG \| Z_FLAG);
95475216 EI	259	if (env->pregs[PR_VR] < 32)
95475216 EI	260	ccs &= ~(V_FLAG \| C_FLAG);
abd5c94e EI	261	/* Set the N and Z flags accordingly. */
	262	ccs \|= (bset << 3) \| (fz << 2);
	263	return ccs;
	264	}
	265
febc9920 AJ	266	static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
febc9920 AJ	267	uint32_t flags, uint32_t ccs)
b41f7df0	268	{
a8cf66bb	269	unsigned int x, z, mask;
b41f7df0 EI	270
b41f7df0 EI	271	/* Extended arithmetics, leave the z flag alone. */
30abcfc7	272	x = env->cc_x;
a8cf66bb EI	273	mask = env->cc_mask \| X_FLAG;
	274	if (x) {
	275	z = flags & Z_FLAG;
	276	mask = mask & ~z;
	277	}
	278	flags &= mask;
b41f7df0 EI	279
b41f7df0 EI	280	/* all insn clear the x-flag except setf or clrf. */
6231868b EI	281	ccs &= ~mask;
	282	ccs \|= flags;
	283	return ccs;
b41f7df0 EI	284	}
b41f7df0 EI	285
febc9920 AJ	286	uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
febc9920 AJ	287	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	288	{
b41f7df0	289	uint32_t flags = 0;
dceaf394	290	int64_t tmp;
b41f7df0 EI	291	int dneg;
b41f7df0 EI	292
b41f7df0 EI	293	dneg = ((int32_t)res) < 0;
b41f7df0 EI	294
dceaf394 EI	295	tmp = mof;
	296	tmp <<= 32;
	297	tmp \|= res;
b41f7df0 EI	298	if (tmp == 0)
	299	flags \|= Z_FLAG;
	300	else if (tmp < 0)
	301	flags \|= N_FLAG;
	302	if ((dneg && mof != -1)
	303	\|\| (!dneg && mof != 0))
	304	flags \|= V_FLAG;
febc9920	305	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	306	}
b41f7df0 EI	307
febc9920 AJ	308	uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
febc9920 AJ	309	uint32_t ccs, uint32_t res, uint32_t mof)
b41f7df0	310	{
b41f7df0	311	uint32_t flags = 0;
dceaf394	312	uint64_t tmp;
b41f7df0	313
dceaf394 EI	314	tmp = mof;
	315	tmp <<= 32;
	316	tmp \|= res;
b41f7df0 EI	317	if (tmp == 0)
	318	flags \|= Z_FLAG;
	319	else if (tmp >> 63)
	320	flags \|= N_FLAG;
	321	if (mof)
	322	flags \|= V_FLAG;
	323
febc9920	324	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	325	}
b41f7df0 EI	326
febc9920	327	uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
6231868b	328	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	329	{
b41f7df0 EI	330	uint32_t flags = 0;
b41f7df0 EI	331
6231868b EI	332	src = src & 0x80000000;
6231868b EI	333	dst = dst & 0x80000000;
b41f7df0 EI	334
	335	if ((res & 0x80000000L) != 0L)
	336	{
	337	flags \|= N_FLAG;
a8cf66bb	338	if (!src && !dst)
b41f7df0	339	flags \|= V_FLAG;
a8cf66bb	340	else if (src & dst)
b41f7df0	341	flags \|= R_FLAG;
b41f7df0 EI	342	}
	343	else
	344	{
	345	if (res == 0L)
	346	flags \|= Z_FLAG;
a8cf66bb	347	if (src & dst)
b41f7df0	348	flags \|= V_FLAG;
a8cf66bb	349	if (dst \| src)
b41f7df0 EI	350	flags \|= R_FLAG;
	351	}
	352
febc9920	353	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	354	}
b41f7df0 EI	355
febc9920	356	uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
6231868b	357	uint32_t src, uint32_t dst, uint32_t res)
b41f7df0	358	{
b41f7df0 EI	359	uint32_t flags = 0;
b41f7df0 EI	360
6231868b EI	361	src = src & 0x80000000;
6231868b EI	362	dst = dst & 0x80000000;
30abcfc7	363
a8cf66bb	364	if ((res & 0x80000000L) != 0L)
30abcfc7	365	{
a8cf66bb EI	366	flags \|= N_FLAG;
	367	if (!src && !dst)
	368	flags \|= V_FLAG;
	369	else if (src & dst)
	370	flags \|= C_FLAG;
	371	}
	372	else
	373	{
	374	if (res == 0L)
	375	flags \|= Z_FLAG;
	376	if (src & dst)
	377	flags \|= V_FLAG;
	378	if (dst \| src)
	379	flags \|= C_FLAG;
30abcfc7 EI	380	}
30abcfc7 EI	381
febc9920	382	return evaluate_flags_writeback(env, flags, ccs);
a8cf66bb EI	383	}
a8cf66bb EI	384
febc9920	385	uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
6231868b	386	uint32_t src, uint32_t dst, uint32_t res)
a8cf66bb	387	{
a8cf66bb EI	388	uint32_t flags = 0;
a8cf66bb EI	389
6231868b EI	390	src = (~src) & 0x80000000;
6231868b EI	391	dst = dst & 0x80000000;
b41f7df0 EI	392
	393	if ((res & 0x80000000L) != 0L)
	394	{
	395	flags \|= N_FLAG;
a8cf66bb	396	if (!src && !dst)
b41f7df0	397	flags \|= V_FLAG;
a8cf66bb	398	else if (src & dst)
b41f7df0	399	flags \|= C_FLAG;
b41f7df0 EI	400	}
	401	else
	402	{
	403	if (res == 0L)
	404	flags \|= Z_FLAG;
a8cf66bb	405	if (src & dst)
b41f7df0	406	flags \|= V_FLAG;
a8cf66bb	407	if (dst \| src)
b41f7df0 EI	408	flags \|= C_FLAG;
	409	}
	410
a8cf66bb	411	flags ^= C_FLAG;
febc9920	412	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	413	}
b41f7df0 EI	414
febc9920 AJ	415	uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
febc9920 AJ	416	uint32_t ccs, uint32_t res)
b41f7df0	417	{
b41f7df0 EI	418	uint32_t flags = 0;
b41f7df0 EI	419
b41f7df0 EI	420	if ((int32_t)res < 0)
	421	flags \|= N_FLAG;
	422	else if (res == 0L)
	423	flags \|= Z_FLAG;
	424
febc9920	425	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0	426	}
febc9920 AJ	427	uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
febc9920 AJ	428	uint32_t ccs, uint32_t res)
b41f7df0	429	{
b41f7df0	430	uint32_t flags = 0;
b41f7df0 EI	431
	432	if ((int16_t)res < 0L)
	433	flags \|= N_FLAG;
	434	else if (res == 0)
	435	flags \|= Z_FLAG;
	436
febc9920	437	return evaluate_flags_writeback(env, flags, ccs);
b41f7df0 EI	438	}
	439
	440	/* TODO: This is expensive. We could split things up and only evaluate part of
	441	CCR on a need to know basis. For now, we simply re-evaluate everything. */
febc9920	442	void helper_evaluate_flags(CPUCRISState *env)
b41f7df0	443	{
6231868b	444	uint32_t src, dst, res;
b41f7df0 EI	445	uint32_t flags = 0;
	446
	447	src = env->cc_src;
	448	dst = env->cc_dest;
	449	res = env->cc_result;
	450
30abcfc7 EI	451	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
30abcfc7 EI	452	src = ~src;
b41f7df0 EI	453
	454	/* Now, evaluate the flags. This stuff is based on
	455	Per Zander's CRISv10 simulator. */
	456	switch (env->cc_size)
	457	{
	458	case 1:
	459	if ((res & 0x80L) != 0L)
	460	{
	461	flags \|= N_FLAG;
	462	if (((src & 0x80L) == 0L)
	463	&& ((dst & 0x80L) == 0L))
	464	{
	465	flags \|= V_FLAG;
	466	}
	467	else if (((src & 0x80L) != 0L)
	468	&& ((dst & 0x80L) != 0L))
	469	{
	470	flags \|= C_FLAG;
	471	}
	472	}
	473	else
	474	{
	475	if ((res & 0xFFL) == 0L)
	476	{
	477	flags \|= Z_FLAG;
	478	}
	479	if (((src & 0x80L) != 0L)
	480	&& ((dst & 0x80L) != 0L))
	481	{
	482	flags \|= V_FLAG;
	483	}
	484	if ((dst & 0x80L) != 0L
	485	\|\| (src & 0x80L) != 0L)
	486	{
	487	flags \|= C_FLAG;
	488	}
	489	}
	490	break;
	491	case 2:
	492	if ((res & 0x8000L) != 0L)
	493	{
	494	flags \|= N_FLAG;
	495	if (((src & 0x8000L) == 0L)
	496	&& ((dst & 0x8000L) == 0L))
	497	{
	498	flags \|= V_FLAG;
	499	}
	500	else if (((src & 0x8000L) != 0L)
	501	&& ((dst & 0x8000L) != 0L))
	502	{
	503	flags \|= C_FLAG;
	504	}
	505	}
	506	else
	507	{
	508	if ((res & 0xFFFFL) == 0L)
	509	{
	510	flags \|= Z_FLAG;
	511	}
	512	if (((src & 0x8000L) != 0L)
	513	&& ((dst & 0x8000L) != 0L))
	514	{
	515	flags \|= V_FLAG;
	516	}
517	if ((dst & 0x8000L) != 0L
518	\|\| (src & 0x8000L) != 0L)
519	{
520	flags \|= C_FLAG;
521	}
522	}
523	break;
524	case 4:
525	if ((res & 0x80000000L) != 0L)
526	{
527	flags \|= N_FLAG;
528	if (((src & 0x80000000L) == 0L)
529	&& ((dst & 0x80000000L) == 0L))
530	{
531	flags \|= V_FLAG;
532	}
533	else if (((src & 0x80000000L) != 0L) &&
534	((dst & 0x80000000L) != 0L))
535	{
536	flags \|= C_FLAG;
537	}
538	}
539	else
540	{
541	if (res == 0L)
542	flags \|= Z_FLAG;
543	if (((src & 0x80000000L) != 0L)
544	&& ((dst & 0x80000000L) != 0L))
545	flags \|= V_FLAG;
546	if ((dst & 0x80000000L) != 0L
547	\|\| (src & 0x80000000L) != 0L)
548	flags \|= C_FLAG;
549	}
550	break;
551	default:
552	break;
553	}
554
6231868b	555	if (env->cc_op == CC_OP_SUB \|\| env->cc_op == CC_OP_CMP)
b41f7df0	556	flags ^= C_FLAG;
6231868b	557
febc9920 AJ	558	env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
febc9920 AJ	559	env->pregs[PR_CCS]);
b41f7df0	560	}
30abcfc7	561
febc9920	562	void helper_top_evaluate_flags(CPUCRISState *env)
30abcfc7 EI	563	{
	564	switch (env->cc_op)
	565	{
	566	case CC_OP_MCP:
febc9920	567	env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
6231868b EI	568	env->pregs[PR_CCS], env->cc_src,
6231868b EI	569	env->cc_dest, env->cc_result);
30abcfc7 EI	570	break;
30abcfc7 EI	571	case CC_OP_MULS:
febc9920	572	env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
6231868b EI	573	env->pregs[PR_CCS], env->cc_result,
6231868b EI	574	env->pregs[PR_MOF]);
30abcfc7 EI	575	break;
30abcfc7 EI	576	case CC_OP_MULU:
febc9920	577	env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
6231868b EI	578	env->pregs[PR_CCS], env->cc_result,
6231868b EI	579	env->pregs[PR_MOF]);
30abcfc7 EI	580	break;
	581	case CC_OP_MOVE:
	582	case CC_OP_AND:
	583	case CC_OP_OR:
	584	case CC_OP_XOR:
	585	case CC_OP_ASR:
	586	case CC_OP_LSR:
	587	case CC_OP_LSL:
6231868b EI	588	switch (env->cc_size)
	589	{
	590	case 4:
	591	env->pregs[PR_CCS] =
febc9920	592	helper_evaluate_flags_move_4(env,
6231868b EI	593	env->pregs[PR_CCS],
	594	env->cc_result);
	595	break;
	596	case 2:
	597	env->pregs[PR_CCS] =
febc9920	598	helper_evaluate_flags_move_2(env,
6231868b EI	599	env->pregs[PR_CCS],
	600	env->cc_result);
	601	break;
	602	default:
febc9920	603	helper_evaluate_flags(env);
6231868b EI	604	break;
	605	}
	606	break;
30abcfc7 EI	607	case CC_OP_FLAGS:
	608	/* live. */
	609	break;
a8cf66bb EI	610	case CC_OP_SUB:
	611	case CC_OP_CMP:
	612	if (env->cc_size == 4)
6231868b	613	env->pregs[PR_CCS] =
febc9920	614	helper_evaluate_flags_sub_4(env,
6231868b EI	615	env->pregs[PR_CCS],
	616	env->cc_src, env->cc_dest,
	617	env->cc_result);
a8cf66bb	618	else
febc9920	619	helper_evaluate_flags(env);
a8cf66bb	620	break;
30abcfc7 EI	621	default:
	622	{
	623	switch (env->cc_size)
	624	{
6231868b EI	625	case 4:
6231868b EI	626	env->pregs[PR_CCS] =
febc9920	627	helper_evaluate_flags_alu_4(env,
6231868b EI	628	env->pregs[PR_CCS],
	629	env->cc_src, env->cc_dest,
	630	env->cc_result);
	631	break;
	632	default:
febc9920	633	helper_evaluate_flags(env);
6231868b	634	break;
30abcfc7 EI	635	}
	636	}
	637	break;
	638	}
	639	}