[mirror_qemu.git] / target-i386 / arch_dump.c

/*
 * i386 memory mapping
 *
 * Copyright Fujitsu, Corp. 2011, 2012
 *
 * Authors:
 *     Wen Congyang <wency@cn.fujitsu.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2 or later.
 * See the COPYING file in the top-level directory.
 *
 */

#include "cpu.h"
#include "exec/cpu-all.h"
#include "sysemu/dump.h"
#include "elf.h"
#include "sysemu/memory_mapping.h"

#ifdef TARGET_X86_64
typedef struct {
    target_ulong r15, r14, r13, r12, rbp, rbx, r11, r10;
    target_ulong r9, r8, rax, rcx, rdx, rsi, rdi, orig_rax;
    target_ulong rip, cs, eflags;
    target_ulong rsp, ss;
    target_ulong fs_base, gs_base;
    target_ulong ds, es, fs, gs;
} x86_64_user_regs_struct;

typedef struct {
    char pad1[32];
    uint32_t pid;
    char pad2[76];
    x86_64_user_regs_struct regs;
    char pad3[8];
} x86_64_elf_prstatus;

static int x86_64_write_elf64_note(WriteCoreDumpFunction f,
                                   CPUX86State *env, int id,
                                   void *opaque)
{
    x86_64_user_regs_struct regs;
    Elf64_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    regs.r15 = env->regs[15];
    regs.r14 = env->regs[14];
    regs.r13 = env->regs[13];
    regs.r12 = env->regs[12];
    regs.r11 = env->regs[11];
    regs.r10 = env->regs[10];
    regs.r9  = env->regs[9];
    regs.r8  = env->regs[8];
    regs.rbp = env->regs[R_EBP];
    regs.rsp = env->regs[R_ESP];
    regs.rdi = env->regs[R_EDI];
    regs.rsi = env->regs[R_ESI];
    regs.rdx = env->regs[R_EDX];
    regs.rcx = env->regs[R_ECX];
    regs.rbx = env->regs[R_EBX];
    regs.rax = env->regs[R_EAX];
    regs.rip = env->eip;
    regs.eflags = env->eflags;

    regs.orig_rax = 0; /* FIXME */
    regs.cs = env->segs[R_CS].selector;
    regs.ss = env->segs[R_SS].selector;
    regs.fs_base = env->segs[R_FS].base;
    regs.gs_base = env->segs[R_GS].base;
    regs.ds = env->segs[R_DS].selector;
    regs.es = env->segs[R_ES].selector;
    regs.fs = env->segs[R_FS].selector;
    regs.gs = env->segs[R_GS].selector;

    descsz = sizeof(x86_64_elf_prstatus);
    note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf + 32, &id, 4); /* pr_pid */
    buf += descsz - sizeof(x86_64_user_regs_struct)-sizeof(target_ulong);
    memcpy(buf, &regs, sizeof(x86_64_user_regs_struct));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}
#endif

typedef struct {
    uint32_t ebx, ecx, edx, esi, edi, ebp, eax;
    unsigned short ds, __ds, es, __es;
    unsigned short fs, __fs, gs, __gs;
    uint32_t orig_eax, eip;
    unsigned short cs, __cs;
    uint32_t eflags, esp;
    unsigned short ss, __ss;
} x86_user_regs_struct;

typedef struct {
    char pad1[24];
    uint32_t pid;
    char pad2[44];
    x86_user_regs_struct regs;
    char pad3[4];
} x86_elf_prstatus;

static void x86_fill_elf_prstatus(x86_elf_prstatus *prstatus, CPUX86State *env,
                                  int id)
{
    memset(prstatus, 0, sizeof(x86_elf_prstatus));
    prstatus->regs.ebp = env->regs[R_EBP] & 0xffffffff;
    prstatus->regs.esp = env->regs[R_ESP] & 0xffffffff;
    prstatus->regs.edi = env->regs[R_EDI] & 0xffffffff;
    prstatus->regs.esi = env->regs[R_ESI] & 0xffffffff;
    prstatus->regs.edx = env->regs[R_EDX] & 0xffffffff;
    prstatus->regs.ecx = env->regs[R_ECX] & 0xffffffff;
    prstatus->regs.ebx = env->regs[R_EBX] & 0xffffffff;
    prstatus->regs.eax = env->regs[R_EAX] & 0xffffffff;
    prstatus->regs.eip = env->eip & 0xffffffff;
    prstatus->regs.eflags = env->eflags & 0xffffffff;

    prstatus->regs.cs = env->segs[R_CS].selector;
    prstatus->regs.ss = env->segs[R_SS].selector;
    prstatus->regs.ds = env->segs[R_DS].selector;
    prstatus->regs.es = env->segs[R_ES].selector;
    prstatus->regs.fs = env->segs[R_FS].selector;
    prstatus->regs.gs = env->segs[R_GS].selector;

    prstatus->pid = id;
}

static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUX86State *env,
                                int id, void *opaque)
{
    x86_elf_prstatus prstatus;
    Elf64_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    x86_fill_elf_prstatus(&prstatus, env, id);
    descsz = sizeof(x86_elf_prstatus);
    note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &prstatus, sizeof(prstatus));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
                             int cpuid, void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);
    int ret;
#ifdef TARGET_X86_64
    X86CPU *first_x86_cpu = X86_CPU(first_cpu);
    bool lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);

    if (lma) {
        ret = x86_64_write_elf64_note(f, &cpu->env, cpuid, opaque);
    } else {
#endif
        ret = x86_write_elf64_note(f, &cpu->env, cpuid, opaque);
#ifdef TARGET_X86_64
    }
#endif

    return ret;
}

int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
                             int cpuid, void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);
    x86_elf_prstatus prstatus;
    Elf32_Nhdr *note;
    char *buf;
    int descsz, note_size, name_size = 5;
    const char *name = "CORE";
    int ret;

    x86_fill_elf_prstatus(&prstatus, &cpu->env, cpuid);
    descsz = sizeof(x86_elf_prstatus);
    note_size = ((sizeof(Elf32_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    note->n_namesz = cpu_to_le32(name_size);
    note->n_descsz = cpu_to_le32(descsz);
    note->n_type = cpu_to_le32(NT_PRSTATUS);
    buf = (char *)note;
    buf += ((sizeof(Elf32_Nhdr) + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &prstatus, sizeof(prstatus));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

/*
 * please count up QEMUCPUSTATE_VERSION if you have changed definition of
 * QEMUCPUState, and modify the tools using this information accordingly.
 */
#define QEMUCPUSTATE_VERSION (1)

struct QEMUCPUSegment {
    uint32_t selector;
    uint32_t limit;
    uint32_t flags;
    uint32_t pad;
    uint64_t base;
};

typedef struct QEMUCPUSegment QEMUCPUSegment;

struct QEMUCPUState {
    uint32_t version;
    uint32_t size;
    uint64_t rax, rbx, rcx, rdx, rsi, rdi, rsp, rbp;
    uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
    uint64_t rip, rflags;
    QEMUCPUSegment cs, ds, es, fs, gs, ss;
    QEMUCPUSegment ldt, tr, gdt, idt;
    uint64_t cr[5];
};

typedef struct QEMUCPUState QEMUCPUState;

static void copy_segment(QEMUCPUSegment *d, SegmentCache *s)
{
    d->pad = 0;
    d->selector = s->selector;
    d->limit = s->limit;
    d->flags = s->flags;
    d->base = s->base;
}

static void qemu_get_cpustate(QEMUCPUState *s, CPUX86State *env)
{
    memset(s, 0, sizeof(QEMUCPUState));

    s->version = QEMUCPUSTATE_VERSION;
    s->size = sizeof(QEMUCPUState);

    s->rax = env->regs[R_EAX];
    s->rbx = env->regs[R_EBX];
    s->rcx = env->regs[R_ECX];
    s->rdx = env->regs[R_EDX];
    s->rsi = env->regs[R_ESI];
    s->rdi = env->regs[R_EDI];
    s->rsp = env->regs[R_ESP];
    s->rbp = env->regs[R_EBP];
#ifdef TARGET_X86_64
    s->r8  = env->regs[8];
    s->r9  = env->regs[9];
    s->r10 = env->regs[10];
    s->r11 = env->regs[11];
    s->r12 = env->regs[12];
    s->r13 = env->regs[13];
    s->r14 = env->regs[14];
    s->r15 = env->regs[15];
#endif
    s->rip = env->eip;
    s->rflags = env->eflags;

    copy_segment(&s->cs, &env->segs[R_CS]);
    copy_segment(&s->ds, &env->segs[R_DS]);
    copy_segment(&s->es, &env->segs[R_ES]);
    copy_segment(&s->fs, &env->segs[R_FS]);
    copy_segment(&s->gs, &env->segs[R_GS]);
    copy_segment(&s->ss, &env->segs[R_SS]);
    copy_segment(&s->ldt, &env->ldt);
    copy_segment(&s->tr, &env->tr);
    copy_segment(&s->gdt, &env->gdt);
    copy_segment(&s->idt, &env->idt);

    s->cr[0] = env->cr[0];
    s->cr[1] = env->cr[1];
    s->cr[2] = env->cr[2];
    s->cr[3] = env->cr[3];
    s->cr[4] = env->cr[4];
}

static inline int cpu_write_qemu_note(WriteCoreDumpFunction f,
                                      CPUX86State *env,
                                      void *opaque,
                                      int type)
{
    QEMUCPUState state;
    Elf64_Nhdr *note64;
    Elf32_Nhdr *note32;
    void *note;
    char *buf;
    int descsz, note_size, name_size = 5, note_head_size;
    const char *name = "QEMU";
    int ret;

    qemu_get_cpustate(&state, env);

    descsz = sizeof(state);
    if (type == 0) {
        note_head_size = sizeof(Elf32_Nhdr);
    } else {
        note_head_size = sizeof(Elf64_Nhdr);
    }
    note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                (descsz + 3) / 4) * 4;
    note = g_malloc0(note_size);
    if (type == 0) {
        note32 = note;
        note32->n_namesz = cpu_to_le32(name_size);
        note32->n_descsz = cpu_to_le32(descsz);
        note32->n_type = 0;
    } else {
        note64 = note;
        note64->n_namesz = cpu_to_le32(name_size);
        note64->n_descsz = cpu_to_le32(descsz);
        note64->n_type = 0;
    }
    buf = note;
    buf += ((note_head_size + 3) / 4) * 4;
    memcpy(buf, name, name_size);
    buf += ((name_size + 3) / 4) * 4;
    memcpy(buf, &state, sizeof(state));

    ret = f(note, note_size, opaque);
    g_free(note);
    if (ret < 0) {
        return -1;
    }

    return 0;
}

int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cs,
                                 void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);

    return cpu_write_qemu_note(f, &cpu->env, opaque, 1);
}

int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cs,
                                 void *opaque)
{
    X86CPU *cpu = X86_CPU(cs);

    return cpu_write_qemu_note(f, &cpu->env, opaque, 0);
}

int cpu_get_dump_info(ArchDumpInfo *info,
                      const GuestPhysBlockList *guest_phys_blocks)
{
    bool lma = false;
    GuestPhysBlock *block;

#ifdef TARGET_X86_64
    X86CPU *first_x86_cpu = X86_CPU(first_cpu);

    lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);
#endif

    if (lma) {
        info->d_machine = EM_X86_64;
    } else {
        info->d_machine = EM_386;
    }
    info->d_endian = ELFDATA2LSB;

    if (lma) {
        info->d_class = ELFCLASS64;
    } else {
        info->d_class = ELFCLASS32;

        QTAILQ_FOREACH(block, &guest_phys_blocks->head, next) {
            if (block->target_end > UINT_MAX) {
                /* The memory size is greater than 4G */
                info->d_class = ELFCLASS64;
                break;
            }
        }
    }

    return 0;
}

ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
{
    int name_size = 5; /* "CORE" or "QEMU" */
    size_t elf_note_size = 0;
    size_t qemu_note_size = 0;
    int elf_desc_size = 0;
    int qemu_desc_size = 0;
    int note_head_size;

    if (class == ELFCLASS32) {
        note_head_size = sizeof(Elf32_Nhdr);
    } else {
        note_head_size = sizeof(Elf64_Nhdr);
    }

    if (machine == EM_386) {
        elf_desc_size = sizeof(x86_elf_prstatus);
    }
#ifdef TARGET_X86_64
    else {
        elf_desc_size = sizeof(x86_64_elf_prstatus);
    }
#endif
    qemu_desc_size = sizeof(QEMUCPUState);

    elf_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                     (elf_desc_size + 3) / 4) * 4;
    qemu_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
                      (qemu_desc_size + 3) / 4) * 4;

    return (elf_note_size + qemu_note_size) * nr_cpus;
}
Commit	Line	Data
9fecbed0 WC	1	/*
	2	* i386 memory mapping
	3	*
	4	* Copyright Fujitsu, Corp. 2011, 2012
	5	*
	6	* Authors:
	7	* Wen Congyang <wency@cn.fujitsu.com>
	8	*
fc0608ac SW	9	* This work is licensed under the terms of the GNU GPL, version 2 or later.
fc0608ac SW	10	* See the COPYING file in the top-level directory.
9fecbed0 WC	11	*
	12	*/
	13
	14	#include "cpu.h"
022c62cb	15	#include "exec/cpu-all.h"
9c17d615	16	#include "sysemu/dump.h"
9fecbed0	17	#include "elf.h"
56c4bfb3	18	#include "sysemu/memory_mapping.h"
9fecbed0 WC	19
	20	#ifdef TARGET_X86_64
	21	typedef struct {
	22	target_ulong r15, r14, r13, r12, rbp, rbx, r11, r10;
	23	target_ulong r9, r8, rax, rcx, rdx, rsi, rdi, orig_rax;
	24	target_ulong rip, cs, eflags;
	25	target_ulong rsp, ss;
	26	target_ulong fs_base, gs_base;
	27	target_ulong ds, es, fs, gs;
	28	} x86_64_user_regs_struct;
	29
	30	typedef struct {
	31	char pad1[32];
	32	uint32_t pid;
	33	char pad2[76];
	34	x86_64_user_regs_struct regs;
	35	char pad3[8];
	36	} x86_64_elf_prstatus;
	37
c72bf468	38	static int x86_64_write_elf64_note(WriteCoreDumpFunction f,
369ff018	39	CPUX86State *env, int id,
9fecbed0 WC	40	void *opaque)
	41	{
	42	x86_64_user_regs_struct regs;
	43	Elf64_Nhdr *note;
	44	char *buf;
	45	int descsz, note_size, name_size = 5;
	46	const char *name = "CORE";
	47	int ret;
	48
	49	regs.r15 = env->regs[15];
	50	regs.r14 = env->regs[14];
	51	regs.r13 = env->regs[13];
	52	regs.r12 = env->regs[12];
	53	regs.r11 = env->regs[11];
	54	regs.r10 = env->regs[10];
	55	regs.r9 = env->regs[9];
	56	regs.r8 = env->regs[8];
	57	regs.rbp = env->regs[R_EBP];
	58	regs.rsp = env->regs[R_ESP];
	59	regs.rdi = env->regs[R_EDI];
	60	regs.rsi = env->regs[R_ESI];
	61	regs.rdx = env->regs[R_EDX];
	62	regs.rcx = env->regs[R_ECX];
	63	regs.rbx = env->regs[R_EBX];
	64	regs.rax = env->regs[R_EAX];
	65	regs.rip = env->eip;
	66	regs.eflags = env->eflags;
	67
	68	regs.orig_rax = 0; /* FIXME */
	69	regs.cs = env->segs[R_CS].selector;
	70	regs.ss = env->segs[R_SS].selector;
	71	regs.fs_base = env->segs[R_FS].base;
	72	regs.gs_base = env->segs[R_GS].base;
	73	regs.ds = env->segs[R_DS].selector;
	74	regs.es = env->segs[R_ES].selector;
	75	regs.fs = env->segs[R_FS].selector;
	76	regs.gs = env->segs[R_GS].selector;
	77
	78	descsz = sizeof(x86_64_elf_prstatus);
	79	note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	80	(descsz + 3) / 4) * 4;
4be34d1e	81	note = g_malloc0(note_size);
9fecbed0 WC	82	note->n_namesz = cpu_to_le32(name_size);
	83	note->n_descsz = cpu_to_le32(descsz);
	84	note->n_type = cpu_to_le32(NT_PRSTATUS);
	85	buf = (char *)note;
	86	buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
	87	memcpy(buf, name, name_size);
	88	buf += ((name_size + 3) / 4) * 4;
	89	memcpy(buf + 32, &id, 4); /* pr_pid */
	90	buf += descsz - sizeof(x86_64_user_regs_struct)-sizeof(target_ulong);
	91	memcpy(buf, &regs, sizeof(x86_64_user_regs_struct));
	92
	93	ret = f(note, note_size, opaque);
	94	g_free(note);
	95	if (ret < 0) {
	96	return -1;
	97	}
	98
	99	return 0;
	100	}
	101	#endif
	102
	103	typedef struct {
	104	uint32_t ebx, ecx, edx, esi, edi, ebp, eax;
	105	unsigned short ds, __ds, es, __es;
	106	unsigned short fs, __fs, gs, __gs;
	107	uint32_t orig_eax, eip;
	108	unsigned short cs, __cs;
	109	uint32_t eflags, esp;
	110	unsigned short ss, __ss;
	111	} x86_user_regs_struct;
	112
	113	typedef struct {
	114	char pad1[24];
	115	uint32_t pid;
	116	char pad2[44];
	117	x86_user_regs_struct regs;
	118	char pad3[4];
	119	} x86_elf_prstatus;
	120
369ff018	121	static void x86_fill_elf_prstatus(x86_elf_prstatus prstatus, CPUX86State env,
9fecbed0 WC	122	int id)
	123	{
	124	memset(prstatus, 0, sizeof(x86_elf_prstatus));
	125	prstatus->regs.ebp = env->regs[R_EBP] & 0xffffffff;
	126	prstatus->regs.esp = env->regs[R_ESP] & 0xffffffff;
	127	prstatus->regs.edi = env->regs[R_EDI] & 0xffffffff;
	128	prstatus->regs.esi = env->regs[R_ESI] & 0xffffffff;
	129	prstatus->regs.edx = env->regs[R_EDX] & 0xffffffff;
	130	prstatus->regs.ecx = env->regs[R_ECX] & 0xffffffff;
	131	prstatus->regs.ebx = env->regs[R_EBX] & 0xffffffff;
	132	prstatus->regs.eax = env->regs[R_EAX] & 0xffffffff;
	133	prstatus->regs.eip = env->eip & 0xffffffff;
	134	prstatus->regs.eflags = env->eflags & 0xffffffff;
	135
	136	prstatus->regs.cs = env->segs[R_CS].selector;
	137	prstatus->regs.ss = env->segs[R_SS].selector;
	138	prstatus->regs.ds = env->segs[R_DS].selector;
	139	prstatus->regs.es = env->segs[R_ES].selector;
	140	prstatus->regs.fs = env->segs[R_FS].selector;
	141	prstatus->regs.gs = env->segs[R_GS].selector;
	142
	143	prstatus->pid = id;
	144	}
	145
369ff018	146	static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUX86State *env,
9fecbed0 WC	147	int id, void *opaque)
	148	{
	149	x86_elf_prstatus prstatus;
	150	Elf64_Nhdr *note;
	151	char *buf;
	152	int descsz, note_size, name_size = 5;
	153	const char *name = "CORE";
	154	int ret;
	155
	156	x86_fill_elf_prstatus(&prstatus, env, id);
	157	descsz = sizeof(x86_elf_prstatus);
	158	note_size = ((sizeof(Elf64_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	159	(descsz + 3) / 4) * 4;
4be34d1e	160	note = g_malloc0(note_size);
9fecbed0 WC	161	note->n_namesz = cpu_to_le32(name_size);
	162	note->n_descsz = cpu_to_le32(descsz);
	163	note->n_type = cpu_to_le32(NT_PRSTATUS);
	164	buf = (char *)note;
	165	buf += ((sizeof(Elf64_Nhdr) + 3) / 4) * 4;
	166	memcpy(buf, name, name_size);
	167	buf += ((name_size + 3) / 4) * 4;
	168	memcpy(buf, &prstatus, sizeof(prstatus));
	169
	170	ret = f(note, note_size, opaque);
	171	g_free(note);
	172	if (ret < 0) {
	173	return -1;
	174	}
	175
	176	return 0;
	177	}
	178
c72bf468 JF	179	int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	180	int cpuid, void *opaque)
9fecbed0	181	{
c72bf468	182	X86CPU *cpu = X86_CPU(cs);
9fecbed0 WC	183	int ret;
9fecbed0 WC	184	#ifdef TARGET_X86_64
182735ef AF	185	X86CPU *first_x86_cpu = X86_CPU(first_cpu);
182735ef AF	186	bool lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);
9fecbed0 WC	187
9fecbed0 WC	188	if (lma) {
c72bf468	189	ret = x86_64_write_elf64_note(f, &cpu->env, cpuid, opaque);
9fecbed0 WC	190	} else {
9fecbed0 WC	191	#endif
c72bf468	192	ret = x86_write_elf64_note(f, &cpu->env, cpuid, opaque);
9fecbed0 WC	193	#ifdef TARGET_X86_64
	194	}
	195	#endif
	196
	197	return ret;
	198	}
	199
c72bf468 JF	200	int x86_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	201	int cpuid, void *opaque)
9fecbed0	202	{
c72bf468	203	X86CPU *cpu = X86_CPU(cs);
9fecbed0 WC	204	x86_elf_prstatus prstatus;
	205	Elf32_Nhdr *note;
	206	char *buf;
	207	int descsz, note_size, name_size = 5;
	208	const char *name = "CORE";
	209	int ret;
	210
c72bf468	211	x86_fill_elf_prstatus(&prstatus, &cpu->env, cpuid);
9fecbed0 WC	212	descsz = sizeof(x86_elf_prstatus);
	213	note_size = ((sizeof(Elf32_Nhdr) + 3) / 4 + (name_size + 3) / 4 +
	214	(descsz + 3) / 4) * 4;
4be34d1e	215	note = g_malloc0(note_size);
9fecbed0 WC	216	note->n_namesz = cpu_to_le32(name_size);
	217	note->n_descsz = cpu_to_le32(descsz);
	218	note->n_type = cpu_to_le32(NT_PRSTATUS);
	219	buf = (char *)note;
	220	buf += ((sizeof(Elf32_Nhdr) + 3) / 4) * 4;
	221	memcpy(buf, name, name_size);
	222	buf += ((name_size + 3) / 4) * 4;
	223	memcpy(buf, &prstatus, sizeof(prstatus));
	224
	225	ret = f(note, note_size, opaque);
	226	g_free(note);
	227	if (ret < 0) {
	228	return -1;
	229	}
	230
	231	return 0;
	232	}
90166b71 WC	233
	234	/*
	235	* please count up QEMUCPUSTATE_VERSION if you have changed definition of
	236	* QEMUCPUState, and modify the tools using this information accordingly.
	237	*/
	238	#define QEMUCPUSTATE_VERSION (1)
	239
	240	struct QEMUCPUSegment {
	241	uint32_t selector;
	242	uint32_t limit;
	243	uint32_t flags;
	244	uint32_t pad;
	245	uint64_t base;
	246	};
	247
	248	typedef struct QEMUCPUSegment QEMUCPUSegment;
	249
	250	struct QEMUCPUState {
	251	uint32_t version;
	252	uint32_t size;
	253	uint64_t rax, rbx, rcx, rdx, rsi, rdi, rsp, rbp;
	254	uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
	255	uint64_t rip, rflags;
	256	QEMUCPUSegment cs, ds, es, fs, gs, ss;
	257	QEMUCPUSegment ldt, tr, gdt, idt;
	258	uint64_t cr[5];
	259	};
	260
	261	typedef struct QEMUCPUState QEMUCPUState;
	262
	263	static void copy_segment(QEMUCPUSegment d, SegmentCache s)
	264	{
	265	d->pad = 0;
	266	d->selector = s->selector;
	267	d->limit = s->limit;
	268	d->flags = s->flags;
	269	d->base = s->base;
	270	}
	271
369ff018	272	static void qemu_get_cpustate(QEMUCPUState s, CPUX86State env)
90166b71 WC	273	{
	274	memset(s, 0, sizeof(QEMUCPUState));
	275
	276	s->version = QEMUCPUSTATE_VERSION;
	277	s->size = sizeof(QEMUCPUState);
	278
	279	s->rax = env->regs[R_EAX];
	280	s->rbx = env->regs[R_EBX];
	281	s->rcx = env->regs[R_ECX];
	282	s->rdx = env->regs[R_EDX];
	283	s->rsi = env->regs[R_ESI];
	284	s->rdi = env->regs[R_EDI];
	285	s->rsp = env->regs[R_ESP];
	286	s->rbp = env->regs[R_EBP];
	287	#ifdef TARGET_X86_64
	288	s->r8 = env->regs[8];
	289	s->r9 = env->regs[9];
	290	s->r10 = env->regs[10];
	291	s->r11 = env->regs[11];
	292	s->r12 = env->regs[12];
	293	s->r13 = env->regs[13];
	294	s->r14 = env->regs[14];
	295	s->r15 = env->regs[15];
	296	#endif
	297	s->rip = env->eip;
	298	s->rflags = env->eflags;
	299
	300	copy_segment(&s->cs, &env->segs[R_CS]);
	301	copy_segment(&s->ds, &env->segs[R_DS]);
	302	copy_segment(&s->es, &env->segs[R_ES]);
	303	copy_segment(&s->fs, &env->segs[R_FS]);
	304	copy_segment(&s->gs, &env->segs[R_GS]);
	305	copy_segment(&s->ss, &env->segs[R_SS]);
	306	copy_segment(&s->ldt, &env->ldt);
	307	copy_segment(&s->tr, &env->tr);
	308	copy_segment(&s->gdt, &env->gdt);
	309	copy_segment(&s->idt, &env->idt);
	310
	311	s->cr[0] = env->cr[0];
	312	s->cr[1] = env->cr[1];
	313	s->cr[2] = env->cr[2];
	314	s->cr[3] = env->cr[3];
	315	s->cr[4] = env->cr[4];
	316	}
	317
c72bf468	318	static inline int cpu_write_qemu_note(WriteCoreDumpFunction f,
369ff018	319	CPUX86State *env,
90166b71 WC	320	void *opaque,
	321	int type)
	322	{
	323	QEMUCPUState state;
	324	Elf64_Nhdr *note64;
	325	Elf32_Nhdr *note32;
	326	void *note;
	327	char *buf;
	328	int descsz, note_size, name_size = 5, note_head_size;
	329	const char *name = "QEMU";
	330	int ret;
	331
	332	qemu_get_cpustate(&state, env);
	333
	334	descsz = sizeof(state);
	335	if (type == 0) {
	336	note_head_size = sizeof(Elf32_Nhdr);
	337	} else {
	338	note_head_size = sizeof(Elf64_Nhdr);
	339	}
	340	note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	341	(descsz + 3) / 4) * 4;
4be34d1e	342	note = g_malloc0(note_size);
90166b71 WC	343	if (type == 0) {
	344	note32 = note;
	345	note32->n_namesz = cpu_to_le32(name_size);
	346	note32->n_descsz = cpu_to_le32(descsz);
	347	note32->n_type = 0;
	348	} else {
	349	note64 = note;
	350	note64->n_namesz = cpu_to_le32(name_size);
	351	note64->n_descsz = cpu_to_le32(descsz);
	352	note64->n_type = 0;
	353	}
	354	buf = note;
	355	buf += ((note_head_size + 3) / 4) * 4;
	356	memcpy(buf, name, name_size);
	357	buf += ((name_size + 3) / 4) * 4;
	358	memcpy(buf, &state, sizeof(state));
	359
	360	ret = f(note, note_size, opaque);
	361	g_free(note);
	362	if (ret < 0) {
	363	return -1;
	364	}
	365
	366	return 0;
	367	}
	368
c72bf468 JF	369	int x86_cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	370	void *opaque)
90166b71	371	{
c72bf468 JF	372	X86CPU *cpu = X86_CPU(cs);
	373
	374	return cpu_write_qemu_note(f, &cpu->env, opaque, 1);
90166b71 WC	375	}
90166b71 WC	376
c72bf468 JF	377	int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cs,
c72bf468 JF	378	void *opaque)
90166b71	379	{
c72bf468 JF	380	X86CPU *cpu = X86_CPU(cs);
	381
	382	return cpu_write_qemu_note(f, &cpu->env, opaque, 0);
90166b71	383	}
25ae9c1d	384
56c4bfb3 LE	385	int cpu_get_dump_info(ArchDumpInfo *info,
56c4bfb3 LE	386	const GuestPhysBlockList *guest_phys_blocks)
25ae9c1d WC	387	{
25ae9c1d WC	388	bool lma = false;
56c4bfb3	389	GuestPhysBlock *block;
25ae9c1d WC	390
25ae9c1d WC	391	#ifdef TARGET_X86_64
182735ef AF	392	X86CPU *first_x86_cpu = X86_CPU(first_cpu);
	393
	394	lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK);
25ae9c1d WC	395	#endif
	396
	397	if (lma) {
	398	info->d_machine = EM_X86_64;
	399	} else {
	400	info->d_machine = EM_386;
	401	}
	402	info->d_endian = ELFDATA2LSB;
	403
	404	if (lma) {
	405	info->d_class = ELFCLASS64;
	406	} else {
	407	info->d_class = ELFCLASS32;
	408
56c4bfb3 LE	409	QTAILQ_FOREACH(block, &guest_phys_blocks->head, next) {
56c4bfb3 LE	410	if (block->target_end > UINT_MAX) {
25ae9c1d WC	411	/* The memory size is greater than 4G */
	412	info->d_class = ELFCLASS64;
	413	break;
	414	}
	415	}
	416	}
	417
	418	return 0;
	419	}
0038ffb0	420
4720bd05	421	ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
0038ffb0 WC	422	{
	423	int name_size = 5; /* "CORE" or "QEMU" */
	424	size_t elf_note_size = 0;
	425	size_t qemu_note_size = 0;
	426	int elf_desc_size = 0;
	427	int qemu_desc_size = 0;
	428	int note_head_size;
	429
	430	if (class == ELFCLASS32) {
	431	note_head_size = sizeof(Elf32_Nhdr);
	432	} else {
	433	note_head_size = sizeof(Elf64_Nhdr);
	434	}
	435
	436	if (machine == EM_386) {
	437	elf_desc_size = sizeof(x86_elf_prstatus);
	438	}
	439	#ifdef TARGET_X86_64
	440	else {
	441	elf_desc_size = sizeof(x86_64_elf_prstatus);
	442	}
	443	#endif
	444	qemu_desc_size = sizeof(QEMUCPUState);
	445
	446	elf_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	447	(elf_desc_size + 3) / 4) * 4;
	448	qemu_note_size = ((note_head_size + 3) / 4 + (name_size + 3) / 4 +
	449	(qemu_desc_size + 3) / 4) * 4;
	450
	451	return (elf_note_size + qemu_note_size) * nr_cpus;
	452	}