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599b9a5a BS |
1 | /* |
2 | * x86 exception helpers | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
b6a0aa05 | 20 | #include "qemu/osdep.h" |
599b9a5a | 21 | #include "cpu.h" |
63c91552 | 22 | #include "exec/exec-all.h" |
1de7afc9 | 23 | #include "qemu/log.h" |
9c17d615 | 24 | #include "sysemu/sysemu.h" |
2ef6175a | 25 | #include "exec/helper-proto.h" |
599b9a5a | 26 | |
599b9a5a BS |
27 | void helper_raise_interrupt(CPUX86State *env, int intno, int next_eip_addend) |
28 | { | |
29 | raise_interrupt(env, intno, 1, 0, next_eip_addend); | |
30 | } | |
31 | ||
32 | void helper_raise_exception(CPUX86State *env, int exception_index) | |
33 | { | |
34 | raise_exception(env, exception_index); | |
35 | } | |
36 | ||
599b9a5a BS |
37 | /* |
38 | * Check nested exceptions and change to double or triple fault if | |
39 | * needed. It should only be called, if this is not an interrupt. | |
40 | * Returns the new exception number. | |
41 | */ | |
42 | static int check_exception(CPUX86State *env, int intno, int *error_code) | |
43 | { | |
44 | int first_contributory = env->old_exception == 0 || | |
45 | (env->old_exception >= 10 && | |
46 | env->old_exception <= 13); | |
47 | int second_contributory = intno == 0 || | |
48 | (intno >= 10 && intno <= 13); | |
49 | ||
50 | qemu_log_mask(CPU_LOG_INT, "check_exception old: 0x%x new 0x%x\n", | |
51 | env->old_exception, intno); | |
52 | ||
53 | #if !defined(CONFIG_USER_ONLY) | |
54 | if (env->old_exception == EXCP08_DBLE) { | |
55 | if (env->hflags & HF_SVMI_MASK) { | |
56 | cpu_vmexit(env, SVM_EXIT_SHUTDOWN, 0); /* does not return */ | |
57 | } | |
58 | ||
59 | qemu_log_mask(CPU_LOG_RESET, "Triple fault\n"); | |
60 | ||
61 | qemu_system_reset_request(); | |
62 | return EXCP_HLT; | |
63 | } | |
64 | #endif | |
65 | ||
66 | if ((first_contributory && second_contributory) | |
67 | || (env->old_exception == EXCP0E_PAGE && | |
68 | (second_contributory || (intno == EXCP0E_PAGE)))) { | |
69 | intno = EXCP08_DBLE; | |
70 | *error_code = 0; | |
71 | } | |
72 | ||
73 | if (second_contributory || (intno == EXCP0E_PAGE) || | |
74 | (intno == EXCP08_DBLE)) { | |
75 | env->old_exception = intno; | |
76 | } | |
77 | ||
78 | return intno; | |
79 | } | |
80 | ||
81 | /* | |
82 | * Signal an interruption. It is executed in the main CPU loop. | |
83 | * is_int is TRUE if coming from the int instruction. next_eip is the | |
a78d0eab | 84 | * env->eip value AFTER the interrupt instruction. It is only relevant if |
599b9a5a BS |
85 | * is_int is TRUE. |
86 | */ | |
87 | static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno, | |
88 | int is_int, int error_code, | |
91980095 PD |
89 | int next_eip_addend, |
90 | uintptr_t retaddr) | |
599b9a5a | 91 | { |
27103424 AF |
92 | CPUState *cs = CPU(x86_env_get_cpu(env)); |
93 | ||
599b9a5a BS |
94 | if (!is_int) { |
95 | cpu_svm_check_intercept_param(env, SVM_EXIT_EXCP_BASE + intno, | |
96 | error_code); | |
97 | intno = check_exception(env, intno, &error_code); | |
98 | } else { | |
99 | cpu_svm_check_intercept_param(env, SVM_EXIT_SWINT, 0); | |
100 | } | |
101 | ||
27103424 | 102 | cs->exception_index = intno; |
599b9a5a BS |
103 | env->error_code = error_code; |
104 | env->exception_is_int = is_int; | |
105 | env->exception_next_eip = env->eip + next_eip_addend; | |
91980095 | 106 | cpu_loop_exit_restore(cs, retaddr); |
599b9a5a BS |
107 | } |
108 | ||
109 | /* shortcuts to generate exceptions */ | |
110 | ||
111 | void QEMU_NORETURN raise_interrupt(CPUX86State *env, int intno, int is_int, | |
112 | int error_code, int next_eip_addend) | |
113 | { | |
91980095 | 114 | raise_interrupt2(env, intno, is_int, error_code, next_eip_addend, 0); |
599b9a5a BS |
115 | } |
116 | ||
117 | void raise_exception_err(CPUX86State *env, int exception_index, | |
118 | int error_code) | |
119 | { | |
91980095 PD |
120 | raise_interrupt2(env, exception_index, 0, error_code, 0, 0); |
121 | } | |
122 | ||
123 | void raise_exception_err_ra(CPUX86State *env, int exception_index, | |
124 | int error_code, uintptr_t retaddr) | |
125 | { | |
126 | raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr); | |
599b9a5a BS |
127 | } |
128 | ||
129 | void raise_exception(CPUX86State *env, int exception_index) | |
130 | { | |
91980095 PD |
131 | raise_interrupt2(env, exception_index, 0, 0, 0, 0); |
132 | } | |
133 | ||
134 | void raise_exception_ra(CPUX86State *env, int exception_index, uintptr_t retaddr) | |
135 | { | |
136 | raise_interrupt2(env, exception_index, 0, 0, 0, retaddr); | |
599b9a5a | 137 | } |