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Commit | Line | Data |
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2c0262af | 1 | /* |
5fafdf24 | 2 | * i386 execution defines |
2c0262af FB |
3 | * |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
2c0262af | 18 | */ |
7d3505c5 | 19 | #include "config.h" |
2c0262af FB |
20 | #include "dyngen-exec.h" |
21 | ||
14ce26e7 | 22 | /* XXX: factorize this mess */ |
14ce26e7 FB |
23 | #ifdef TARGET_X86_64 |
24 | #define TARGET_LONG_BITS 64 | |
25 | #else | |
26 | #define TARGET_LONG_BITS 32 | |
27 | #endif | |
28 | ||
d785e6be FB |
29 | #include "cpu-defs.h" |
30 | ||
2c0262af | 31 | register struct CPUX86State *env asm(AREG0); |
14ce26e7 | 32 | |
7d99a001 | 33 | #include "qemu-common.h" |
79383c9c | 34 | #include "qemu-log.h" |
2c0262af | 35 | |
2c0262af FB |
36 | #include "cpu.h" |
37 | #include "exec-all.h" | |
38 | ||
d9957a8b | 39 | /* op_helper.c */ |
a5e50b26 | 40 | void QEMU_NORETURN raise_exception_err(int exception_index, int error_code); |
41 | void QEMU_NORETURN raise_exception(int exception_index); | |
63a54736 | 42 | void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv); |
2c0262af | 43 | |
b6abf97d FB |
44 | /* n must be a constant to be efficient */ |
45 | static inline target_long lshift(target_long x, int n) | |
46 | { | |
47 | if (n >= 0) | |
48 | return x << n; | |
49 | else | |
50 | return x >> (-n); | |
51 | } | |
52 | ||
57fec1fe FB |
53 | #include "helper.h" |
54 | ||
9951bf39 FB |
55 | #if !defined(CONFIG_USER_ONLY) |
56 | ||
a9049a07 | 57 | #include "softmmu_exec.h" |
9951bf39 | 58 | |
9951bf39 FB |
59 | #endif /* !defined(CONFIG_USER_ONLY) */ |
60 | ||
2c0262af FB |
61 | #define RC_MASK 0xc00 |
62 | #define RC_NEAR 0x000 | |
63 | #define RC_DOWN 0x400 | |
64 | #define RC_UP 0x800 | |
65 | #define RC_CHOP 0xc00 | |
66 | ||
67 | #define MAXTAN 9223372036854775808.0 | |
68 | ||
2c0262af FB |
69 | /* the following deal with x86 long double-precision numbers */ |
70 | #define MAXEXPD 0x7fff | |
71 | #define EXPBIAS 16383 | |
72 | #define EXPD(fp) (fp.l.upper & 0x7fff) | |
73 | #define SIGND(fp) ((fp.l.upper) & 0x8000) | |
74 | #define MANTD(fp) (fp.l.lower) | |
75 | #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS | |
76 | ||
2c0262af FB |
77 | static inline void fpush(void) |
78 | { | |
79 | env->fpstt = (env->fpstt - 1) & 7; | |
80 | env->fptags[env->fpstt] = 0; /* validate stack entry */ | |
81 | } | |
82 | ||
83 | static inline void fpop(void) | |
84 | { | |
85 | env->fptags[env->fpstt] = 1; /* invvalidate stack entry */ | |
86 | env->fpstt = (env->fpstt + 1) & 7; | |
87 | } | |
88 | ||
c31da136 | 89 | static inline floatx80 helper_fldt(target_ulong ptr) |
2c0262af | 90 | { |
c31da136 | 91 | CPU_LDoubleU temp; |
9951bf39 FB |
92 | |
93 | temp.l.lower = ldq(ptr); | |
94 | temp.l.upper = lduw(ptr + 8); | |
95 | return temp.d; | |
96 | } | |
97 | ||
c31da136 | 98 | static inline void helper_fstt(floatx80 f, target_ulong ptr) |
9951bf39 | 99 | { |
c31da136 | 100 | CPU_LDoubleU temp; |
3b46e624 | 101 | |
9951bf39 FB |
102 | temp.d = f; |
103 | stq(ptr, temp.l.lower); | |
104 | stw(ptr + 8, temp.l.upper); | |
105 | } | |
106 | ||
2ee73ac3 FB |
107 | #define FPUS_IE (1 << 0) |
108 | #define FPUS_DE (1 << 1) | |
109 | #define FPUS_ZE (1 << 2) | |
110 | #define FPUS_OE (1 << 3) | |
111 | #define FPUS_UE (1 << 4) | |
112 | #define FPUS_PE (1 << 5) | |
113 | #define FPUS_SF (1 << 6) | |
114 | #define FPUS_SE (1 << 7) | |
115 | #define FPUS_B (1 << 15) | |
116 | ||
117 | #define FPUC_EM 0x3f | |
118 | ||
2c0262af FB |
119 | static inline uint32_t compute_eflags(void) |
120 | { | |
a7812ae4 | 121 | return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK); |
2c0262af FB |
122 | } |
123 | ||
2c0262af FB |
124 | /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */ |
125 | static inline void load_eflags(int eflags, int update_mask) | |
126 | { | |
127 | CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); | |
128 | DF = 1 - (2 * ((eflags >> 10) & 1)); | |
5fafdf24 | 129 | env->eflags = (env->eflags & ~update_mask) | |
093f8f06 | 130 | (eflags & update_mask) | 0x2; |
2c0262af FB |
131 | } |
132 | ||
5efc27bb FB |
133 | /* load efer and update the corresponding hflags. XXX: do consistency |
134 | checks with cpuid bits ? */ | |
135 | static inline void cpu_load_efer(CPUState *env, uint64_t val) | |
136 | { | |
137 | env->efer = val; | |
138 | env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK); | |
139 | if (env->efer & MSR_EFER_LMA) | |
140 | env->hflags |= HF_LMA_MASK; | |
141 | if (env->efer & MSR_EFER_SVME) | |
142 | env->hflags |= HF_SVME_MASK; | |
143 | } |